add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/mach-cns3xxx/core.c
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@@ -1,11 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright 1999 - 2003 ARM Limited
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  * Copyright 2000 Deep Blue Solutions Ltd
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  * Copyright 2008 Cavium Networks
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- *
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- * This file is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License, Version 2, as
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- * published by the Free Software Foundation.
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  */
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 #include <linux/init.h>
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@@ -90,7 +87,7 @@
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 /* used by entry-macro.S */
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 void __init cns3xxx_init_irq(void)
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 {
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-	gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
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+	gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
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 		 IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
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 }
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@@ -192,12 +189,6 @@
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 	return IRQ_HANDLED;
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 }
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-static struct irqaction cns3xxx_timer_irq = {
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-	.name		= "timer",
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-	.flags		= IRQF_TIMER | IRQF_IRQPOLL,
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-	.handler	= cns3xxx_timer_interrupt,
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-};
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-
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 /*
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  * Set up the clock source and clock events devices
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  */
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@@ -248,7 +239,9 @@
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 	writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
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 	/* Make irqs happen for the system timer */
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-	setup_irq(timer_irq, &cns3xxx_timer_irq);
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+	if (request_irq(timer_irq, cns3xxx_timer_interrupt,
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+			IRQF_TIMER | IRQF_IRQPOLL, "timer", NULL))
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+		pr_err("Failed to request irq %d (timer)\n", timer_irq);
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 	cns3xxx_clockevents_init(timer_irq);
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 }
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@@ -379,6 +372,7 @@
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 		/* De-Asscer SATA Reset */
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 		cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
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 	}
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+	of_node_put(dn);
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 	dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
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 	if (of_device_is_available(dn)) {
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@@ -392,6 +386,7 @@
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 		cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
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 		cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
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 	}
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+	of_node_put(dn);
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 	pm_power_off = cns3xxx_power_off;
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