add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/vf610-zii-cfu1.dts
..
..
@@ -16,6 +16,7 @@
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 	};
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17
 
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 	memory@80000000 {
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+		device_type = "memory";
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 		reg = <0x80000000 0x20000000>;
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 	};
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22
 
..
..
@@ -28,35 +29,30 @@
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 			label = "zii:green:debug1";
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 			gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
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 			linux,default-trigger = "heartbeat";
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-			max-brightness = <1>;
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 		};
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 		led-fail {
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 			label = "zii:red:fail";
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 			gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
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 			default-state = "off";
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-			max-brightness = <1>;
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 		};
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 		led-status {
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 			label = "zii:green:status";
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 			gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
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 			default-state = "off";
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-			max-brightness = <1>;
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 		};
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45
 
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 		led-debug-a {
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 			label = "zii:green:debug_a";
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 			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
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 			default-state = "off";
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-			max-brightness = <1>;
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 		};
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 		led-debug-b {
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 			label = "zii:green:debug_b";
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 			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
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 			default-state = "off";
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-			max-brightness = <1>;
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 		};
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 	};
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..
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@@ -65,6 +61,23 @@
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 		 regulator-name = "vcc_3v3_mcu";
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 		 regulator-min-microvolt = <3300000>;
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 		 regulator-max-microvolt = <3300000>;
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+	};
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+
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+	sff: sfp {
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+		compatible = "sff,sff";
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+		pinctrl-0 = <&pinctrl_optical>;
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+		pinctrl-names = "default";
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+		i2c-bus = <&i2c0>;
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+		los-gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
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+		tx-disable-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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+	};
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+
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+	supply-voltage-monitor {
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+		compatible = "iio-hwmon";
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+		io-channels = <&adc0 8>, /* 28VDC_IN */
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+			      <&adc0 9>, /* +3.3V    */
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+			      <&adc1 8>, /* VCC_1V5  */
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+			      <&adc1 9>; /* VCC_1V2  */
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 	};
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 };
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..
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@@ -82,9 +95,14 @@
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 	bus-num = <1>;
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_dspi1>;
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-	status = "okay";
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+	/*
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+	 * Some CFU1s come with SPI-NOR chip DNPed, so we leave this
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+	 * node disabled by default and rely on bootloader to enable
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+	 * it when appropriate.
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+	 */
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+	status = "disabled";
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104
 
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-	m25p128@0 {
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+	flash@0 {
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 		#address-cells = <1>;
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 		#size-cells = <1>;
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 		compatible = "m25p128", "jedec,spi-nor";
..
..
@@ -113,6 +131,8 @@
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 	non-removable;
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 	no-1-8-v;
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 	keep-power-in-suspend;
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+	no-sdio;
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+	no-sd;
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 	status = "okay";
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 };
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138
 
..
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@@ -120,6 +140,7 @@
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_esdhc1>;
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 	bus-width = <4>;
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+	no-sdio;
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 	status = "okay";
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 };
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..
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@@ -137,6 +158,8 @@
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 	mdio1: mdio {
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 		#address-cells = <1>;
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 		#size-cells = <0>;
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+		clock-frequency = <12500000>;
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+		suppress-preamble;
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 		status = "okay";
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164
 
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 		switch0: switch0@0 {
..
..
@@ -149,7 +172,6 @@
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 			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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 			interrupt-controller;
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 			#interrupt-cells = <2>;
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-			reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
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175
 
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 			ports {
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 				#address-cells = <1>;
..
..
@@ -168,6 +190,14 @@
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 				port@2 {
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 					reg = <2>;
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 					label = "eth_cu_1000_3";
193
+				};
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+
195
+				port@5 {
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+					reg = <5>;
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+					label = "eth_fc_1000_1";
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+					phy-mode = "1000base-x";
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+					managed = "in-band-status";
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+					sfp = <&sff>;
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 				};
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202
 
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 				port@6 {
..
..
@@ -191,10 +221,11 @@
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 	pinctrl-0 = <&pinctrl_i2c0>;
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 	status = "okay";
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223
 
194
-	pca9554@22 {
224
+	io-expander@22 {
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 		compatible = "nxp,pca9554";
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 		reg = <0x22>;
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 		gpio-controller;
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+		#gpio-cells = <2>;
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 	};
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230
 
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 	lm75@48 {
..
..
@@ -202,17 +233,33 @@
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 		reg = <0x48>;
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 	};
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235
 
205
-	at24c04@52 {
236
+	eeprom@52 {
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 		compatible = "atmel,24c04";
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 		reg = <0x52>;
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 		label = "nvm";
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 	};
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241
 
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-	at24c04@54 {
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+	eeprom@54 {
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 		compatible = "atmel,24c04";
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 		reg = <0x54>;
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 		label = "nameplate";
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 	};
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+};
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+
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+&i2c1 {
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+	clock-frequency = <100000>;
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_i2c1>;
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+	status = "okay";
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+
255
+	watchdog@38 {
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+		compatible = "zii,rave-wdt";
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+		reg = <0x38>;
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+	};
259
+};
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+
261
+&snvsrtc {
262
+	status = "disabled";
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 };
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264
 
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 &uart0 {
..
..
@@ -279,6 +326,13 @@
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 		>;
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 	};
281
328
 
329
+	pinctrl_i2c1: i2c1grp {
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+		fsl,pins = <
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+			VF610_PAD_PTB16__I2C1_SCL		0x37ff
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+			VF610_PAD_PTB17__I2C1_SDA		0x37ff
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+		>;
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+	};
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+
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 	pinctrl_leds_debug: pinctrl-leds-debug {
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 		fsl,pins = <
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338
 			VF610_PAD_PTD3__GPIO_82			0x31c2
..
..
@@ -289,10 +343,19 @@
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 		>;
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 	};
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345
 
346
+	pinctrl_optical: optical-grp {
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+		fsl,pins = <
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+		/* SFF SD input */
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+		VF610_PAD_PTE27__GPIO_132	0x3061
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+
351
+		/* SFF Transmit disable output */
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+		VF610_PAD_PTE13__GPIO_118	0x3043
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+		>;
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+	};
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+
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 	pinctrl_switch: switch-grp {
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 		fsl,pins = <
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 			VF610_PAD_PTB28__GPIO_98		0x3061
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-			VF610_PAD_PTE2__GPIO_107		0x1042
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 		>;
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 	};
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