hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arm/boot/dts/tegra20-ventana.dts
....@@ -3,6 +3,7 @@
33
44 #include <dt-bindings/input/input.h>
55 #include "tegra20.dtsi"
6
+#include "tegra20-cpu-opp.dtsi"
67
78 / {
89 model = "NVIDIA Tegra20 Ventana evaluation board";
....@@ -554,14 +555,14 @@
554555 status = "okay";
555556 };
556557
557
- sdhci@c8000000 {
558
+ mmc@c8000000 {
558559 status = "okay";
559560 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
560561 bus-width = <4>;
561562 keep-power-in-suspend;
562563 };
563564
564
- sdhci@c8000400 {
565
+ mmc@c8000400 {
565566 status = "okay";
566567 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
567568 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
....@@ -569,7 +570,7 @@
569570 bus-width = <4>;
570571 };
571572
572
- sdhci@c8000600 {
573
+ mmc@c8000600 {
573574 status = "okay";
574575 bus-width = <8>;
575576 non-removable;
....@@ -586,16 +587,19 @@
586587 default-brightness-level = <6>;
587588 };
588589
589
- clocks {
590
- compatible = "simple-bus";
591
- #address-cells = <1>;
592
- #size-cells = <0>;
590
+ clk32k_in: clock@0 {
591
+ compatible = "fixed-clock";
592
+ clock-frequency = <32768>;
593
+ #clock-cells = <0>;
594
+ };
593595
594
- clk32k_in: clock@0 {
595
- compatible = "fixed-clock";
596
- reg = <0>;
597
- #clock-cells = <0>;
598
- clock-frequency = <32768>;
596
+ cpus {
597
+ cpu0: cpu@0 {
598
+ operating-points-v2 = <&cpu0_opp_table>;
599
+ };
600
+
601
+ cpu@1 {
602
+ operating-points-v2 = <&cpu0_opp_table>;
599603 };
600604 };
601605
....@@ -611,7 +615,7 @@
611615 };
612616
613617 panel: panel {
614
- compatible = "chunghwa,claa101wa01a", "simple-panel";
618
+ compatible = "chunghwa,claa101wa01a";
615619
616620 power-supply = <&vdd_pnl_reg>;
617621 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
....@@ -620,58 +624,47 @@
620624 ddc-i2c-bus = <&lvds_ddc>;
621625 };
622626
623
- regulators {
624
- compatible = "simple-bus";
625
- #address-cells = <1>;
626
- #size-cells = <0>;
627
+ vdd_5v0_reg: regulator@0 {
628
+ compatible = "regulator-fixed";
629
+ regulator-name = "vdd_5v0";
630
+ regulator-min-microvolt = <5000000>;
631
+ regulator-max-microvolt = <5000000>;
632
+ regulator-always-on;
633
+ };
627634
628
- vdd_5v0_reg: regulator@0 {
629
- compatible = "regulator-fixed";
630
- reg = <0>;
631
- regulator-name = "vdd_5v0";
632
- regulator-min-microvolt = <5000000>;
633
- regulator-max-microvolt = <5000000>;
634
- regulator-always-on;
635
- };
635
+ regulator@1 {
636
+ compatible = "regulator-fixed";
637
+ regulator-name = "vdd_1v5";
638
+ regulator-min-microvolt = <1500000>;
639
+ regulator-max-microvolt = <1500000>;
640
+ gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
641
+ };
636642
637
- regulator@1 {
638
- compatible = "regulator-fixed";
639
- reg = <1>;
640
- regulator-name = "vdd_1v5";
641
- regulator-min-microvolt = <1500000>;
642
- regulator-max-microvolt = <1500000>;
643
- gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
644
- };
643
+ regulator@2 {
644
+ compatible = "regulator-fixed";
645
+ regulator-name = "vdd_1v2";
646
+ regulator-min-microvolt = <1200000>;
647
+ regulator-max-microvolt = <1200000>;
648
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
649
+ enable-active-high;
650
+ };
645651
646
- regulator@2 {
647
- compatible = "regulator-fixed";
648
- reg = <2>;
649
- regulator-name = "vdd_1v2";
650
- regulator-min-microvolt = <1200000>;
651
- regulator-max-microvolt = <1200000>;
652
- gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
653
- enable-active-high;
654
- };
652
+ vdd_pnl_reg: regulator@3 {
653
+ compatible = "regulator-fixed";
654
+ regulator-name = "vdd_pnl";
655
+ regulator-min-microvolt = <2800000>;
656
+ regulator-max-microvolt = <2800000>;
657
+ gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
658
+ enable-active-high;
659
+ };
655660
656
- vdd_pnl_reg: regulator@3 {
657
- compatible = "regulator-fixed";
658
- reg = <3>;
659
- regulator-name = "vdd_pnl";
660
- regulator-min-microvolt = <2800000>;
661
- regulator-max-microvolt = <2800000>;
662
- gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
663
- enable-active-high;
664
- };
665
-
666
- vdd_bl_reg: regulator@4 {
667
- compatible = "regulator-fixed";
668
- reg = <4>;
669
- regulator-name = "vdd_bl";
670
- regulator-min-microvolt = <2800000>;
671
- regulator-max-microvolt = <2800000>;
672
- gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
673
- enable-active-high;
674
- };
661
+ vdd_bl_reg: regulator@4 {
662
+ compatible = "regulator-fixed";
663
+ regulator-name = "vdd_bl";
664
+ regulator-min-microvolt = <2800000>;
665
+ regulator-max-microvolt = <2800000>;
666
+ gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
667
+ enable-active-high;
675668 };
676669
677670 sound {
....@@ -693,7 +686,7 @@
693686 nvidia,audio-codec = <&wm8903>;
694687
695688 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
696
- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
689
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
697690 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
698691 GPIO_ACTIVE_HIGH>;
699692 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)