.. | .. |
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3 | 3 | |
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4 | 4 | #include <dt-bindings/input/input.h> |
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5 | 5 | #include "tegra20.dtsi" |
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| 6 | +#include "tegra20-cpu-opp.dtsi" |
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6 | 7 | |
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7 | 8 | / { |
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8 | 9 | model = "NVIDIA Tegra20 Ventana evaluation board"; |
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.. | .. |
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554 | 555 | status = "okay"; |
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555 | 556 | }; |
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556 | 557 | |
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557 | | - sdhci@c8000000 { |
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| 558 | + mmc@c8000000 { |
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558 | 559 | status = "okay"; |
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559 | 560 | power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; |
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560 | 561 | bus-width = <4>; |
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561 | 562 | keep-power-in-suspend; |
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562 | 563 | }; |
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563 | 564 | |
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564 | | - sdhci@c8000400 { |
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| 565 | + mmc@c8000400 { |
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565 | 566 | status = "okay"; |
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566 | 567 | cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
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567 | 568 | wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; |
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.. | .. |
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569 | 570 | bus-width = <4>; |
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570 | 571 | }; |
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571 | 572 | |
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572 | | - sdhci@c8000600 { |
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| 573 | + mmc@c8000600 { |
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573 | 574 | status = "okay"; |
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574 | 575 | bus-width = <8>; |
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575 | 576 | non-removable; |
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.. | .. |
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586 | 587 | default-brightness-level = <6>; |
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587 | 588 | }; |
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588 | 589 | |
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589 | | - clocks { |
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590 | | - compatible = "simple-bus"; |
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591 | | - #address-cells = <1>; |
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592 | | - #size-cells = <0>; |
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| 590 | + clk32k_in: clock@0 { |
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| 591 | + compatible = "fixed-clock"; |
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| 592 | + clock-frequency = <32768>; |
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| 593 | + #clock-cells = <0>; |
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| 594 | + }; |
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593 | 595 | |
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594 | | - clk32k_in: clock@0 { |
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595 | | - compatible = "fixed-clock"; |
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596 | | - reg = <0>; |
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597 | | - #clock-cells = <0>; |
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598 | | - clock-frequency = <32768>; |
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| 596 | + cpus { |
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| 597 | + cpu0: cpu@0 { |
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| 598 | + operating-points-v2 = <&cpu0_opp_table>; |
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| 599 | + }; |
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| 600 | + |
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| 601 | + cpu@1 { |
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| 602 | + operating-points-v2 = <&cpu0_opp_table>; |
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599 | 603 | }; |
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600 | 604 | }; |
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601 | 605 | |
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.. | .. |
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611 | 615 | }; |
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612 | 616 | |
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613 | 617 | panel: panel { |
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614 | | - compatible = "chunghwa,claa101wa01a", "simple-panel"; |
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| 618 | + compatible = "chunghwa,claa101wa01a"; |
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615 | 619 | |
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616 | 620 | power-supply = <&vdd_pnl_reg>; |
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617 | 621 | enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>; |
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.. | .. |
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620 | 624 | ddc-i2c-bus = <&lvds_ddc>; |
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621 | 625 | }; |
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622 | 626 | |
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623 | | - regulators { |
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624 | | - compatible = "simple-bus"; |
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625 | | - #address-cells = <1>; |
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626 | | - #size-cells = <0>; |
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| 627 | + vdd_5v0_reg: regulator@0 { |
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| 628 | + compatible = "regulator-fixed"; |
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| 629 | + regulator-name = "vdd_5v0"; |
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| 630 | + regulator-min-microvolt = <5000000>; |
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| 631 | + regulator-max-microvolt = <5000000>; |
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| 632 | + regulator-always-on; |
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| 633 | + }; |
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627 | 634 | |
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628 | | - vdd_5v0_reg: regulator@0 { |
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629 | | - compatible = "regulator-fixed"; |
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630 | | - reg = <0>; |
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631 | | - regulator-name = "vdd_5v0"; |
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632 | | - regulator-min-microvolt = <5000000>; |
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633 | | - regulator-max-microvolt = <5000000>; |
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634 | | - regulator-always-on; |
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635 | | - }; |
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| 635 | + regulator@1 { |
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| 636 | + compatible = "regulator-fixed"; |
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| 637 | + regulator-name = "vdd_1v5"; |
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| 638 | + regulator-min-microvolt = <1500000>; |
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| 639 | + regulator-max-microvolt = <1500000>; |
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| 640 | + gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
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| 641 | + }; |
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636 | 642 | |
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637 | | - regulator@1 { |
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638 | | - compatible = "regulator-fixed"; |
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639 | | - reg = <1>; |
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640 | | - regulator-name = "vdd_1v5"; |
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641 | | - regulator-min-microvolt = <1500000>; |
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642 | | - regulator-max-microvolt = <1500000>; |
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643 | | - gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
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644 | | - }; |
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| 643 | + regulator@2 { |
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| 644 | + compatible = "regulator-fixed"; |
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| 645 | + regulator-name = "vdd_1v2"; |
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| 646 | + regulator-min-microvolt = <1200000>; |
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| 647 | + regulator-max-microvolt = <1200000>; |
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| 648 | + gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; |
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| 649 | + enable-active-high; |
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| 650 | + }; |
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645 | 651 | |
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646 | | - regulator@2 { |
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647 | | - compatible = "regulator-fixed"; |
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648 | | - reg = <2>; |
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649 | | - regulator-name = "vdd_1v2"; |
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650 | | - regulator-min-microvolt = <1200000>; |
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651 | | - regulator-max-microvolt = <1200000>; |
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652 | | - gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; |
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653 | | - enable-active-high; |
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654 | | - }; |
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| 652 | + vdd_pnl_reg: regulator@3 { |
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| 653 | + compatible = "regulator-fixed"; |
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| 654 | + regulator-name = "vdd_pnl"; |
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| 655 | + regulator-min-microvolt = <2800000>; |
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| 656 | + regulator-max-microvolt = <2800000>; |
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| 657 | + gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; |
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| 658 | + enable-active-high; |
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| 659 | + }; |
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655 | 660 | |
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656 | | - vdd_pnl_reg: regulator@3 { |
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657 | | - compatible = "regulator-fixed"; |
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658 | | - reg = <3>; |
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659 | | - regulator-name = "vdd_pnl"; |
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660 | | - regulator-min-microvolt = <2800000>; |
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661 | | - regulator-max-microvolt = <2800000>; |
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662 | | - gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>; |
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663 | | - enable-active-high; |
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664 | | - }; |
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665 | | - |
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666 | | - vdd_bl_reg: regulator@4 { |
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667 | | - compatible = "regulator-fixed"; |
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668 | | - reg = <4>; |
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669 | | - regulator-name = "vdd_bl"; |
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670 | | - regulator-min-microvolt = <2800000>; |
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671 | | - regulator-max-microvolt = <2800000>; |
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672 | | - gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; |
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673 | | - enable-active-high; |
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674 | | - }; |
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| 661 | + vdd_bl_reg: regulator@4 { |
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| 662 | + compatible = "regulator-fixed"; |
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| 663 | + regulator-name = "vdd_bl"; |
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| 664 | + regulator-min-microvolt = <2800000>; |
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| 665 | + regulator-max-microvolt = <2800000>; |
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| 666 | + gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; |
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| 667 | + enable-active-high; |
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675 | 668 | }; |
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676 | 669 | |
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677 | 670 | sound { |
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.. | .. |
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693 | 686 | nvidia,audio-codec = <&wm8903>; |
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694 | 687 | |
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695 | 688 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
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696 | | - nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; |
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| 689 | + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; |
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697 | 690 | nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) |
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698 | 691 | GPIO_ACTIVE_HIGH>; |
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699 | 692 | nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) |
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