forked from ~ljy/RK356X_SDK_RELEASE

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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
....@@ -1,4 +1,4 @@
1
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
1
+// SPDX-License-Identifier: GPL-2.0 OR MIT
22 /*
33  * Copyright 2016-2018 Toradex AG
44  */
....@@ -11,23 +11,20 @@
1111  * Compatible for Revisions 2GB: V1.2A
1212  */
1313 / {
14
-	model = "Toradex Apalis TK1";
15
-	compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
16
-		     "nvidia,tegra124";
17
-
1814 	memory@80000000 {
1915 		reg = <0x0 0x80000000 0x0 0x80000000>;
2016 	};
2117 
2218 	pcie@1003000 {
2319 		status = "okay";
24
-		avddio-pex-supply = <&vdd_1v05>;
25
-		avdd-pex-pll-supply = <&vdd_1v05>;
26
-		avdd-pll-erefe-supply = <&avdd_1v05>;
27
-		dvddio-pex-supply = <&vdd_1v05>;
28
-		hvdd-pex-pll-e-supply = <&reg_3v3>;
29
-		hvdd-pex-supply = <&reg_3v3>;
30
-		vddio-pex-ctl-supply = <&reg_3v3>;
20
+
21
+		avddio-pex-supply = <&reg_1v05_vdd>;
22
+		avdd-pex-pll-supply = <&reg_1v05_vdd>;
23
+		avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24
+		dvddio-pex-supply = <&reg_1v05_vdd>;
25
+		hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26
+		hvdd-pex-supply = <&reg_module_3v3>;
27
+		vddio-pex-ctl-supply = <&reg_module_3v3>;
3128 
3229 		/* Apalis PCIe (additional lane Apalis type specific) */
3330 		pci@1,0 {
....@@ -42,16 +39,21 @@
4239 			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
4340 			phy-names = "pcie-0";
4441 			status = "okay";
42
+
43
+			ethernet@0,0 {
44
+				reg = <0 0 0 0 0>;
45
+				local-mac-address = [00 00 00 00 00 00];
46
+			};
4547 		};
4648 	};
4749 
4850 	host1x@50000000 {
4951 		hdmi@54280000 {
50
-			pll-supply = <&reg_1v05_avdd_hdmi_pll>;
51
-			vdd-supply = <&reg_3v3_avdd_hdmi>;
5252 			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
5353 			nvidia,hpd-gpio =
5454 				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
55
+			pll-supply = <&reg_1v05_avdd_hdmi_pll>;
56
+			vdd-supply = <&reg_3v3_avdd_hdmi>;
5557 		};
5658 	};
5759 
....@@ -60,44 +62,44 @@
6062 		 * Node left disabled on purpose - the bootloader will enable
6163 		 * it after having set the VPR up
6264 		 */
63
-		vdd-supply = <&vdd_gpu>;
65
+		vdd-supply = <&reg_vdd_gpu>;
6466 	};
6567 
66
-	pinmux: pinmux@70000868 {
68
+	pinmux@70000868 {
6769 		pinctrl-names = "default";
6870 		pinctrl-0 = <&state_default>;
6971 
7072 		state_default: pinmux {
7173 			/* Analogue Audio (On-module) */
72
-			dap3_fs_pp0 {
74
+			dap3-fs-pp0 {
7375 				nvidia,pins = "dap3_fs_pp0";
7476 				nvidia,function = "i2s2";
7577 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
7678 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
7779 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
7880 			};
79
-			dap3_din_pp1 {
81
+			dap3-din-pp1 {
8082 				nvidia,pins = "dap3_din_pp1";
8183 				nvidia,function = "i2s2";
8284 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
8385 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
8486 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
8587 			};
86
-			dap3_dout_pp2 {
88
+			dap3-dout-pp2 {
8789 				nvidia,pins = "dap3_dout_pp2";
8890 				nvidia,function = "i2s2";
8991 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
9092 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
9193 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
9294 			};
93
-			dap3_sclk_pp3 {
95
+			dap3-sclk-pp3 {
9496 				nvidia,pins = "dap3_sclk_pp3";
9597 				nvidia,function = "i2s2";
9698 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
9799 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
98100 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
99101 			};
100
-			dap_mclk1_pw4 {
102
+			dap-mclk1-pw4 {
101103 				nvidia,pins = "dap_mclk1_pw4";
102104 				nvidia,function = "extperiph1";
103105 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -124,7 +126,7 @@
124126 			};
125127 
126128 			/* Apalis CAM1_MCLK */
127
-			cam_mclk_pcc0 {
129
+			cam-mclk-pcc0 {
128130 				nvidia,pins = "cam_mclk_pcc0";
129131 				nvidia,function = "vi_alt3";
130132 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -133,28 +135,28 @@
133135 			};
134136 
135137 			/* Apalis Digital Audio */
136
-			dap2_fs_pa2 {
138
+			dap2-fs-pa2 {
137139 				nvidia,pins = "dap2_fs_pa2";
138140 				nvidia,function = "hda";
139141 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140142 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
141143 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
142144 			};
143
-			dap2_sclk_pa3 {
145
+			dap2-sclk-pa3 {
144146 				nvidia,pins = "dap2_sclk_pa3";
145147 				nvidia,function = "hda";
146148 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147149 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
148150 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
149151 			};
150
-			dap2_din_pa4 {
152
+			dap2-din-pa4 {
151153 				nvidia,pins = "dap2_din_pa4";
152154 				nvidia,function = "hda";
153155 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
154156 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
155157 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
156158 			};
157
-			dap2_dout_pa5 {
159
+			dap2-dout-pa5 {
158160 				nvidia,pins = "dap2_dout_pa5";
159161 				nvidia,function = "hda";
160162 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -167,7 +169,7 @@
167169 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
168170 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
169171 			};
170
-			clk3_out_pee0 {
172
+			clk3-out-pee0 {
171173 				nvidia,pins = "clk3_out_pee0";
172174 				nvidia,function = "extperiph3";
173175 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -176,7 +178,7 @@
176178 			};
177179 
178180 			/* Apalis GPIO */
179
-			usb_vbus_en0_pn4 {
181
+			usb-vbus-en0-pn4 {
180182 				nvidia,pins = "usb_vbus_en0_pn4";
181183 				nvidia,function = "rsvd2";
182184 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -184,7 +186,7 @@
184186 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
185187 				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
186188 			};
187
-			usb_vbus_en1_pn5 {
189
+			usb-vbus-en1-pn5 {
188190 				nvidia,pins = "usb_vbus_en1_pn5";
189191 				nvidia,function = "rsvd2";
190192 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -192,35 +194,35 @@
192194 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
193195 				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
194196 			};
195
-			pex_l0_rst_n_pdd1 {
197
+			pex-l0-rst-n-pdd1 {
196198 				nvidia,pins = "pex_l0_rst_n_pdd1";
197199 				nvidia,function = "rsvd2";
198200 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
199201 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
200202 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
201203 			};
202
-			pex_l0_clkreq_n_pdd2 {
204
+			pex-l0-clkreq-n-pdd2 {
203205 				nvidia,pins = "pex_l0_clkreq_n_pdd2";
204206 				nvidia,function = "rsvd2";
205207 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206208 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
207209 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
208210 			};
209
-			pex_l1_rst_n_pdd5 {
211
+			pex-l1-rst-n-pdd5 {
210212 				nvidia,pins = "pex_l1_rst_n_pdd5";
211213 				nvidia,function = "rsvd2";
212214 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213215 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
214216 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
215217 			};
216
-			pex_l1_clkreq_n_pdd6 {
218
+			pex-l1-clkreq-n-pdd6 {
217219 				nvidia,pins = "pex_l1_clkreq_n_pdd6";
218220 				nvidia,function = "rsvd2";
219221 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220222 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
221223 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
222224 			};
223
-			dp_hpd_pff0 {
225
+			dp-hpd-pff0 {
224226 				nvidia,pins = "dp_hpd_pff0";
225227 				nvidia,function = "dp";
226228 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -244,7 +246,7 @@
244246 			};
245247 
246248 			/* Apalis HDMI1_CEC */
247
-			hdmi_cec_pee3 {
249
+			hdmi-cec-pee3 {
248250 				nvidia,pins = "hdmi_cec_pee3";
249251 				nvidia,function = "cec";
250252 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -254,7 +256,7 @@
254256 			};
255257 
256258 			/* Apalis HDMI1_HPD */
257
-			hdmi_int_pn7 {
259
+			hdmi-int-pn7 {
258260 				nvidia,pins = "hdmi_int_pn7";
259261 				nvidia,function = "rsvd1";
260262 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -264,7 +266,7 @@
264266 			};
265267 
266268 			/* Apalis I2C1 */
267
-			gen1_i2c_scl_pc4 {
269
+			gen1-i2c-scl-pc4 {
268270 				nvidia,pins = "gen1_i2c_scl_pc4";
269271 				nvidia,function = "i2c1";
270272 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -272,7 +274,7 @@
272274 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
273275 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
274276 			};
275
-			gen1_i2c_sda_pc5 {
277
+			gen1-i2c-sda-pc5 {
276278 				nvidia,pins = "gen1_i2c_sda_pc5";
277279 				nvidia,function = "i2c1";
278280 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -282,7 +284,7 @@
282284 			};
283285 
284286 			/* Apalis I2C3 (CAM) */
285
-			cam_i2c_scl_pbb1 {
287
+			cam-i2c-scl-pbb1 {
286288 				nvidia,pins = "cam_i2c_scl_pbb1";
287289 				nvidia,function = "i2c3";
288290 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -290,7 +292,7 @@
290292 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
291293 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
292294 			};
293
-			cam_i2c_sda_pbb2 {
295
+			cam-i2c-sda-pbb2 {
294296 				nvidia,pins = "cam_i2c_sda_pbb2";
295297 				nvidia,function = "i2c3";
296298 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -300,7 +302,7 @@
300302 			};
301303 
302304 			/* Apalis I2C4 (DDC) */
303
-			ddc_scl_pv4 {
305
+			ddc-scl-pv4 {
304306 				nvidia,pins = "ddc_scl_pv4";
305307 				nvidia,function = "i2c4";
306308 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -308,7 +310,7 @@
308310 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
309311 				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
310312 			};
311
-			ddc_sda_pv5 {
313
+			ddc-sda-pv5 {
312314 				nvidia,pins = "ddc_sda_pv5";
313315 				nvidia,function = "i2c4";
314316 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -318,77 +320,77 @@
318320 			};
319321 
320322 			/* Apalis MMC1 */
321
-			sdmmc1_cd_n_pv3 { /* CD# GPIO */
323
+			sdmmc1-cd-n-pv3 { /* CD# GPIO */
322324 				nvidia,pins = "sdmmc1_wp_n_pv3";
323325 				nvidia,function = "sdmmc1";
324326 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
325327 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
326328 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
327329 			};
328
-			clk2_out_pw5 { /* D5 GPIO */
330
+			clk2-out-pw5 { /* D5 GPIO */
329331 				nvidia,pins = "clk2_out_pw5";
330332 				nvidia,function = "rsvd2";
331333 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
332334 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
333335 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
334336 			};
335
-			sdmmc1_dat3_py4 {
337
+			sdmmc1-dat3-py4 {
336338 				nvidia,pins = "sdmmc1_dat3_py4";
337339 				nvidia,function = "sdmmc1";
338340 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
339341 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
340342 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341343 			};
342
-			sdmmc1_dat2_py5 {
344
+			sdmmc1-dat2-py5 {
343345 				nvidia,pins = "sdmmc1_dat2_py5";
344346 				nvidia,function = "sdmmc1";
345347 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
346348 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
347349 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
348350 			};
349
-			sdmmc1_dat1_py6 {
351
+			sdmmc1-dat1-py6 {
350352 				nvidia,pins = "sdmmc1_dat1_py6";
351353 				nvidia,function = "sdmmc1";
352354 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
353355 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
354356 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
355357 			};
356
-			sdmmc1_dat0_py7 {
358
+			sdmmc1-dat0-py7 {
357359 				nvidia,pins = "sdmmc1_dat0_py7";
358360 				nvidia,function = "sdmmc1";
359361 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
360362 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
361363 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
362364 			};
363
-			sdmmc1_clk_pz0 {
365
+			sdmmc1-clk-pz0 {
364366 				nvidia,pins = "sdmmc1_clk_pz0";
365367 				nvidia,function = "sdmmc1";
366368 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
367369 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
368370 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
369371 			};
370
-			sdmmc1_cmd_pz1 {
372
+			sdmmc1-cmd-pz1 {
371373 				nvidia,pins = "sdmmc1_cmd_pz1";
372374 				nvidia,function = "sdmmc1";
373375 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
374376 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
375377 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
376378 			};
377
-			clk2_req_pcc5 { /* D4 GPIO */
379
+			clk2-req-pcc5 { /* D4 GPIO */
378380 				nvidia,pins = "clk2_req_pcc5";
379381 				nvidia,function = "rsvd2";
380382 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
381383 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
382384 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383385 			};
384
-			sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */
386
+			sdmmc3-clk-lb-in-pee5 { /* D6 GPIO */
385387 				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
386388 				nvidia,function = "rsvd2";
387389 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
388390 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
389391 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
390392 			};
391
-			usb_vbus_en2_pff1 { /* D7 GPIO */
393
+			usb-vbus-en2-pff1 { /* D7 GPIO */
392394 				nvidia,pins = "usb_vbus_en2_pff1";
393395 				nvidia,function = "rsvd2";
394396 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -428,7 +430,7 @@
428430 			};
429431 
430432 			/* Apalis SATA1_ACT# */
431
-			dap1_dout_pn2 {
433
+			dap1-dout-pn2 {
432434 				nvidia,pins = "dap1_dout_pn2";
433435 				nvidia,function = "gmi";
434436 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -437,49 +439,49 @@
437439 			};
438440 
439441 			/* Apalis SD1 */
440
-			sdmmc3_clk_pa6 {
442
+			sdmmc3-clk-pa6 {
441443 				nvidia,pins = "sdmmc3_clk_pa6";
442444 				nvidia,function = "sdmmc3";
443445 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444446 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
445447 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
446448 			};
447
-			sdmmc3_cmd_pa7 {
449
+			sdmmc3-cmd-pa7 {
448450 				nvidia,pins = "sdmmc3_cmd_pa7";
449451 				nvidia,function = "sdmmc3";
450452 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
451453 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
452454 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
453455 			};
454
-			sdmmc3_dat3_pb4 {
456
+			sdmmc3-dat3-pb4 {
455457 				nvidia,pins = "sdmmc3_dat3_pb4";
456458 				nvidia,function = "sdmmc3";
457459 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
458460 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
459461 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
460462 			};
461
-			sdmmc3_dat2_pb5 {
463
+			sdmmc3-dat2-pb5 {
462464 				nvidia,pins = "sdmmc3_dat2_pb5";
463465 				nvidia,function = "sdmmc3";
464466 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
465467 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
466468 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
467469 			};
468
-			sdmmc3_dat1_pb6 {
470
+			sdmmc3-dat1-pb6 {
469471 				nvidia,pins = "sdmmc3_dat1_pb6";
470472 				nvidia,function = "sdmmc3";
471473 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
472474 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
473475 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
474476 			};
475
-			sdmmc3_dat0_pb7 {
477
+			sdmmc3-dat0-pb7 {
476478 				nvidia,pins = "sdmmc3_dat0_pb7";
477479 				nvidia,function = "sdmmc3";
478480 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
479481 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
480482 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
481483 			};
482
-			sdmmc3_cd_n_pv2 { /* CD# GPIO */
484
+			sdmmc3-cd-n-pv2 { /* CD# GPIO */
483485 				nvidia,pins = "sdmmc3_cd_n_pv2";
484486 				nvidia,function = "rsvd3";
485487 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -488,14 +490,14 @@
488490 			};
489491 
490492 			/* Apalis SPDIF */
491
-			spdif_out_pk5 {
493
+			spdif-out-pk5 {
492494 				nvidia,pins = "spdif_out_pk5";
493495 				nvidia,function = "spdif";
494496 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
495497 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
496498 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
497499 			};
498
-			spdif_in_pk6 {
500
+			spdif-in-pk6 {
499501 				nvidia,pins = "spdif_in_pk6";
500502 				nvidia,function = "spdif";
501503 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -504,28 +506,28 @@
504506 			};
505507 
506508 			/* Apalis SPI1 */
507
-			ulpi_clk_py0 {
509
+			ulpi-clk-py0 {
508510 				nvidia,pins = "ulpi_clk_py0";
509511 				nvidia,function = "spi1";
510512 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
511513 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
512514 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
513515 			};
514
-			ulpi_dir_py1 {
516
+			ulpi-dir-py1 {
515517 				nvidia,pins = "ulpi_dir_py1";
516518 				nvidia,function = "spi1";
517519 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
518520 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
519521 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
520522 			};
521
-			ulpi_nxt_py2 {
523
+			ulpi-nxt-py2 {
522524 				nvidia,pins = "ulpi_nxt_py2";
523525 				nvidia,function = "spi1";
524526 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
525527 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
526528 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
527529 			};
528
-			ulpi_stp_py3 {
530
+			ulpi-stp-py3 {
529531 				nvidia,pins = "ulpi_stp_py3";
530532 				nvidia,function = "spi1";
531533 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -578,42 +580,42 @@
578580 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
579581 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
580582 			};
581
-			uart1_txd_pu0 {
583
+			uart1-txd-pu0 {
582584 				nvidia,pins = "pu0";
583585 				nvidia,function = "uarta";
584586 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
585587 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
586588 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
587589 			};
588
-			uart1_rxd_pu1 {
590
+			uart1-rxd-pu1 {
589591 				nvidia,pins = "pu1";
590592 				nvidia,function = "uarta";
591593 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
592594 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
593595 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
594596 			};
595
-			uart1_cts_n_pu2 {
597
+			uart1-cts-n-pu2 {
596598 				nvidia,pins = "pu2";
597599 				nvidia,function = "uarta";
598600 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
599601 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
600602 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
601603 			};
602
-			uart1_rts_n_pu3 {
604
+			uart1-rts-n-pu3 {
603605 				nvidia,pins = "pu3";
604606 				nvidia,function = "uarta";
605607 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
606608 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
607609 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
608610 			};
609
-			uart3_cts_n_pa1 { /* DSR GPIO */
611
+			uart3-cts-n-pa1 { /* DSR GPIO */
610612 				nvidia,pins = "uart3_cts_n_pa1";
611613 				nvidia,function = "gmi";
612614 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613615 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
614616 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
615617 			};
616
-			uart3_rts_n_pc0 { /* DTR GPIO */
618
+			uart3-rts-n-pc0 { /* DTR GPIO */
617619 				nvidia,pins = "uart3_rts_n_pc0";
618620 				nvidia,function = "gmi";
619621 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -622,28 +624,28 @@
622624 			};
623625 
624626 			/* Apalis UART2 */
625
-			uart2_txd_pc2 {
627
+			uart2-txd-pc2 {
626628 				nvidia,pins = "uart2_txd_pc2";
627629 				nvidia,function = "irda";
628630 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
629631 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
630632 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
631633 			};
632
-			uart2_rxd_pc3 {
634
+			uart2-rxd-pc3 {
633635 				nvidia,pins = "uart2_rxd_pc3";
634636 				nvidia,function = "irda";
635637 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
636638 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
637639 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
638640 			};
639
-			uart2_cts_n_pj5 {
641
+			uart2-cts-n-pj5 {
640642 				nvidia,pins = "uart2_cts_n_pj5";
641643 				nvidia,function = "uartb";
642644 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
643645 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
644646 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
645647 			};
646
-			uart2_rts_n_pj6 {
648
+			uart2-rts-n-pj6 {
647649 				nvidia,pins = "uart2_rts_n_pj6";
648650 				nvidia,function = "uartb";
649651 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -652,14 +654,14 @@
652654 			};
653655 
654656 			/* Apalis UART3 */
655
-			uart3_txd_pw6 {
657
+			uart3-txd-pw6 {
656658 				nvidia,pins = "uart3_txd_pw6";
657659 				nvidia,function = "uartc";
658660 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
659661 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
660662 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
661663 			};
662
-			uart3_rxd_pw7 {
664
+			uart3-rxd-pw7 {
663665 				nvidia,pins = "uart3_rxd_pw7";
664666 				nvidia,function = "uartc";
665667 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -668,14 +670,14 @@
668670 			};
669671 
670672 			/* Apalis UART4 */
671
-			uart4_rxd_pb0 {
673
+			uart4-rxd-pb0 {
672674 				nvidia,pins = "pb0";
673675 				nvidia,function = "uartd";
674676 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
675677 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
676678 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
677679 			};
678
-			uart4_txd_pj7 {
680
+			uart4-txd-pj7 {
679681 				nvidia,pins = "pj7";
680682 				nvidia,function = "uartd";
681683 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -684,7 +686,7 @@
684686 			};
685687 
686688 			/* Apalis USBH_EN */
687
-			gen2_i2c_sda_pt6 {
689
+			gen2-i2c-sda-pt6 {
688690 				nvidia,pins = "gen2_i2c_sda_pt6";
689691 				nvidia,function = "rsvd2";
690692 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -703,7 +705,7 @@
703705 			};
704706 
705707 			/* Apalis USBO1_EN */
706
-			gen2_i2c_scl_pt5 {
708
+			gen2-i2c-scl-pt5 {
707709 				nvidia,pins = "gen2_i2c_scl_pt5";
708710 				nvidia,function = "rsvd2";
709711 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -722,7 +724,7 @@
722724 			};
723725 
724726 			/* Apalis WAKE1_MICO */
725
-			pex_wake_n_pdd3 {
727
+			pex-wake-n-pdd3 {
726728 				nvidia,pins = "pex_wake_n_pdd3";
727729 				nvidia,function = "rsvd2";
728730 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -731,7 +733,7 @@
731733 			};
732734 
733735 			/* CORE_PWR_REQ */
734
-			core_pwr_req {
736
+			core-pwr-req {
735737 				nvidia,pins = "core_pwr_req";
736738 				nvidia,function = "pwron";
737739 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -740,7 +742,7 @@
740742 			};
741743 
742744 			/* CPU_PWR_REQ */
743
-			cpu_pwr_req {
745
+			cpu-pwr-req {
744746 				nvidia,pins = "cpu_pwr_req";
745747 				nvidia,function = "cpu";
746748 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -749,14 +751,14 @@
749751 			};
750752 
751753 			/* DVFS */
752
-			dvfs_pwm_px0 {
754
+			dvfs-pwm-px0 {
753755 				nvidia,pins = "dvfs_pwm_px0";
754756 				nvidia,function = "cldvfs";
755757 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
756758 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
757759 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
758760 			};
759
-			dvfs_clk_px2 {
761
+			dvfs-clk-px2 {
760762 				nvidia,pins = "dvfs_clk_px2";
761763 				nvidia,function = "cldvfs";
762764 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -765,70 +767,70 @@
765767 			};
766768 
767769 			/* eMMC */
768
-			sdmmc4_dat0_paa0 {
770
+			sdmmc4-dat0-paa0 {
769771 				nvidia,pins = "sdmmc4_dat0_paa0";
770772 				nvidia,function = "sdmmc4";
771773 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
772774 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
773775 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
774776 			};
775
-			sdmmc4_dat1_paa1 {
777
+			sdmmc4-dat1-paa1 {
776778 				nvidia,pins = "sdmmc4_dat1_paa1";
777779 				nvidia,function = "sdmmc4";
778780 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
779781 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
780782 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
781783 			};
782
-			sdmmc4_dat2_paa2 {
784
+			sdmmc4-dat2-paa2 {
783785 				nvidia,pins = "sdmmc4_dat2_paa2";
784786 				nvidia,function = "sdmmc4";
785787 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
786788 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
787789 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
788790 			};
789
-			sdmmc4_dat3_paa3 {
791
+			sdmmc4-dat3-paa3 {
790792 				nvidia,pins = "sdmmc4_dat3_paa3";
791793 				nvidia,function = "sdmmc4";
792794 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
793795 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
794796 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
795797 			};
796
-			sdmmc4_dat4_paa4 {
798
+			sdmmc4-dat4-paa4 {
797799 				nvidia,pins = "sdmmc4_dat4_paa4";
798800 				nvidia,function = "sdmmc4";
799801 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
800802 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
801803 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
802804 			};
803
-			sdmmc4_dat5_paa5 {
805
+			sdmmc4-dat5-paa5 {
804806 				nvidia,pins = "sdmmc4_dat5_paa5";
805807 				nvidia,function = "sdmmc4";
806808 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
807809 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
808810 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
809811 			};
810
-			sdmmc4_dat6_paa6 {
812
+			sdmmc4-dat6-paa6 {
811813 				nvidia,pins = "sdmmc4_dat6_paa6";
812814 				nvidia,function = "sdmmc4";
813815 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
814816 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
815817 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
816818 			};
817
-			sdmmc4_dat7_paa7 {
819
+			sdmmc4-dat7-paa7 {
818820 				nvidia,pins = "sdmmc4_dat7_paa7";
819821 				nvidia,function = "sdmmc4";
820822 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
821823 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
822824 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
823825 			};
824
-			sdmmc4_clk_pcc4 {
826
+			sdmmc4-clk-pcc4 {
825827 				nvidia,pins = "sdmmc4_clk_pcc4";
826828 				nvidia,function = "sdmmc4";
827829 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
828830 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
829831 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
830832 			};
831
-			sdmmc4_cmd_pt7 {
833
+			sdmmc4-cmd-pt7 {
832834 				nvidia,pins = "sdmmc4_cmd_pt7";
833835 				nvidia,function = "sdmmc4";
834836 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -837,7 +839,7 @@
837839 			};
838840 
839841 			/* JTAG_RTCK */
840
-			jtag_rtck {
842
+			jtag-rtck {
841843 				nvidia,pins = "jtag_rtck";
842844 				nvidia,function = "rtck";
843845 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -846,7 +848,7 @@
846848 			};
847849 
848850 			/* LAN_DEV_OFF# */
849
-			ulpi_data5_po6 {
851
+			ulpi-data5-po6 {
850852 				nvidia,pins = "ulpi_data5_po6";
851853 				nvidia,function = "ulpi";
852854 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -855,7 +857,7 @@
855857 			};
856858 
857859 			/* LAN_RESET# */
858
-			kb_row10_ps2 {
860
+			kb-row10-ps2 {
859861 				nvidia,pins = "kb_row10_ps2";
860862 				nvidia,function = "rsvd2";
861863 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -864,7 +866,7 @@
864866 			};
865867 
866868 			/* LAN_WAKE# */
867
-			ulpi_data4_po5 {
869
+			ulpi-data4-po5 {
868870 				nvidia,pins = "ulpi_data4_po5";
869871 				nvidia,function = "ulpi";
870872 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -918,35 +920,35 @@
918920 			};
919921 
920922 			/* MCU SPI */
921
-			gpio_x4_aud_px4 {
923
+			gpio-x4-aud-px4 {
922924 				nvidia,pins = "gpio_x4_aud_px4";
923925 				nvidia,function = "spi2";
924926 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
925927 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
926928 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
927929 			};
928
-			gpio_x5_aud_px5 {
930
+			gpio-x5-aud-px5 {
929931 				nvidia,pins = "gpio_x5_aud_px5";
930932 				nvidia,function = "spi2";
931933 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
932934 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
933935 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
934936 			};
935
-			gpio_x6_aud_px6 { /* MCU_CS */
937
+			gpio-x6-aud-px6 { /* MCU_CS */
936938 				nvidia,pins = "gpio_x6_aud_px6";
937939 				nvidia,function = "spi2";
938940 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
939941 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
940942 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
941943 			};
942
-			gpio_x7_aud_px7 {
944
+			gpio-x7-aud-px7 {
943945 				nvidia,pins = "gpio_x7_aud_px7";
944946 				nvidia,function = "spi2";
945947 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
946948 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
947949 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
948950 			};
949
-			gpio_w2_aud_pw2 { /* MCU_CSEZP */
951
+			gpio-w2-aud-pw2 { /* MCU_CSEZP */
950952 				nvidia,pins = "gpio_w2_aud_pw2";
951953 				nvidia,function = "spi2";
952954 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -955,7 +957,7 @@
955957 			};
956958 
957959 			/* PMIC_CLK_32K */
958
-			clk_32k_in {
960
+			clk-32k-in {
959961 				nvidia,pins = "clk_32k_in";
960962 				nvidia,function = "clk";
961963 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -964,7 +966,7 @@
964966 			};
965967 
966968 			/* PMIC_CPU_OC_INT */
967
-			clk_32k_out_pa0 {
969
+			clk-32k-out-pa0 {
968970 				nvidia,pins = "clk_32k_out_pa0";
969971 				nvidia,function = "soc";
970972 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -973,7 +975,7 @@
973975 			};
974976 
975977 			/* PWR_I2C */
976
-			pwr_i2c_scl_pz6 {
978
+			pwr-i2c-scl-pz6 {
977979 				nvidia,pins = "pwr_i2c_scl_pz6";
978980 				nvidia,function = "i2cpwr";
979981 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -981,7 +983,7 @@
981983 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
982984 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
983985 			};
984
-			pwr_i2c_sda_pz7 {
986
+			pwr-i2c-sda-pz7 {
985987 				nvidia,pins = "pwr_i2c_sda_pz7";
986988 				nvidia,function = "i2cpwr";
987989 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -991,7 +993,7 @@
991993 			};
992994 
993995 			/* PWR_INT_N */
994
-			pwr_int_n {
996
+			pwr-int-n {
995997 				nvidia,pins = "pwr_int_n";
996998 				nvidia,function = "pmi";
997999 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -1009,7 +1011,7 @@
10091011 			};
10101012 
10111013 			/* RESET_OUT_N */
1012
-			reset_out_n {
1014
+			reset-out-n {
10131015 				nvidia,pins = "reset_out_n";
10141016 				nvidia,function = "reset_out_n";
10151017 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1018,14 +1020,14 @@
10181020 			};
10191021 
10201022 			/* SHIFT_CTRL_DIR_IN */
1021
-			kb_row0_pr0 {
1023
+			kb-row0-pr0 {
10221024 				nvidia,pins = "kb_row0_pr0";
10231025 				nvidia,function = "rsvd2";
10241026 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
10251027 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10261028 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10271029 			};
1028
-			kb_row1_pr1 {
1030
+			kb-row1-pr1 {
10291031 				nvidia,pins = "kb_row1_pr1";
10301032 				nvidia,function = "rsvd2";
10311033 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1034,7 +1036,7 @@
10341036 			};
10351037 
10361038 			/* Configure level-shifter as output for HDA */
1037
-			kb_row11_ps3 {
1039
+			kb-row11-ps3 {
10381040 				nvidia,pins = "kb_row11_ps3";
10391041 				nvidia,function = "rsvd2";
10401042 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -1043,21 +1045,21 @@
10431045 			};
10441046 
10451047 			/* SHIFT_CTRL_DIR_OUT */
1046
-			kb_col5_pq5 {
1048
+			kb-col5-pq5 {
10471049 				nvidia,pins = "kb_col5_pq5";
10481050 				nvidia,function = "rsvd2";
10491051 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
10501052 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10511053 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10521054 			};
1053
-			kb_col6_pq6 {
1055
+			kb-col6-pq6 {
10541056 				nvidia,pins = "kb_col6_pq6";
10551057 				nvidia,function = "rsvd2";
10561058 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
10571059 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10581060 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10591061 			};
1060
-			kb_col7_pq7 {
1062
+			kb-col7-pq7 {
10611063 				nvidia,pins = "kb_col7_pq7";
10621064 				nvidia,function = "rsvd2";
10631065 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -1066,35 +1068,35 @@
10661068 			};
10671069 
10681070 			/* SHIFT_CTRL_OE */
1069
-			kb_col0_pq0 {
1071
+			kb-col0-pq0 {
10701072 				nvidia,pins = "kb_col0_pq0";
10711073 				nvidia,function = "rsvd2";
10721074 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
10731075 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10741076 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10751077 			};
1076
-			kb_col1_pq1 {
1078
+			kb-col1-pq1 {
10771079 				nvidia,pins = "kb_col1_pq1";
10781080 				nvidia,function = "rsvd2";
10791081 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
10801082 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10811083 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10821084 			};
1083
-			kb_col2_pq2 {
1085
+			kb-col2-pq2 {
10841086 				nvidia,pins = "kb_col2_pq2";
10851087 				nvidia,function = "rsvd2";
10861088 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
10871089 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10881090 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10891091 			};
1090
-			kb_col4_pq4 {
1092
+			kb-col4-pq4 {
10911093 				nvidia,pins = "kb_col4_pq4";
10921094 				nvidia,function = "kbc";
10931095 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
10941096 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10951097 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10961098 			};
1097
-			kb_row2_pr2 {
1099
+			kb-row2-pr2 {
10981100 				nvidia,pins = "kb_row2_pr2";
10991101 				nvidia,function = "rsvd2";
11001102 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1112,7 +1114,7 @@
11121114 			};
11131115 
11141116 			/* TOUCH_INT */
1115
-			gpio_w3_aud_pw3 {
1117
+			gpio-w3-aud-pw3 {
11161118 				nvidia,pins = "gpio_w3_aud_pw3";
11171119 				nvidia,function = "spi6";
11181120 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1253,189 +1255,189 @@
12531255 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12541256 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12551257 			};
1256
-			dap1_fs_pn0 { /* NC */
1258
+			dap1-fs-pn0 { /* NC */
12571259 				nvidia,pins = "dap1_fs_pn0";
12581260 				nvidia,function = "rsvd4";
12591261 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12601262 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12611263 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12621264 			};
1263
-			dap1_din_pn1 { /* NC */
1265
+			dap1-din-pn1 { /* NC */
12641266 				nvidia,pins = "dap1_din_pn1";
12651267 				nvidia,function = "rsvd4";
12661268 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12671269 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12681270 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12691271 			};
1270
-			dap1_sclk_pn3 { /* NC */
1272
+			dap1-sclk-pn3 { /* NC */
12711273 				nvidia,pins = "dap1_sclk_pn3";
12721274 				nvidia,function = "rsvd4";
12731275 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12741276 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12751277 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12761278 			};
1277
-			ulpi_data7_po0 { /* NC */
1279
+			ulpi-data7-po0 { /* NC */
12781280 				nvidia,pins = "ulpi_data7_po0";
12791281 				nvidia,function = "ulpi";
12801282 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12811283 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12821284 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12831285 			};
1284
-			ulpi_data0_po1 { /* NC */
1286
+			ulpi-data0-po1 { /* NC */
12851287 				nvidia,pins = "ulpi_data0_po1";
12861288 				nvidia,function = "ulpi";
12871289 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12881290 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12891291 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12901292 			};
1291
-			ulpi_data1_po2 { /* NC */
1293
+			ulpi-data1-po2 { /* NC */
12921294 				nvidia,pins = "ulpi_data1_po2";
12931295 				nvidia,function = "ulpi";
12941296 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12951297 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12961298 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12971299 			};
1298
-			ulpi_data2_po3 { /* NC */
1300
+			ulpi-data2-po3 { /* NC */
12991301 				nvidia,pins = "ulpi_data2_po3";
13001302 				nvidia,function = "ulpi";
13011303 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13021304 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13031305 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13041306 			};
1305
-			ulpi_data3_po4 { /* NC */
1307
+			ulpi-data3-po4 { /* NC */
13061308 				nvidia,pins = "ulpi_data3_po4";
13071309 				nvidia,function = "ulpi";
13081310 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13091311 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13101312 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13111313 			};
1312
-			ulpi_data6_po7 { /* NC */
1314
+			ulpi-data6-po7 { /* NC */
13131315 				nvidia,pins = "ulpi_data6_po7";
13141316 				nvidia,function = "ulpi";
13151317 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13161318 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13171319 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13181320 			};
1319
-			dap4_fs_pp4 { /* NC */
1321
+			dap4-fs-pp4 { /* NC */
13201322 				nvidia,pins = "dap4_fs_pp4";
13211323 				nvidia,function = "rsvd4";
13221324 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13231325 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13241326 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13251327 			};
1326
-			dap4_din_pp5 { /* NC */
1328
+			dap4-din-pp5 { /* NC */
13271329 				nvidia,pins = "dap4_din_pp5";
13281330 				nvidia,function = "rsvd3";
13291331 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13301332 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13311333 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13321334 			};
1333
-			dap4_dout_pp6 { /* NC */
1335
+			dap4-dout-pp6 { /* NC */
13341336 				nvidia,pins = "dap4_dout_pp6";
13351337 				nvidia,function = "rsvd4";
13361338 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13371339 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13381340 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13391341 			};
1340
-			dap4_sclk_pp7 { /* NC */
1342
+			dap4-sclk-pp7 { /* NC */
13411343 				nvidia,pins = "dap4_sclk_pp7";
13421344 				nvidia,function = "rsvd3";
13431345 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13441346 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13451347 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13461348 			};
1347
-			kb_col3_pq3 { /* NC */
1349
+			kb-col3-pq3 { /* NC */
13481350 				nvidia,pins = "kb_col3_pq3";
13491351 				nvidia,function = "kbc";
13501352 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13511353 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13521354 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13531355 			};
1354
-			kb_row3_pr3 { /* NC */
1356
+			kb-row3-pr3 { /* NC */
13551357 				nvidia,pins = "kb_row3_pr3";
13561358 				nvidia,function = "kbc";
13571359 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13581360 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13591361 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13601362 			};
1361
-			kb_row4_pr4 { /* NC */
1363
+			kb-row4-pr4 { /* NC */
13621364 				nvidia,pins = "kb_row4_pr4";
13631365 				nvidia,function = "rsvd3";
13641366 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13651367 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13661368 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13671369 			};
1368
-			kb_row5_pr5 { /* NC */
1370
+			kb-row5-pr5 { /* NC */
13691371 				nvidia,pins = "kb_row5_pr5";
13701372 				nvidia,function = "rsvd3";
13711373 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13721374 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13731375 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13741376 			};
1375
-			kb_row6_pr6 { /* NC */
1377
+			kb-row6-pr6 { /* NC */
13761378 				nvidia,pins = "kb_row6_pr6";
13771379 				nvidia,function = "kbc";
13781380 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13791381 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13801382 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13811383 			};
1382
-			kb_row7_pr7 { /* NC */
1384
+			kb-row7-pr7 { /* NC */
13831385 				nvidia,pins = "kb_row7_pr7";
13841386 				nvidia,function = "rsvd2";
13851387 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13861388 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13871389 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13881390 			};
1389
-			kb_row8_ps0 { /* NC */
1391
+			kb-row8-ps0 { /* NC */
13901392 				nvidia,pins = "kb_row8_ps0";
13911393 				nvidia,function = "rsvd2";
13921394 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13931395 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13941396 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13951397 			};
1396
-			kb_row9_ps1 { /* NC */
1398
+			kb-row9-ps1 { /* NC */
13971399 				nvidia,pins = "kb_row9_ps1";
13981400 				nvidia,function = "rsvd2";
13991401 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14001402 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14011403 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14021404 			};
1403
-			kb_row12_ps4 { /* NC */
1405
+			kb-row12-ps4 { /* NC */
14041406 				nvidia,pins = "kb_row12_ps4";
14051407 				nvidia,function = "rsvd2";
14061408 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14071409 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14081410 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14091411 			};
1410
-			kb_row13_ps5 { /* NC */
1412
+			kb-row13-ps5 { /* NC */
14111413 				nvidia,pins = "kb_row13_ps5";
14121414 				nvidia,function = "rsvd2";
14131415 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14141416 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14151417 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14161418 			};
1417
-			kb_row14_ps6 { /* NC */
1419
+			kb-row14-ps6 { /* NC */
14181420 				nvidia,pins = "kb_row14_ps6";
14191421 				nvidia,function = "rsvd2";
14201422 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14211423 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14221424 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14231425 			};
1424
-			kb_row15_ps7 { /* NC */
1426
+			kb-row15-ps7 { /* NC */
14251427 				nvidia,pins = "kb_row15_ps7";
14261428 				nvidia,function = "rsvd3";
14271429 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14281430 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14291431 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14301432 			};
1431
-			kb_row16_pt0 { /* NC */
1433
+			kb-row16-pt0 { /* NC */
14321434 				nvidia,pins = "kb_row16_pt0";
14331435 				nvidia,function = "rsvd2";
14341436 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14351437 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14361438 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14371439 			};
1438
-			kb_row17_pt1 { /* NC */
1440
+			kb-row17-pt1 { /* NC */
14391441 				nvidia,pins = "kb_row17_pt1";
14401442 				nvidia,function = "rsvd2";
14411443 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1467,14 +1469,14 @@
14671469 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14681470 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14691471 			};
1470
-			gpio_x1_aud_px1 { /* NC */
1472
+			gpio-x1-aud-px1 { /* NC */
14711473 				nvidia,pins = "gpio_x1_aud_px1";
14721474 				nvidia,function = "rsvd2";
14731475 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14741476 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14751477 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14761478 			};
1477
-			gpio_x3_aud_px3 { /* NC */
1479
+			gpio-x3-aud-px3 { /* NC */
14781480 				nvidia,pins = "gpio_x3_aud_px3";
14791481 				nvidia,function = "rsvd4";
14801482 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1502,14 +1504,14 @@
15021504 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
15031505 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
15041506 			};
1505
-			clk3_req_pee1 { /* NC */
1507
+			clk3-req-pee1 { /* NC */
15061508 				nvidia,pins = "clk3_req_pee1";
15071509 				nvidia,function = "rsvd2";
15081510 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
15091511 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
15101512 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
15111513 			};
1512
-			dap_mclk1_req_pee2 { /* NC */
1514
+			dap-mclk1-req-pee2 { /* NC */
15131515 				nvidia,pins = "dap_mclk1_req_pee2";
15141516 				nvidia,function = "rsvd4";
15151517 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1525,7 +1527,7 @@
15251527 			 * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
15261528 			 * bits being set to 0xfffd according to the TRM!
15271529 			 */
1528
-			sdmmc3_clk_lb_out_pee4 { /* NC */
1530
+			sdmmc3-clk-lb-out-pee4 { /* NC */
15291531 				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
15301532 				nvidia,function = "sdmmc3";
15311533 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1560,8 +1562,10 @@
15601562 		sgtl5000: codec@a {
15611563 			compatible = "fsl,sgtl5000";
15621564 			reg = <0x0a>;
1563
-			VDDA-supply = <&reg_3v3>;
1564
-			VDDIO-supply = <&vddio_1v8>;
1565
+			#sound-dai-cells = <0>;
1566
+			VDDA-supply = <&reg_module_3v3_audio>;
1567
+			VDDD-supply = <&reg_1v8_vddio>;
1568
+			VDDIO-supply = <&reg_1v8_vddio>;
15651569 			clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
15661570 		};
15671571 
....@@ -1578,14 +1582,14 @@
15781582 			pinctrl-0 = <&as3722_default>;
15791583 
15801584 			as3722_default: pinmux {
1581
-				gpio2_7 {
1585
+				gpio2-7 {
15821586 					pins = "gpio2", /* PWR_EN_+V3.3 */
15831587 					       "gpio7"; /* +V1.6_LPO */
15841588 					function = "gpio";
15851589 					bias-pull-up;
15861590 				};
15871591 
1588
-				gpio0_1_3_4_5_6 {
1592
+				gpio0-1-3-4-5-6 {
15891593 					pins = "gpio0", "gpio1", "gpio3",
15901594 					       "gpio4", "gpio5", "gpio6";
15911595 					bias-high-impedance;
....@@ -1593,18 +1597,18 @@
15931597 			};
15941598 
15951599 			regulators {
1596
-				vsup-sd2-supply = <&reg_3v3>;
1597
-				vsup-sd3-supply = <&reg_3v3>;
1598
-				vsup-sd4-supply = <&reg_3v3>;
1599
-				vsup-sd5-supply = <&reg_3v3>;
1600
-				vin-ldo0-supply = <&vddio_ddr_1v35>;
1601
-				vin-ldo1-6-supply = <&reg_3v3>;
1602
-				vin-ldo2-5-7-supply = <&vddio_1v8>;
1603
-				vin-ldo3-4-supply = <&reg_3v3>;
1604
-				vin-ldo9-10-supply = <&reg_3v3>;
1605
-				vin-ldo11-supply = <&reg_3v3>;
1600
+				vsup-sd2-supply = <&reg_module_3v3>;
1601
+				vsup-sd3-supply = <&reg_module_3v3>;
1602
+				vsup-sd4-supply = <&reg_module_3v3>;
1603
+				vsup-sd5-supply = <&reg_module_3v3>;
1604
+				vin-ldo0-supply = <&reg_1v35_vddio_ddr>;
1605
+				vin-ldo1-6-supply = <&reg_module_3v3>;
1606
+				vin-ldo2-5-7-supply = <&reg_1v8_vddio>;
1607
+				vin-ldo3-4-supply = <&reg_module_3v3>;
1608
+				vin-ldo9-10-supply = <&reg_module_3v3>;
1609
+				vin-ldo11-supply = <&reg_module_3v3>;
16061610 
1607
-				vdd_cpu: sd0 {
1611
+				reg_vdd_cpu: sd0 {
16081612 					regulator-name = "+VDD_CPU_AP";
16091613 					regulator-min-microvolt = <700000>;
16101614 					regulator-max-microvolt = <1400000>;
....@@ -1626,7 +1630,7 @@
16261630 					ams,ext-control = <1>;
16271631 				};
16281632 
1629
-				vddio_ddr_1v35: sd2 {
1633
+				reg_1v35_vddio_ddr: sd2 {
16301634 					regulator-name =
16311635 						"+V1.35_VDDIO_DDR(sd2)";
16321636 					regulator-min-microvolt = <1350000>;
....@@ -1644,13 +1648,13 @@
16441648 					regulator-boot-on;
16451649 				};
16461650 
1647
-				vdd_1v05: sd4 {
1651
+				reg_1v05_vdd: sd4 {
16481652 					regulator-name = "+V1.05";
16491653 					regulator-min-microvolt = <1050000>;
16501654 					regulator-max-microvolt = <1050000>;
16511655 				};
16521656 
1653
-				vddio_1v8: sd5 {
1657
+				reg_1v8_vddio: sd5 {
16541658 					regulator-name = "+V1.8";
16551659 					regulator-min-microvolt = <1800000>;
16561660 					regulator-max-microvolt = <1800000>;
....@@ -1658,7 +1662,7 @@
16581662 					regulator-always-on;
16591663 				};
16601664 
1661
-				vdd_gpu: sd6 {
1665
+				reg_vdd_gpu: sd6 {
16621666 					regulator-name = "+VDD_GPU_AP";
16631667 					regulator-min-microvolt = <650000>;
16641668 					regulator-max-microvolt = <1200000>;
....@@ -1668,7 +1672,7 @@
16681672 					regulator-always-on;
16691673 				};
16701674 
1671
-				avdd_1v05: ldo0 {
1675
+				reg_1v05_avdd: ldo0 {
16721676 					regulator-name = "+V1.05_AVDD";
16731677 					regulator-min-microvolt = <1050000>;
16741678 					regulator-max-microvolt = <1050000>;
....@@ -1743,12 +1747,13 @@
17431747 		 * TMP451 temperature sensor
17441748 		 * Note: THERM_N directly connected to AS3722 PMIC THERM
17451749 		 */
1746
-		temperature-sensor@4c {
1750
+		temp-sensor@4c {
17471751 			compatible = "ti,tmp451";
17481752 			reg = <0x4c>;
17491753 			interrupt-parent = <&gpio>;
17501754 			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
17511755 			#thermal-sensor-cells = <1>;
1756
+			vcc-supply = <&reg_module_3v3>;
17521757 		};
17531758 	};
17541759 
....@@ -1780,9 +1785,9 @@
17801785 	sata@70020000 {
17811786 		phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
17821787 		phy-names = "sata-0";
1783
-		avdd-supply = <&vdd_1v05>;
1784
-		hvdd-supply = <&reg_3v3>;
1785
-		vddio-supply = <&vdd_1v05>;
1788
+		avdd-supply = <&reg_1v05_vdd>;
1789
+		hvdd-supply = <&reg_module_3v3>;
1790
+		vddio-supply = <&reg_1v05_vdd>;
17861791 	};
17871792 
17881793 	usb@70090000 {
....@@ -1793,35 +1798,41 @@
17931798 		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
17941799 		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
17951800 		phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
1796
-		avddio-pex-supply = <&vdd_1v05>;
1797
-		avdd-pll-erefe-supply = <&avdd_1v05>;
1798
-		avdd-pll-utmip-supply = <&vddio_1v8>;
1799
-		avdd-usb-ss-pll-supply = <&vdd_1v05>;
1800
-		avdd-usb-supply = <&reg_3v3>;
1801
-		dvddio-pex-supply = <&vdd_1v05>;
1802
-		hvdd-usb-ss-pll-e-supply = <&reg_3v3>;
1803
-		hvdd-usb-ss-supply = <&reg_3v3>;
1801
+
1802
+		avddio-pex-supply = <&reg_1v05_vdd>;
1803
+		avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1804
+		avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1805
+		avdd-usb-ss-pll-supply = <&reg_1v05_vdd>;
1806
+		avdd-usb-supply = <&reg_module_3v3>;
1807
+		dvddio-pex-supply = <&reg_1v05_vdd>;
1808
+		hvdd-usb-ss-pll-e-supply = <&reg_module_3v3>;
1809
+		hvdd-usb-ss-supply = <&reg_module_3v3>;
18041810 	};
18051811 
18061812 	padctl@7009f000 {
1813
+		avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1814
+		avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1815
+		avdd-pex-pll-supply = <&reg_1v05_vdd>;
1816
+		hvdd-pex-pll-e-supply = <&reg_module_3v3>;
1817
+
18071818 		pads {
18081819 			usb2 {
18091820 				status = "okay";
18101821 
18111822 				lanes {
18121823 					usb2-0 {
1813
-						nvidia,function = "xusb";
18141824 						status = "okay";
1825
+						nvidia,function = "xusb";
18151826 					};
18161827 
18171828 					usb2-1 {
1818
-						nvidia,function = "xusb";
18191829 						status = "okay";
1830
+						nvidia,function = "xusb";
18201831 					};
18211832 
18221833 					usb2-2 {
1823
-						nvidia,function = "xusb";
18241834 						status = "okay";
1835
+						nvidia,function = "xusb";
18251836 					};
18261837 				};
18271838 			};
....@@ -1831,28 +1842,28 @@
18311842 
18321843 				lanes {
18331844 					pcie-0 {
1834
-						nvidia,function = "usb3-ss";
18351845 						status = "okay";
1846
+						nvidia,function = "usb3-ss";
18361847 					};
18371848 
18381849 					pcie-1 {
1839
-						nvidia,function = "usb3-ss";
18401850 						status = "okay";
1851
+						nvidia,function = "usb3-ss";
18411852 					};
18421853 
18431854 					pcie-2 {
1844
-						nvidia,function = "pcie";
18451855 						status = "okay";
1856
+						nvidia,function = "pcie";
18461857 					};
18471858 
18481859 					pcie-3 {
1849
-						nvidia,function = "pcie";
18501860 						status = "okay";
1861
+						nvidia,function = "pcie";
18511862 					};
18521863 
18531864 					pcie-4 {
1854
-						nvidia,function = "pcie";
18551865 						status = "okay";
1866
+						nvidia,function = "pcie";
18561867 					};
18571868 				};
18581869 			};
....@@ -1862,8 +1873,8 @@
18621873 
18631874 				lanes {
18641875 					sata-0 {
1865
-						nvidia,function = "sata";
18661876 						status = "okay";
1877
+						nvidia,function = "sata";
18671878 					};
18681879 				};
18691880 			};
....@@ -1874,7 +1885,6 @@
18741885 			usb2-0 {
18751886 				status = "okay";
18761887 				mode = "otg";
1877
-
18781888 				vbus-supply = <&reg_usbo1_vbus>;
18791889 			};
18801890 
....@@ -1882,7 +1892,6 @@
18821892 			usb2-1 {
18831893 				status = "okay";
18841894 				mode = "host";
1885
-
18861895 				vbus-supply = <&reg_usbh_vbus>;
18871896 			};
18881897 
....@@ -1890,34 +1899,38 @@
18901899 			usb2-2 {
18911900 				status = "okay";
18921901 				mode = "host";
1893
-
18941902 				vbus-supply = <&reg_usbh_vbus>;
18951903 			};
18961904 
18971905 			usb3-0 {
1898
-				nvidia,usb2-companion = <2>;
18991906 				status = "okay";
1907
+				nvidia,usb2-companion = <2>;
1908
+				vbus-supply = <&reg_usbh_vbus>;
19001909 			};
19011910 
19021911 			usb3-1 {
1903
-				nvidia,usb2-companion = <0>;
19041912 				status = "okay";
1913
+				nvidia,usb2-companion = <0>;
1914
+				vbus-supply = <&reg_usbo1_vbus>;
19051915 			};
19061916 		};
19071917 	};
19081918 
19091919 	/* eMMC */
1910
-	sdhci@700b0600 {
1920
+	mmc@700b0600 {
19111921 		status = "okay";
19121922 		bus-width = <8>;
19131923 		non-removable;
1924
+		vmmc-supply = <&reg_module_3v3>; /* VCC */
1925
+		vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
1926
+		mmc-ddr-1_8v;
19141927 	};
19151928 
19161929 	/* CPU DFLL clock */
19171930 	clock@70110000 {
19181931 		status = "okay";
1919
-		vdd-cpu-supply = <&vdd_cpu>;
19201932 		nvidia,i2c-fs-rate = <400000>;
1933
+		vdd-cpu-supply = <&reg_vdd_cpu>;
19211934 	};
19221935 
19231936 	ahub@70300000 {
....@@ -1926,22 +1939,15 @@
19261939 		};
19271940 	};
19281941 
1929
-	clocks {
1930
-		compatible = "simple-bus";
1931
-		#address-cells = <1>;
1932
-		#size-cells = <0>;
1933
-
1934
-		clk32k_in: clock@0 {
1935
-			compatible = "fixed-clock";
1936
-			reg = <0>;
1937
-			#clock-cells = <0>;
1938
-			clock-frequency = <32768>;
1939
-		};
1942
+	clk32k_in: osc3 {
1943
+		compatible = "fixed-clock";
1944
+		#clock-cells = <0>;
1945
+		clock-frequency = <32768>;
19401946 	};
19411947 
19421948 	cpus {
19431949 		cpu@0 {
1944
-			vdd-cpu-supply = <&vdd_cpu>;
1950
+			vdd-cpu-supply = <&reg_vdd_cpu>;
19451951 		};
19461952 	};
19471953 
....@@ -1951,7 +1957,7 @@
19511957 		regulator-min-microvolt = <1050000>;
19521958 		regulator-max-microvolt = <1050000>;
19531959 		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1954
-		vin-supply = <&vdd_1v05>;
1960
+		vin-supply = <&reg_1v05_vdd>;
19551961 	};
19561962 
19571963 	reg_3v3_mxm: regulator-3v3-mxm {
....@@ -1963,7 +1969,15 @@
19631969 		regulator-boot-on;
19641970 	};
19651971 
1966
-	reg_3v3: regulator-3v3 {
1972
+	reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1973
+		compatible = "regulator-fixed";
1974
+		regulator-name = "+V3.3_AVDD_HDMI";
1975
+		regulator-min-microvolt = <3300000>;
1976
+		regulator-max-microvolt = <3300000>;
1977
+		vin-supply = <&reg_1v05_vdd>;
1978
+	};
1979
+
1980
+	reg_module_3v3: regulator-module-3v3 {
19671981 		compatible = "regulator-fixed";
19681982 		regulator-name = "+V3.3";
19691983 		regulator-min-microvolt = <3300000>;
....@@ -1976,12 +1990,12 @@
19761990 		vin-supply = <&reg_3v3_mxm>;
19771991 	};
19781992 
1979
-	reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1993
+	reg_module_3v3_audio: regulator-module-3v3-audio {
19801994 		compatible = "regulator-fixed";
1981
-		regulator-name = "+V3.3_AVDD_HDMI";
1995
+		regulator-name = "+V3.3_AUDIO_AVDD_S";
19821996 		regulator-min-microvolt = <3300000>;
19831997 		regulator-max-microvolt = <3300000>;
1984
-		vin-supply = <&vdd_1v05>;
1998
+		regulator-always-on;
19851999 	};
19862000 
19872001 	sound {
....@@ -1996,8 +2010,14 @@
19962010 		nvidia,audio-codec = <&sgtl5000>;
19972011 		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
19982012 			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1999
-			 <&tegra_car TEGRA124_CLK_EXTERN1>;
2013
+			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
20002014 		clock-names = "pll_a", "pll_a_out0", "mclk";
2015
+
2016
+		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2017
+				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2018
+
2019
+		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2020
+					 <&tegra_car TEGRA124_CLK_EXTERN1>;
20012021 	};
20022022 
20032023 	thermal-zones {
....@@ -2035,7 +2055,7 @@
20352055 
20362056 &gpio {
20372057 	/* I210 Gigabit Ethernet Controller Reset */
2038
-	lan_reset_n {
2058
+	lan-reset-n {
20392059 		gpio-hog;
20402060 		gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
20412061 		output-high;
....@@ -2043,7 +2063,7 @@
20432063 	};
20442064 
20452065 	/* Control MXM3 pin 26 Reset Module Output Carrier Input */
2046
-	reset_moci_ctrl {
2066
+	reset-moci-ctrl {
20472067 		gpio-hog;
20482068 		gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
20492069 		output-high;