add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
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@@ -79,8 +79,6 @@
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 	mmc0_pwrseq: mmc0_pwrseq {
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 		compatible = "mmc-pwrseq-simple";
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-		pinctrl-names = "default";
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-		pinctrl-0 = <&wifi_reg_on_pin_chip_pro>;
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 		reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
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 	};
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 };
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@@ -94,8 +92,6 @@
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 };
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 &i2c0 {
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-	pinctrl-names = "default";
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-	pinctrl-0 = <&i2c0_pins_a>;
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 	status = "okay";
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 	axp209: pmic@34 {
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@@ -114,20 +110,16 @@
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 #include "axp209.dtsi"
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 &i2c1 {
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-	pinctrl-names = "default";
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-	pinctrl-0 = <&i2c1_pins_a>;
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 	status = "disabled";
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 };
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 &i2s0 {
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 	pinctrl-names = "default";
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-	pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>;
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+	pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>;
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 	status = "disabled";
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 };
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 &mmc0 {
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-	pinctrl-names = "default";
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-	pinctrl-0 = <&mmc0_pins_a>;
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 	vmmc-supply = <&reg_vcc3v3>;
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 	mmc-pwrseq = <&mmc0_pwrseq>;
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 	bus-width = <4>;
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@@ -137,12 +129,10 @@
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 &nfc {
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 	pinctrl-names = "default";
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-	pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
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+	pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
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 	status = "okay";
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 	nand@0 {
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-		#address-cells = <2>;
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-		#size-cells = <2>;
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 		reg = <0>;
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 		allwinner,rb = <0>;
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 		nand-ecc-mode = "hw";
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@@ -157,21 +147,9 @@
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 	status = "okay";
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 };
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-&pio {
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-	usb0_id_pin_chip_pro: usb0-id-pin@0 {
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-		pins = "PG2";
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-		function = "gpio_in";
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-	};
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-
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-	wifi_reg_on_pin_chip_pro: wifi-reg-on-pin@0 {
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-		pins = "PB10";
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-		function = "gpio_out";
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-	};
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-};
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-
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 &pwm {
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 	pinctrl-names = "default";
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-	pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
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+	pinctrl-0 = <&pwm0_pin>, <&pwm1_pins>;
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 	status = "disabled";
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 };
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@@ -220,19 +198,19 @@
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 &uart1 {
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 	pinctrl-names = "default";
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-	pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>;
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+	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>;
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 	status = "okay";
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 };
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 &uart2 {
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 	pinctrl-names = "default";
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-	pinctrl-0 = <&uart2_pins_a>, <&uart2_cts_rts_pins_a>;
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+	pinctrl-0 = <&uart2_pd_pins>, <&uart2_cts_rts_pd_pins>;
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 	status = "disabled";
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 };
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 &uart3 {
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 	pinctrl-names = "default";
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-	pinctrl-0 = <&uart3_pins_a>, <&uart3_cts_rts_pins_a>;
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+	pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
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 	status = "okay";
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 };
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@@ -253,9 +231,7 @@
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 };
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 &usbphy {
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-	pinctrl-names = "default";
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-	pinctrl-0 = <&usb0_id_pin_chip_pro>;
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-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
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+	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
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 	usb0_vbus_power-supply = <&usb_power_supply>;
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 	usb1_vbus-supply = <&reg_vcc5v0>;
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 	status = "okay";