add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/stm32h743-pinctrl.dtsi
..
..
@@ -163,7 +163,7 @@
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 				#interrupt-cells = <2>;
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 			};
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-			i2c1_pins_a: i2c1@0 {
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+			i2c1_pins_a: i2c1-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
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 						 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
..
..
@@ -173,7 +173,90 @@
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 				};
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 			};
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-			usart1_pins: usart1@0 {
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+			ethernet_rmii: rmii-0 {
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+				pins {
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+					pinmux = <STM32_PINMUX('G', 11, AF11)>,
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+						 <STM32_PINMUX('G', 13, AF11)>,
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+						 <STM32_PINMUX('G', 12, AF11)>,
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+						 <STM32_PINMUX('C', 4, AF11)>,
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+						 <STM32_PINMUX('C', 5, AF11)>,
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+						 <STM32_PINMUX('A', 7, AF11)>,
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+						 <STM32_PINMUX('C', 1, AF11)>,
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+						 <STM32_PINMUX('A', 2, AF11)>,
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+						 <STM32_PINMUX('A', 1, AF11)>;
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+					slew-rate = <2>;
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+				};
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+			};
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+
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+			sdmmc1_b4_pins_a: sdmmc1-b4-0 {
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+				pins {
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+					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
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+						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
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+						 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
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+						 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
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+						 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
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+						 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
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+					slew-rate = <3>;
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+					drive-push-pull;
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+					bias-disable;
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+				};
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+			};
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+
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+			sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
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+				pins1 {
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+					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
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+						 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
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+						 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
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+						 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
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+						 <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
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+					slew-rate = <3>;
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+					drive-push-pull;
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+					bias-disable;
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+				};
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+				pins2{
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+					pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
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+					slew-rate = <3>;
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+					drive-open-drain;
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+					bias-disable;
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+				};
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+			};
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+
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+			sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
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+				pins {
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+					pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
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+						 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
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+						 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
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+						 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
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+						 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
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+						 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
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+				};
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+			};
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+
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+			sdmmc1_dir_pins_a: sdmmc1-dir-0 {
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+				pins1 {
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+					pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
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+						 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
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+						 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
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+					slew-rate = <3>;
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+					drive-push-pull;
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+					bias-pull-up;
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+				};
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+				pins2{
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+					pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
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+					bias-pull-up;
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+				};
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+			};
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+
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+			sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
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+				pins {
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+					pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
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+						 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
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+						 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
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+						 <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
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+				};
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+			};
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+
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+			usart1_pins: usart1-0 {
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 				pins1 {
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 					pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
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 					bias-disable;
..
..
@@ -186,7 +269,7 @@
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 				};
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 			};
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-			usart2_pins: usart2@0 {
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+			usart2_pins: usart2-0 {
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 				pins1 {
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 					pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
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 					bias-disable;
..
..
@@ -199,7 +282,7 @@
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 				};
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 			};
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-			usbotg_hs_pins_a: usbotg-hs@0 {
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+			usbotg_hs_pins_a: usbotg-hs-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('H', 4, AF10)>,	/* ULPI_NXT */
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 							 <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */