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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/ste-dbx5x0.dtsi
....@@ -1,12 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Copyright 2012 Linaro Ltd
3
- *
4
- * The code contained herein is licensed under the GNU General Public
5
- * License. You may obtain a copy of the GNU General Public License
6
- * Version 2 or later at the following locations:
7
- *
8
- * http://www.opensource.org/licenses/gpl-license.html
9
- * http://www.gnu.org/copyleft/gpl.html
104  */
115 
126 #include <dt-bindings/interrupt-controller/irq.h>
....@@ -14,10 +8,31 @@
148 #include <dt-bindings/mfd/dbx500-prcmu.h>
159 #include <dt-bindings/arm/ux500_pm_domains.h>
1610 #include <dt-bindings/gpio/gpio.h>
17
-#include <dt-bindings/clock/ste-ab8500.h>
18
-#include "skeleton.dtsi"
11
+#include <dt-bindings/thermal/thermal.h>
1912 
2013 / {
14
+	#address-cells = <1>;
15
+	#size-cells = <1>;
16
+
17
+	/* This stablilizes the device enumeration */
18
+	aliases {
19
+		i2c0 = &i2c0;
20
+		i2c1 = &i2c1;
21
+		i2c2 = &i2c2;
22
+		i2c3 = &i2c3;
23
+		i2c4 = &i2c4;
24
+		spi0 = &spi0;
25
+		spi1 = &spi1;
26
+		spi2 = &spi2;
27
+		spi3 = &spi3;
28
+		serial0 = &serial0;
29
+		serial1 = &serial1;
30
+		serial2 = &serial2;
31
+	};
32
+
33
+	chosen {
34
+	};
35
+
2136 	cpus {
2237 		#address-cells = <1>;
2338 		#size-cells = <0>;
....@@ -37,14 +52,10 @@
3752 			device_type = "cpu";
3853 			compatible = "arm,cortex-a9";
3954 			reg = <0x300>;
40
-			/* cpufreq controls */
41
-			operating-points = <998400 0
42
-					    800000 0
43
-					    400000 0
44
-					    200000 0>;
4555 			clocks = <&prcmu_clk PRCMU_ARMSS>;
4656 			clock-names = "cpu";
4757 			clock-latency = <20000>;
58
+			#cooling-cells = <2>;
4859 		};
4960 		CPU1: cpu@301 {
5061 			device_type = "cpu";
....@@ -53,10 +64,47 @@
5364 		};
5465 	};
5566 
67
+	thermal-zones {
68
+		/*
69
+		 * Thermal zone for the SoC, using the thermal sensor in the
70
+		 * PRCMU for temperature and the cpufreq driver for passive
71
+		 * cooling.
72
+		 */
73
+		cpu_thermal: cpu-thermal {
74
+			polling-delay-passive = <250>;
75
+			/*
76
+			 * This sensor fires interrupts to update the thermal
77
+			 * zone, so no polling is needed.
78
+			 */
79
+			polling-delay = <0>;
80
+
81
+			thermal-sensors = <&thermal>;
82
+
83
+			trips {
84
+				cpu_alert: cpu-alert {
85
+					temperature = <70000>;
86
+					hysteresis = <2000>;
87
+					type = "passive";
88
+				};
89
+				cpu-crit {
90
+					temperature = <85000>;
91
+					hysteresis = <0>;
92
+					type = "critical";
93
+				};
94
+			};
95
+
96
+			cooling-maps {
97
+				trip = <&cpu_alert>;
98
+				cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
99
+				contribution = <100>;
100
+			};
101
+		};
102
+	};
103
+
56104 	soc {
57105 		#address-cells = <1>;
58106 		#size-cells = <1>;
59
-		compatible = "stericsson,db8500";
107
+		compatible = "stericsson,db8500", "simple-bus";
60108 		interrupt-parent = <&intc>;
61109 		ranges;
62110 
....@@ -67,9 +115,11 @@
67115 			clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
68116 			clock-names = "apb_pclk", "atclk";
69117 			cpu = <&CPU0>;
70
-			port {
71
-				ptm0_out_port: endpoint {
72
-					remote-endpoint = <&funnel_in_port0>;
118
+			out-ports {
119
+				port {
120
+					ptm0_out_port: endpoint {
121
+						remote-endpoint = <&funnel_in_port0>;
122
+					};
73123 				};
74124 			};
75125 		};
....@@ -81,45 +131,44 @@
81131 			clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
82132 			clock-names = "apb_pclk", "atclk";
83133 			cpu = <&CPU1>;
84
-			port {
85
-				ptm1_out_port: endpoint {
86
-					remote-endpoint = <&funnel_in_port1>;
134
+			out-ports {
135
+				port {
136
+					ptm1_out_port: endpoint {
137
+						remote-endpoint = <&funnel_in_port1>;
138
+					};
87139 				};
88140 			};
89141 		};
90142 
91143 		funnel@801a6000 {
92
-			compatible = "arm,coresight-funnel", "arm,primecell";
144
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
93145 			reg = <0x801a6000 0x1000>;
94146 
95147 			clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
96148 			clock-names = "apb_pclk", "atclk";
97
-			ports {
98
-				#address-cells = <1>;
99
-				#size-cells = <0>;
100
-
101
-				/* funnel output ports */
102
-				port@0 {
103
-					reg = <0>;
149
+			out-ports {
150
+				port {
104151 					funnel_out_port: endpoint {
105152 						remote-endpoint =
106153 							<&replicator_in_port0>;
107154 					};
108155 				};
156
+			};
109157 
110
-				/* funnel input ports */
111
-				port@1 {
158
+			in-ports {
159
+				#address-cells = <1>;
160
+				#size-cells = <0>;
161
+
162
+				port@0 {
112163 					reg = <0>;
113164 					funnel_in_port0: endpoint {
114
-						slave-mode;
115165 						remote-endpoint = <&ptm0_out_port>;
116166 					};
117167 				};
118168 
119
-				port@2 {
169
+				port@1 {
120170 					reg = <1>;
121171 					funnel_in_port1: endpoint {
122
-						slave-mode;
123172 						remote-endpoint = <&ptm1_out_port>;
124173 					};
125174 				};
....@@ -127,15 +176,14 @@
127176 		};
128177 
129178 		replicator {
130
-			compatible = "arm,coresight-replicator";
179
+			compatible = "arm,coresight-static-replicator";
131180 			clocks = <&prcmu_clk PRCMU_APEATCLK>;
132181 			clock-names = "atclk";
133182 
134
-			ports {
183
+			out-ports {
135184 				#address-cells = <1>;
136185 				#size-cells = <0>;
137186 
138
-				/* replicator output ports */
139187 				port@0 {
140188 					reg = <0>;
141189 					replicator_out_port0: endpoint {
....@@ -148,12 +196,11 @@
148196 						remote-endpoint = <&etb_in_port>;
149197 					};
150198 				};
199
+			};
151200 
152
-				/* replicator input port */
153
-				port@2 {
154
-					reg = <0>;
201
+			in-ports {
202
+				port {
155203 					replicator_in_port0: endpoint {
156
-						slave-mode;
157204 						remote-endpoint = <&funnel_out_port>;
158205 					};
159206 				};
....@@ -166,10 +213,11 @@
166213 
167214 			clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
168215 			clock-names = "apb_pclk", "atclk";
169
-			port {
170
-				tpiu_in_port: endpoint {
171
-					slave-mode;
172
-					remote-endpoint = <&replicator_out_port0>;
216
+			in-ports {
217
+				port {
218
+					tpiu_in_port: endpoint {
219
+						remote-endpoint = <&replicator_out_port0>;
220
+					};
173221 				};
174222 			};
175223 		};
....@@ -180,10 +228,11 @@
180228 
181229 			clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
182230 			clock-names = "apb_pclk", "atclk";
183
-			port {
184
-				etb_in_port: endpoint {
185
-					slave-mode;
186
-					remote-endpoint = <&replicator_out_port1>;
231
+			in-ports {
232
+				port {
233
+					etb_in_port: endpoint {
234
+						remote-endpoint = <&replicator_out_port1>;
235
+					};
187236 				};
188237 			};
189238 		};
....@@ -211,7 +260,7 @@
211260 			reg = <0x80150000 0x2000>;
212261 		};
213262 
214
-		L2: l2-cache {
263
+		L2: cache-controller {
215264 			compatible = "arm,pl310-cache";
216265 			reg = <0xa0412000 0x1000>;
217266 			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
....@@ -286,7 +335,7 @@
286335 		};
287336 
288337 		rtc@80154000 {
289
-			compatible = "arm,rtc-pl031", "arm,primecell";
338
+			compatible = "arm,pl031", "arm,primecell";
290339 			reg = <0x80154000 0x1000>;
291340 			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
292341 
....@@ -487,7 +536,7 @@
487536 		};
488537 
489538 		prcmu: prcmu@80157000 {
490
-			compatible = "stericsson,db8500-prcmu";
539
+			compatible = "stericsson,db8500-prcmu", "syscon";
491540 			reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
492541 			reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
493542 			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
....@@ -502,13 +551,14 @@
502551 				reg = <0x80157450 0xC>;
503552 			};
504553 
505
-			thermal@801573c0 {
554
+			thermal: thermal@801573c0 {
506555 				compatible = "stericsson,db8500-thermal";
507556 				reg = <0x801573c0 0x40>;
557
+				interrupt-parent = <&prcmu>;
508558 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH>,
509559 					     <22 IRQ_TYPE_LEVEL_HIGH>;
510560 				interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH";
511
-				status = "disabled";
561
+				#thermal-sensor-cells = <0>;
512562 			};
513563 
514564 			db8500-prcmu-regulators {
....@@ -597,209 +647,9 @@
597647 				db8500_esram34_ret_reg: db8500_esram34_ret {
598648 				};
599649 			};
600
-
601
-			ab8500 {
602
-				compatible = "stericsson,ab8500";
603
-				interrupt-parent = <&intc>;
604
-				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
605
-				interrupt-controller;
606
-				#interrupt-cells = <2>;
607
-
608
-				ab8500_clock: clock-controller {
609
-					compatible = "stericsson,ab8500-clk";
610
-					#clock-cells = <1>;
611
-				};
612
-
613
-				ab8500_gpio: ab8500-gpio {
614
-					compatible = "stericsson,ab8500-gpio";
615
-					gpio-controller;
616
-					#gpio-cells = <2>;
617
-				};
618
-
619
-				ab8500-rtc {
620
-					compatible = "stericsson,ab8500-rtc";
621
-					interrupts = <17 IRQ_TYPE_LEVEL_HIGH
622
-						      18 IRQ_TYPE_LEVEL_HIGH>;
623
-					interrupt-names = "60S", "ALARM";
624
-				};
625
-
626
-				ab8500-gpadc {
627
-					compatible = "stericsson,ab8500-gpadc";
628
-					interrupts = <32 IRQ_TYPE_LEVEL_HIGH
629
-						      39 IRQ_TYPE_LEVEL_HIGH>;
630
-					interrupt-names = "HW_CONV_END", "SW_CONV_END";
631
-					vddadc-supply = <&ab8500_ldo_tvout_reg>;
632
-				};
633
-
634
-				ab8500_battery: ab8500_battery {
635
-					stericsson,battery-type = "LIPO";
636
-					thermistor-on-batctrl;
637
-				};
638
-
639
-				ab8500_fg {
640
-					compatible = "stericsson,ab8500-fg";
641
-					battery	   = <&ab8500_battery>;
642
-				};
643
-
644
-				ab8500_btemp {
645
-					compatible = "stericsson,ab8500-btemp";
646
-					battery	   = <&ab8500_battery>;
647
-				};
648
-
649
-				ab8500_charger {
650
-					compatible	= "stericsson,ab8500-charger";
651
-					battery		= <&ab8500_battery>;
652
-					vddadc-supply	= <&ab8500_ldo_tvout_reg>;
653
-				};
654
-
655
-				ab8500_chargalg {
656
-					compatible	= "stericsson,ab8500-chargalg";
657
-					battery		= <&ab8500_battery>;
658
-				};
659
-
660
-				ab8500_usb {
661
-					compatible = "stericsson,ab8500-usb";
662
-					interrupts = < 90 IRQ_TYPE_LEVEL_HIGH
663
-						       96 IRQ_TYPE_LEVEL_HIGH
664
-						       14 IRQ_TYPE_LEVEL_HIGH
665
-						       15 IRQ_TYPE_LEVEL_HIGH
666
-						       79 IRQ_TYPE_LEVEL_HIGH
667
-						       74 IRQ_TYPE_LEVEL_HIGH
668
-						       75 IRQ_TYPE_LEVEL_HIGH>;
669
-					interrupt-names = "ID_WAKEUP_R",
670
-							  "ID_WAKEUP_F",
671
-							  "VBUS_DET_F",
672
-							  "VBUS_DET_R",
673
-							  "USB_LINK_STATUS",
674
-							  "USB_ADP_PROBE_PLUG",
675
-							  "USB_ADP_PROBE_UNPLUG";
676
-					vddulpivio18-supply = <&ab8500_ldo_intcore_reg>;
677
-					v-ape-supply = <&db8500_vape_reg>;
678
-					musb_1v8-supply = <&db8500_vsmps2_reg>;
679
-					clocks = <&prcmu_clk PRCMU_SYSCLK>;
680
-					clock-names = "sysclk";
681
-				};
682
-
683
-				ab8500-ponkey {
684
-					compatible = "stericsson,ab8500-poweron-key";
685
-					interrupts = <6 IRQ_TYPE_LEVEL_HIGH
686
-						      7 IRQ_TYPE_LEVEL_HIGH>;
687
-					interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
688
-				};
689
-
690
-				ab8500-sysctrl {
691
-					compatible = "stericsson,ab8500-sysctrl";
692
-				};
693
-
694
-				ab8500-pwm {
695
-					compatible = "stericsson,ab8500-pwm";
696
-					clocks = <&ab8500_clock AB8500_SYSCLK_INT>;
697
-					clock-names = "intclk";
698
-				};
699
-
700
-				ab8500-debugfs {
701
-					compatible = "stericsson,ab8500-debug";
702
-				};
703
-
704
-				codec: ab8500-codec {
705
-					compatible = "stericsson,ab8500-codec";
706
-
707
-					V-AUD-supply = <&ab8500_ldo_audio_reg>;
708
-					V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>;
709
-					V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>;
710
-					V-DMIC-supply = <&ab8500_ldo_dmic_reg>;
711
-
712
-					clocks = <&ab8500_clock AB8500_SYSCLK_AUDIO>;
713
-					clock-names = "audioclk";
714
-
715
-					stericsson,earpeice-cmv = <950>; /* Units in mV. */
716
-				};
717
-
718
-				ext_regulators: ab8500-ext-regulators {
719
-					compatible = "stericsson,ab8500-ext-regulator";
720
-
721
-					ab8500_ext1_reg: ab8500_ext1 {
722
-						regulator-min-microvolt = <1800000>;
723
-						regulator-max-microvolt = <1800000>;
724
-						regulator-boot-on;
725
-						regulator-always-on;
726
-					};
727
-
728
-					ab8500_ext2_reg: ab8500_ext2 {
729
-						regulator-min-microvolt = <1360000>;
730
-						regulator-max-microvolt = <1360000>;
731
-						regulator-boot-on;
732
-						regulator-always-on;
733
-					};
734
-
735
-					ab8500_ext3_reg: ab8500_ext3 {
736
-						regulator-min-microvolt = <3400000>;
737
-						regulator-max-microvolt = <3400000>;
738
-						regulator-boot-on;
739
-					};
740
-				};
741
-
742
-				ab8500-regulators {
743
-					compatible = "stericsson,ab8500-regulator";
744
-					vin-supply = <&ab8500_ext3_reg>;
745
-
746
-					// supplies to the display/camera
747
-					ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
748
-						regulator-min-microvolt = <2500000>;
749
-						regulator-max-microvolt = <2900000>;
750
-						regulator-boot-on;
751
-						/* BUG: If turned off MMC will be affected. */
752
-						regulator-always-on;
753
-					};
754
-
755
-					// supplies to the on-board eMMC
756
-					ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
757
-						regulator-min-microvolt = <1100000>;
758
-						regulator-max-microvolt = <3300000>;
759
-					};
760
-
761
-					// supply for VAUX3; SDcard slots
762
-					ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
763
-						regulator-min-microvolt = <1100000>;
764
-						regulator-max-microvolt = <3300000>;
765
-					};
766
-
767
-					// supply for v-intcore12; VINTCORE12 LDO
768
-					ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
769
-					};
770
-
771
-					// supply for tvout; gpadc; TVOUT LDO
772
-					ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
773
-					};
774
-
775
-					// supply for ab8500-usb; USB LDO
776
-					ab8500_ldo_usb_reg: ab8500_ldo_usb {
777
-					};
778
-
779
-					// supply for ab8500-vaudio; VAUDIO LDO
780
-					ab8500_ldo_audio_reg: ab8500_ldo_audio {
781
-					};
782
-
783
-					// supply for v-anamic1 VAMIC1 LDO
784
-					ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
785
-					};
786
-
787
-					// supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1
788
-					ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
789
-					};
790
-
791
-					// supply for v-dmic; VDMIC LDO
792
-					ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
793
-					};
794
-
795
-					// supply for U8500 CSI/DSI; VANA LDO
796
-					ab8500_ldo_ana_reg: ab8500_ldo_ana {
797
-					};
798
-				};
799
-			};
800650 		};
801651 
802
-		i2c@80004000 {
652
+		i2c0: i2c@80004000 {
803653 			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
804654 			reg = <0x80004000 0x1000>;
805655 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
....@@ -812,9 +662,11 @@
812662 			clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
813663 			clock-names = "i2cclk", "apb_pclk";
814664 			power-domains = <&pm_domains DOMAIN_VAPE>;
665
+
666
+			status = "disabled";
815667 		};
816668 
817
-		i2c@80122000 {
669
+		i2c1: i2c@80122000 {
818670 			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
819671 			reg = <0x80122000 0x1000>;
820672 			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
....@@ -828,9 +680,11 @@
828680 			clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
829681 			clock-names = "i2cclk", "apb_pclk";
830682 			power-domains = <&pm_domains DOMAIN_VAPE>;
683
+
684
+			status = "disabled";
831685 		};
832686 
833
-		i2c@80128000 {
687
+		i2c2: i2c@80128000 {
834688 			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
835689 			reg = <0x80128000 0x1000>;
836690 			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
....@@ -844,9 +698,11 @@
844698 			clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
845699 			clock-names = "i2cclk", "apb_pclk";
846700 			power-domains = <&pm_domains DOMAIN_VAPE>;
701
+
702
+			status = "disabled";
847703 		};
848704 
849
-		i2c@80110000 {
705
+		i2c3: i2c@80110000 {
850706 			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
851707 			reg = <0x80110000 0x1000>;
852708 			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
....@@ -860,9 +716,11 @@
860716 			clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
861717 			clock-names = "i2cclk", "apb_pclk";
862718 			power-domains = <&pm_domains DOMAIN_VAPE>;
719
+
720
+			status = "disabled";
863721 		};
864722 
865
-		i2c@8012a000 {
723
+		i2c4: i2c@8012a000 {
866724 			compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
867725 			reg = <0x8012a000 0x1000>;
868726 			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
....@@ -876,9 +734,11 @@
876734 			clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
877735 			clock-names = "i2cclk", "apb_pclk";
878736 			power-domains = <&pm_domains DOMAIN_VAPE>;
737
+
738
+			status = "disabled";
879739 		};
880740 
881
-		spi@80002000 {
741
+		ssp0: spi@80002000 {
882742 			compatible = "arm,pl022", "arm,primecell";
883743 			reg = <0x80002000 0x1000>;
884744 			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
....@@ -890,9 +750,11 @@
890750 			       <&dma 8 0 0x0>; /* Logical - MemToDev */
891751 			dma-names = "rx", "tx";
892752 			power-domains = <&pm_domains DOMAIN_VAPE>;
753
+
754
+			status = "disabled";
893755 		};
894756 
895
-		spi@80003000 {
757
+		ssp1: spi@80003000 {
896758 			compatible = "arm,pl022", "arm,primecell";
897759 			reg = <0x80003000 0x1000>;
898760 			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
....@@ -904,9 +766,11 @@
904766 			       <&dma 9 0 0x0>; /* Logical - MemToDev */
905767 			dma-names = "rx", "tx";
906768 			power-domains = <&pm_domains DOMAIN_VAPE>;
769
+
770
+			status = "disabled";
907771 		};
908772 
909
-		spi@8011a000 {
773
+		spi0: spi@8011a000 {
910774 			compatible = "arm,pl022", "arm,primecell";
911775 			reg = <0x8011a000 0x1000>;
912776 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
....@@ -919,9 +783,11 @@
919783 			       <&dma 0 0 0x0>; /* Logical - MemToDev */
920784 			dma-names = "rx", "tx";
921785 			power-domains = <&pm_domains DOMAIN_VAPE>;
786
+
787
+			status = "disabled";
922788 		};
923789 
924
-		spi@80112000 {
790
+		spi1: spi@80112000 {
925791 			compatible = "arm,pl022", "arm,primecell";
926792 			reg = <0x80112000 0x1000>;
927793 			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
....@@ -934,9 +800,11 @@
934800 			       <&dma 35 0 0x0>; /* Logical - MemToDev */
935801 			dma-names = "rx", "tx";
936802 			power-domains = <&pm_domains DOMAIN_VAPE>;
803
+
804
+			status = "disabled";
937805 		};
938806 
939
-		spi@80111000 {
807
+		spi2: spi@80111000 {
940808 			compatible = "arm,pl022", "arm,primecell";
941809 			reg = <0x80111000 0x1000>;
942810 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
....@@ -949,9 +817,11 @@
949817 			       <&dma 33 0 0x0>; /* Logical - MemToDev */
950818 			dma-names = "rx", "tx";
951819 			power-domains = <&pm_domains DOMAIN_VAPE>;
820
+
821
+			status = "disabled";
952822 		};
953823 
954
-		spi@80129000 {
824
+		spi3: spi@80129000 {
955825 			compatible = "arm,pl022", "arm,primecell";
956826 			reg = <0x80129000 0x1000>;
957827 			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
....@@ -964,9 +834,11 @@
964834 			       <&dma 40 0 0x0>; /* Logical - MemToDev */
965835 			dma-names = "rx", "tx";
966836 			power-domains = <&pm_domains DOMAIN_VAPE>;
837
+
838
+			status = "disabled";
967839 		};
968840 
969
-		ux500_serial0: uart@80120000 {
841
+		serial0: uart@80120000 {
970842 			compatible = "arm,pl011", "arm,primecell";
971843 			reg = <0x80120000 0x1000>;
972844 			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
....@@ -981,7 +853,7 @@
981853 			status = "disabled";
982854 		};
983855 
984
-		ux500_serial1: uart@80121000 {
856
+		serial1: uart@80121000 {
985857 			compatible = "arm,pl011", "arm,primecell";
986858 			reg = <0x80121000 0x1000>;
987859 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
....@@ -996,7 +868,7 @@
996868 			status = "disabled";
997869 		};
998870 
999
-		ux500_serial2: uart@80007000 {
871
+		serial2: uart@80007000 {
1000872 			compatible = "arm,pl011", "arm,primecell";
1001873 			reg = <0x80007000 0x1000>;
1002874 			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1110,9 +982,6 @@
1110982 		sound {
1111983 			compatible = "stericsson,snd-soc-mop500";
1112984 			stericsson,cpu-dai = <&msp1 &msp3>;
1113
-			stericsson,audio-codec = <&codec>;
1114
-			clocks = <&prcmu_clk PRCMU_SYSCLK>, <&ab8500_clock AB8500_SYSCLK_ULP>, <&ab8500_clock AB8500_SYSCLK_INT>;
1115
-			clock-names = "sysclk", "ulpclk", "intclk";
1116985 		};
1117986 
1118987 		msp0: msp@80123000 {
....@@ -1190,21 +1059,69 @@
11901059 			status = "disabled";
11911060 		};
11921061 
1062
+		gpu@a0300000 {
1063
+			/*
1064
+			 * This block is referred to as "Smart Graphics Adapter SGA500"
1065
+			 * in documentation but is in practice a pretty straight-forward
1066
+			 * MALI-400 GPU block.
1067
+			 */
1068
+			compatible = "stericsson,db8500-mali", "arm,mali-400";
1069
+			reg = <0xa0300000 0x10000>;
1070
+			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
1071
+				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1072
+				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1073
+				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1074
+				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1075
+			interrupt-names = "gp",
1076
+					  "gpmmu",
1077
+					  "pp0",
1078
+					  "ppmmu0",
1079
+					  "combined";
1080
+			clocks = <&prcmu_clk PRCMU_ACLK>, <&prcmu_clk PRCMU_SGACLK>;
1081
+			clock-names = "bus", "core";
1082
+			mali-supply = <&db8500_sga_reg>;
1083
+			power-domains = <&pm_domains DOMAIN_VAPE>;
1084
+		};
1085
+
11931086 		mcde@a0350000 {
1194
-			compatible = "stericsson,mcde";
1195
-			reg = <0xa0350000 0x1000>, /* MCDE */
1196
-			      <0xa0351000 0x1000>, /* DSI link 1 */
1197
-			      <0xa0352000 0x1000>, /* DSI link 2 */
1198
-			      <0xa0353000 0x1000>; /* DSI link 3 */
1087
+			compatible = "ste,mcde";
1088
+			reg = <0xa0350000 0x1000>;
11991089 			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1090
+			epod-supply = <&db8500_b2r2_mcde_reg>;
12001091 			clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
12011092 				 <&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
1202
-				 <&prcmu_clk PRCMU_PLLDSI>, /* HDMI clock */
1203
-				 <&prcmu_clk PRCMU_DSI0CLK>, /* DSI 0 */
1204
-				 <&prcmu_clk PRCMU_DSI1CLK>, /* DSI 1 */
1205
-				 <&prcmu_clk PRCMU_DSI0ESCCLK>, /* TVout clock 0 */
1206
-				 <&prcmu_clk PRCMU_DSI1ESCCLK>, /* TVout clock 1 */
1207
-				 <&prcmu_clk PRCMU_DSI2ESCCLK>; /* TVout clock 2 */
1093
+				 <&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
1094
+			clock-names = "mcde", "lcd", "hdmi";
1095
+			#address-cells = <1>;
1096
+			#size-cells = <1>;
1097
+			ranges;
1098
+			status = "disabled";
1099
+
1100
+			dsi0: dsi-controller@a0351000 {
1101
+				compatible = "ste,mcde-dsi";
1102
+				reg = <0xa0351000 0x1000>;
1103
+				clocks = <&prcmu_clk PRCMU_DSI0CLK>, <&prcmu_clk PRCMU_DSI0ESCCLK>;
1104
+				clock-names = "hs", "lp";
1105
+				#address-cells = <1>;
1106
+				#size-cells = <0>;
1107
+			};
1108
+			dsi1: dsi-controller@a0352000 {
1109
+				compatible = "ste,mcde-dsi";
1110
+				reg = <0xa0352000 0x1000>;
1111
+				clocks = <&prcmu_clk PRCMU_DSI1CLK>, <&prcmu_clk PRCMU_DSI1ESCCLK>;
1112
+				clock-names = "hs", "lp";
1113
+				#address-cells = <1>;
1114
+				#size-cells = <0>;
1115
+			};
1116
+			dsi2: dsi-controller@a0353000 {
1117
+				compatible = "ste,mcde-dsi";
1118
+				reg = <0xa0353000 0x1000>;
1119
+				/* This DSI port only has the Low Power / Energy Save clock */
1120
+				clocks = <&prcmu_clk PRCMU_DSI2ESCCLK>;
1121
+				clock-names = "lp";
1122
+				#address-cells = <1>;
1123
+				#size-cells = <0>;
1124
+			};
12081125 		};
12091126 
12101127 		cryp@a03cb000 {