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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/sama5d4.dtsi
....@@ -1,49 +1,11 @@
1
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 /*
23  * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
34  *
45  *  Copyright (C) 2014 Atmel,
56  *                2014 Nicolas Ferre <nicolas.ferre@atmel.com>
6
- *
7
- * This file is dual-licensed: you can use it either under the terms
8
- * of the GPL or the X11 license, at your option. Note that this dual
9
- * licensing only applies to this file, and not this project as a
10
- * whole.
11
- *
12
- *  a) This file is free software; you can redistribute it and/or
13
- *     modify it under the terms of the GNU General Public License as
14
- *     published by the Free Software Foundation; either version 2 of the
15
- *     License, or (at your option) any later version.
16
- *
17
- *     This file is distributed in the hope that it will be useful,
18
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
19
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20
- *     GNU General Public License for more details.
21
- *
22
- * Or, alternatively,
23
- *
24
- *  b) Permission is hereby granted, free of charge, to any person
25
- *     obtaining a copy of this software and associated documentation
26
- *     files (the "Software"), to deal in the Software without
27
- *     restriction, including without limitation the rights to use,
28
- *     copy, modify, merge, publish, distribute, sublicense, and/or
29
- *     sell copies of the Software, and to permit persons to whom the
30
- *     Software is furnished to do so, subject to the following
31
- *     conditions:
32
- *
33
- *     The above copyright notice and this permission notice shall be
34
- *     included in all copies or substantial portions of the Software.
35
- *
36
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43
- *     OTHER DEALINGS IN THE SOFTWARE.
447  */
458 
46
-#include "skeleton.dtsi"
479 #include <dt-bindings/clock/at91.h>
4810 #include <dt-bindings/dma/at91.h>
4911 #include <dt-bindings/pinctrl/at91.h>
....@@ -51,6 +13,8 @@
5113 #include <dt-bindings/gpio/gpio.h>
5214 
5315 / {
16
+	#address-cells = <1>;
17
+	#size-cells = <1>;
5418 	model = "Atmel SAMA5D4 family SoC";
5519 	compatible = "atmel,sama5d4";
5620 	interrupt-parent = <&aic>;
....@@ -89,7 +53,8 @@
8953 		};
9054 	};
9155 
92
-	memory {
56
+	memory@20000000 {
57
+		device_type = "memory";
9358 		reg = <0x20000000 0x20000000>;
9459 	};
9560 
....@@ -116,6 +81,9 @@
11681 	ns_sram: sram@210000 {
11782 		compatible = "mmio-sram";
11883 		reg = <0x00210000 0x10000>;
84
+		#address-cells = <1>;
85
+		#size-cells = <1>;
86
+		ranges = <0 0x00210000 0x10000>;
11987 	};
12088 
12189 	ahb {
....@@ -128,143 +96,26 @@
12896 			compatible = "mmio-sram";
12997 			no-memory-wc;
13098 			reg = <0x100000 0x2400>;
99
+			#address-cells = <1>;
100
+			#size-cells = <1>;
101
+			ranges = <0 0x100000 0x2400>;
131102 		};
132103 
133104 		usb0: gadget@400000 {
134
-			#address-cells = <1>;
135
-			#size-cells = <0>;
136105 			compatible = "atmel,sama5d3-udc";
137106 			reg = <0x00400000 0x100000
138107 			       0xfc02c000 0x4000>;
139108 			interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
140
-			clocks = <&udphs_clk>, <&utmi>;
109
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
141110 			clock-names = "pclk", "hclk";
142111 			status = "disabled";
143
-
144
-			ep@0 {
145
-				reg = <0>;
146
-				atmel,fifo-size = <64>;
147
-				atmel,nb-banks = <1>;
148
-			};
149
-
150
-			ep@1 {
151
-				reg = <1>;
152
-				atmel,fifo-size = <1024>;
153
-				atmel,nb-banks = <3>;
154
-				atmel,can-dma;
155
-				atmel,can-isoc;
156
-			};
157
-
158
-			ep@2 {
159
-				reg = <2>;
160
-				atmel,fifo-size = <1024>;
161
-				atmel,nb-banks = <3>;
162
-				atmel,can-dma;
163
-				atmel,can-isoc;
164
-			};
165
-
166
-			ep@3 {
167
-				reg = <3>;
168
-				atmel,fifo-size = <1024>;
169
-				atmel,nb-banks = <2>;
170
-				atmel,can-dma;
171
-				atmel,can-isoc;
172
-			};
173
-
174
-			ep@4 {
175
-				reg = <4>;
176
-				atmel,fifo-size = <1024>;
177
-				atmel,nb-banks = <2>;
178
-				atmel,can-dma;
179
-				atmel,can-isoc;
180
-			};
181
-
182
-			ep@5 {
183
-				reg = <5>;
184
-				atmel,fifo-size = <1024>;
185
-				atmel,nb-banks = <2>;
186
-				atmel,can-dma;
187
-				atmel,can-isoc;
188
-			};
189
-
190
-			ep@6 {
191
-				reg = <6>;
192
-				atmel,fifo-size = <1024>;
193
-				atmel,nb-banks = <2>;
194
-				atmel,can-dma;
195
-				atmel,can-isoc;
196
-			};
197
-
198
-			ep@7 {
199
-				reg = <7>;
200
-				atmel,fifo-size = <1024>;
201
-				atmel,nb-banks = <2>;
202
-				atmel,can-dma;
203
-				atmel,can-isoc;
204
-			};
205
-
206
-			ep@8 {
207
-				reg = <8>;
208
-				atmel,fifo-size = <1024>;
209
-				atmel,nb-banks = <2>;
210
-				atmel,can-isoc;
211
-			};
212
-
213
-			ep@9 {
214
-				reg = <9>;
215
-				atmel,fifo-size = <1024>;
216
-				atmel,nb-banks = <2>;
217
-				atmel,can-isoc;
218
-			};
219
-
220
-			ep@10 {
221
-				reg = <10>;
222
-				atmel,fifo-size = <1024>;
223
-				atmel,nb-banks = <2>;
224
-				atmel,can-isoc;
225
-			};
226
-
227
-			ep@11 {
228
-				reg = <11>;
229
-				atmel,fifo-size = <1024>;
230
-				atmel,nb-banks = <2>;
231
-				atmel,can-isoc;
232
-			};
233
-
234
-			ep@12 {
235
-				reg = <12>;
236
-				atmel,fifo-size = <1024>;
237
-				atmel,nb-banks = <2>;
238
-				atmel,can-isoc;
239
-			};
240
-
241
-			ep@13 {
242
-				reg = <13>;
243
-				atmel,fifo-size = <1024>;
244
-				atmel,nb-banks = <2>;
245
-				atmel,can-isoc;
246
-			};
247
-
248
-			ep@14 {
249
-				reg = <14>;
250
-				atmel,fifo-size = <1024>;
251
-				atmel,nb-banks = <2>;
252
-				atmel,can-isoc;
253
-			};
254
-
255
-			ep@15 {
256
-				reg = <15>;
257
-				atmel,fifo-size = <1024>;
258
-				atmel,nb-banks = <2>;
259
-				atmel,can-isoc;
260
-			};
261112 		};
262113 
263114 		usb1: ohci@500000 {
264115 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
265116 			reg = <0x00500000 0x100000>;
266117 			interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
267
-			clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
118
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
268119 			clock-names = "ohci_clk", "hclk", "uhpck";
269120 			status = "disabled";
270121 		};
....@@ -273,7 +124,7 @@
273124 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
274125 			reg = <0x00600000 0x100000>;
275126 			interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
276
-			clocks = <&utmi>, <&uhphs_clk>;
127
+			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
277128 			clock-names = "usb_clk", "ehci_clk";
278129 			status = "disabled";
279130 		};
....@@ -297,7 +148,7 @@
297148 				  0x1 0x0 0x60000000 0x10000000
298149 				  0x2 0x0 0x70000000 0x10000000
299150 				  0x3 0x0 0x80000000 0x8000000>;
300
-			clocks = <&mck>;
151
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
301152 			status = "disabled";
302153 
303154 			nand_controller: nand-controller {
....@@ -327,7 +178,7 @@
327178 				compatible = "atmel,sama5d4-hlcdc";
328179 				reg = <0xf0000000 0x4000>;
329180 				interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
330
-				clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
181
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
331182 				clock-names = "periph_clk","sys_clk", "slow_clk";
332183 				status = "disabled";
333184 
....@@ -356,7 +207,7 @@
356207 				reg = <0xf0004000 0x200>;
357208 				interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
358209 				#dma-cells = <1>;
359
-				clocks = <&dma1_clk>;
210
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
360211 				clock-names = "dma_clk";
361212 			};
362213 
....@@ -366,7 +217,7 @@
366217 				interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
367218 				pinctrl-names = "default";
368219 				pinctrl-0 = <&pinctrl_isi_data_0_7>;
369
-				clocks = <&isi_clk>;
220
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
370221 				clock-names = "isi_clk";
371222 				status = "disabled";
372223 				port {
....@@ -378,7 +229,7 @@
378229 			ramc0: ramc@f0010000 {
379230 				compatible = "atmel,sama5d3-ddramc";
380231 				reg = <0xf0010000 0x200>;
381
-				clocks = <&ddrck>, <&mpddr_clk>;
232
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
382233 				clock-names = "ddrck", "mpddr";
383234 			};
384235 
....@@ -387,7 +238,7 @@
387238 				reg = <0xf0014000 0x200>;
388239 				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
389240 				#dma-cells = <1>;
390
-				clocks = <&dma0_clk>;
241
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
391242 				clock-names = "dma_clk";
392243 			};
393244 
....@@ -395,448 +246,9 @@
395246 				compatible = "atmel,sama5d4-pmc", "syscon";
396247 				reg = <0xf0018000 0x120>;
397248 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
398
-				interrupt-controller;
399
-				#address-cells = <1>;
400
-				#size-cells = <0>;
401
-				#interrupt-cells = <1>;
402
-
403
-				main_rc_osc: main_rc_osc {
404
-					compatible = "atmel,at91sam9x5-clk-main-rc-osc";
405
-					#clock-cells = <0>;
406
-					interrupt-parent = <&pmc>;
407
-					interrupts = <AT91_PMC_MOSCRCS>;
408
-					clock-frequency = <12000000>;
409
-					clock-accuracy = <100000000>;
410
-				};
411
-
412
-				main_osc: main_osc {
413
-					compatible = "atmel,at91rm9200-clk-main-osc";
414
-					#clock-cells = <0>;
415
-					interrupt-parent = <&pmc>;
416
-					interrupts = <AT91_PMC_MOSCS>;
417
-					clocks = <&main_xtal>;
418
-				};
419
-
420
-				main: mainck {
421
-					compatible = "atmel,at91sam9x5-clk-main";
422
-					#clock-cells = <0>;
423
-					interrupt-parent = <&pmc>;
424
-					interrupts = <AT91_PMC_MOSCSELS>;
425
-					clocks = <&main_rc_osc &main_osc>;
426
-				};
427
-
428
-				plla: pllack {
429
-					compatible = "atmel,sama5d3-clk-pll";
430
-					#clock-cells = <0>;
431
-					interrupt-parent = <&pmc>;
432
-					interrupts = <AT91_PMC_LOCKA>;
433
-					clocks = <&main>;
434
-					reg = <0>;
435
-					atmel,clk-input-range = <12000000 12000000>;
436
-					#atmel,pll-clk-output-range-cells = <4>;
437
-					atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
438
-				};
439
-
440
-				plladiv: plladivck {
441
-					compatible = "atmel,at91sam9x5-clk-plldiv";
442
-					#clock-cells = <0>;
443
-					clocks = <&plla>;
444
-				};
445
-
446
-				utmi: utmick {
447
-					compatible = "atmel,at91sam9x5-clk-utmi";
448
-					#clock-cells = <0>;
449
-					interrupt-parent = <&pmc>;
450
-					interrupts = <AT91_PMC_LOCKU>;
451
-					clocks = <&main>;
452
-				};
453
-
454
-				mck: masterck {
455
-					compatible = "atmel,at91sam9x5-clk-master";
456
-					#clock-cells = <0>;
457
-					interrupt-parent = <&pmc>;
458
-					interrupts = <AT91_PMC_MCKRDY>;
459
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
460
-					atmel,clk-output-range = <125000000 200000000>;
461
-					atmel,clk-divisors = <1 2 4 3>;
462
-				};
463
-
464
-				h32ck: h32mxck {
465
-					#clock-cells = <0>;
466
-					compatible = "atmel,sama5d4-clk-h32mx";
467
-					clocks = <&mck>;
468
-				};
469
-
470
-				usb: usbck {
471
-					compatible = "atmel,at91sam9x5-clk-usb";
472
-					#clock-cells = <0>;
473
-					clocks = <&plladiv>, <&utmi>;
474
-				};
475
-
476
-				prog: progck {
477
-					compatible = "atmel,at91sam9x5-clk-programmable";
478
-					#address-cells = <1>;
479
-					#size-cells = <0>;
480
-					interrupt-parent = <&pmc>;
481
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
482
-
483
-					prog0: prog0 {
484
-						#clock-cells = <0>;
485
-						reg = <0>;
486
-						interrupts = <AT91_PMC_PCKRDY(0)>;
487
-					};
488
-
489
-					prog1: prog1 {
490
-						#clock-cells = <0>;
491
-						reg = <1>;
492
-						interrupts = <AT91_PMC_PCKRDY(1)>;
493
-					};
494
-
495
-					prog2: prog2 {
496
-						#clock-cells = <0>;
497
-						reg = <2>;
498
-						interrupts = <AT91_PMC_PCKRDY(2)>;
499
-					};
500
-				};
501
-
502
-				smd: smdclk {
503
-					compatible = "atmel,at91sam9x5-clk-smd";
504
-					#clock-cells = <0>;
505
-					clocks = <&plladiv>, <&utmi>;
506
-				};
507
-
508
-				systemck {
509
-					compatible = "atmel,at91rm9200-clk-system";
510
-					#address-cells = <1>;
511
-					#size-cells = <0>;
512
-
513
-					ddrck: ddrck {
514
-						#clock-cells = <0>;
515
-						reg = <2>;
516
-						clocks = <&mck>;
517
-					};
518
-
519
-					lcdck: lcdck {
520
-						#clock-cells = <0>;
521
-						reg = <3>;
522
-						clocks = <&mck>;
523
-					};
524
-
525
-					smdck: smdck {
526
-						#clock-cells = <0>;
527
-						reg = <4>;
528
-						clocks = <&smd>;
529
-					};
530
-
531
-					uhpck: uhpck {
532
-						#clock-cells = <0>;
533
-						reg = <6>;
534
-						clocks = <&usb>;
535
-					};
536
-
537
-					udpck: udpck {
538
-						#clock-cells = <0>;
539
-						reg = <7>;
540
-						clocks = <&usb>;
541
-					};
542
-
543
-					pck0: pck0 {
544
-						#clock-cells = <0>;
545
-						reg = <8>;
546
-						clocks = <&prog0>;
547
-					};
548
-
549
-					pck1: pck1 {
550
-						#clock-cells = <0>;
551
-						reg = <9>;
552
-						clocks = <&prog1>;
553
-					};
554
-
555
-					pck2: pck2 {
556
-						#clock-cells = <0>;
557
-						reg = <10>;
558
-						clocks = <&prog2>;
559
-					};
560
-				};
561
-
562
-				periph32ck {
563
-					compatible = "atmel,at91sam9x5-clk-peripheral";
564
-					#address-cells = <1>;
565
-					#size-cells = <0>;
566
-					clocks = <&h32ck>;
567
-
568
-					pioD_clk: pioD_clk {
569
-						#clock-cells = <0>;
570
-						reg = <5>;
571
-					};
572
-
573
-					usart0_clk: usart0_clk {
574
-						#clock-cells = <0>;
575
-						reg = <6>;
576
-					};
577
-
578
-					usart1_clk: usart1_clk {
579
-						#clock-cells = <0>;
580
-						reg = <7>;
581
-					};
582
-
583
-					icm_clk: icm_clk {
584
-						#clock-cells = <0>;
585
-						reg = <9>;
586
-					};
587
-
588
-					aes_clk: aes_clk {
589
-						#clock-cells = <0>;
590
-						reg = <12>;
591
-					};
592
-
593
-					tdes_clk: tdes_clk {
594
-						#clock-cells = <0>;
595
-						reg = <14>;
596
-					};
597
-
598
-					sha_clk: sha_clk {
599
-						#clock-cells = <0>;
600
-						reg = <15>;
601
-					};
602
-
603
-					matrix1_clk: matrix1_clk {
604
-						#clock-cells = <0>;
605
-						reg = <17>;
606
-					};
607
-
608
-					hsmc_clk: hsmc_clk {
609
-						#clock-cells = <0>;
610
-						reg = <22>;
611
-					};
612
-
613
-					pioA_clk: pioA_clk {
614
-						#clock-cells = <0>;
615
-						reg = <23>;
616
-					};
617
-
618
-					pioB_clk: pioB_clk {
619
-						#clock-cells = <0>;
620
-						reg = <24>;
621
-					};
622
-
623
-					pioC_clk: pioC_clk {
624
-						#clock-cells = <0>;
625
-						reg = <25>;
626
-					};
627
-
628
-					pioE_clk: pioE_clk {
629
-						#clock-cells = <0>;
630
-						reg = <26>;
631
-					};
632
-
633
-					uart0_clk: uart0_clk {
634
-						#clock-cells = <0>;
635
-						reg = <27>;
636
-					};
637
-
638
-					uart1_clk: uart1_clk {
639
-						#clock-cells = <0>;
640
-						reg = <28>;
641
-					};
642
-
643
-					usart2_clk: usart2_clk {
644
-						#clock-cells = <0>;
645
-						reg = <29>;
646
-					};
647
-
648
-					usart3_clk: usart3_clk {
649
-						#clock-cells = <0>;
650
-						reg = <30>;
651
-					};
652
-
653
-					usart4_clk: usart4_clk {
654
-						#clock-cells = <0>;
655
-						reg = <31>;
656
-					};
657
-
658
-					twi0_clk: twi0_clk {
659
-						reg = <32>;
660
-						#clock-cells = <0>;
661
-					};
662
-
663
-					twi1_clk: twi1_clk {
664
-						#clock-cells = <0>;
665
-						reg = <33>;
666
-					};
667
-
668
-					twi2_clk: twi2_clk {
669
-						#clock-cells = <0>;
670
-						reg = <34>;
671
-					};
672
-
673
-					mci0_clk: mci0_clk {
674
-						#clock-cells = <0>;
675
-						reg = <35>;
676
-					};
677
-
678
-					mci1_clk: mci1_clk {
679
-						#clock-cells = <0>;
680
-						reg = <36>;
681
-					};
682
-
683
-					spi0_clk: spi0_clk {
684
-						#clock-cells = <0>;
685
-						reg = <37>;
686
-					};
687
-
688
-					spi1_clk: spi1_clk {
689
-						#clock-cells = <0>;
690
-						reg = <38>;
691
-					};
692
-
693
-					spi2_clk: spi2_clk {
694
-						#clock-cells = <0>;
695
-						reg = <39>;
696
-					};
697
-
698
-					tcb0_clk: tcb0_clk {
699
-						#clock-cells = <0>;
700
-						reg = <40>;
701
-					};
702
-
703
-					tcb1_clk: tcb1_clk {
704
-						#clock-cells = <0>;
705
-						reg = <41>;
706
-					};
707
-
708
-					tcb2_clk: tcb2_clk {
709
-						#clock-cells = <0>;
710
-						reg = <42>;
711
-					};
712
-
713
-					pwm_clk: pwm_clk {
714
-						#clock-cells = <0>;
715
-						reg = <43>;
716
-					};
717
-
718
-					adc_clk: adc_clk {
719
-						#clock-cells = <0>;
720
-						reg = <44>;
721
-					};
722
-
723
-					dbgu_clk: dbgu_clk {
724
-						#clock-cells = <0>;
725
-						reg = <45>;
726
-					};
727
-
728
-					uhphs_clk: uhphs_clk {
729
-						#clock-cells = <0>;
730
-						reg = <46>;
731
-					};
732
-
733
-					udphs_clk: udphs_clk {
734
-						#clock-cells = <0>;
735
-						reg = <47>;
736
-					};
737
-
738
-					ssc0_clk: ssc0_clk {
739
-						#clock-cells = <0>;
740
-						reg = <48>;
741
-					};
742
-
743
-					ssc1_clk: ssc1_clk {
744
-						#clock-cells = <0>;
745
-						reg = <49>;
746
-					};
747
-
748
-					trng_clk: trng_clk {
749
-						#clock-cells = <0>;
750
-						reg = <53>;
751
-					};
752
-
753
-					macb0_clk: macb0_clk {
754
-						#clock-cells = <0>;
755
-						reg = <54>;
756
-					};
757
-
758
-					macb1_clk: macb1_clk {
759
-						#clock-cells = <0>;
760
-						reg = <55>;
761
-					};
762
-
763
-					fuse_clk: fuse_clk {
764
-						#clock-cells = <0>;
765
-						reg = <57>;
766
-					};
767
-
768
-					securam_clk: securam_clk {
769
-						#clock-cells = <0>;
770
-						reg = <59>;
771
-					};
772
-
773
-					smd_clk: smd_clk {
774
-						#clock-cells = <0>;
775
-						reg = <61>;
776
-					};
777
-
778
-					twi3_clk: twi3_clk {
779
-						#clock-cells = <0>;
780
-						reg = <62>;
781
-					};
782
-
783
-					catb_clk: catb_clk {
784
-						#clock-cells = <0>;
785
-						reg = <63>;
786
-					};
787
-				};
788
-
789
-				periph64ck {
790
-					compatible = "atmel,at91sam9x5-clk-peripheral";
791
-					#address-cells = <1>;
792
-					#size-cells = <0>;
793
-					clocks = <&mck>;
794
-
795
-					dma0_clk: dma0_clk {
796
-						#clock-cells = <0>;
797
-						reg = <8>;
798
-					};
799
-
800
-					cpkcc_clk: cpkcc_clk {
801
-						#clock-cells = <0>;
802
-						reg = <10>;
803
-					};
804
-
805
-					aesb_clk: aesb_clk {
806
-						#clock-cells = <0>;
807
-						reg = <13>;
808
-					};
809
-
810
-					mpddr_clk: mpddr_clk {
811
-						#clock-cells = <0>;
812
-						reg = <16>;
813
-					};
814
-
815
-					matrix0_clk: matrix0_clk {
816
-						#clock-cells = <0>;
817
-						reg = <18>;
818
-					};
819
-
820
-					vdec_clk: vdec_clk {
821
-						#clock-cells = <0>;
822
-						reg = <19>;
823
-					};
824
-
825
-					dma1_clk: dma1_clk {
826
-						#clock-cells = <0>;
827
-						reg = <50>;
828
-					};
829
-
830
-					lcdc_clk: lcdc_clk {
831
-						#clock-cells = <0>;
832
-						reg = <51>;
833
-					};
834
-
835
-					isi_clk: isi_clk {
836
-						#clock-cells = <0>;
837
-						reg = <52>;
838
-					};
839
-				};
249
+				#clock-cells = <2>;
250
+				clocks = <&clk32k>, <&main_xtal>;
251
+				clock-names = "slow_clk", "main_xtal";
840252 			};
841253 
842254 			mmc0: mmc@f8000000 {
....@@ -852,7 +264,7 @@
852264 				status = "disabled";
853265 				#address-cells = <1>;
854266 				#size-cells = <0>;
855
-				clocks = <&mci0_clk>;
267
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
856268 				clock-names = "mci_clk";
857269 			};
858270 
....@@ -869,7 +281,7 @@
869281 				dma-names = "tx", "rx";
870282 				pinctrl-names = "default";
871283 				pinctrl-0 = <&pinctrl_uart0>;
872
-				clocks = <&uart0_clk>;
284
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
873285 				clock-names = "usart";
874286 				status = "disabled";
875287 			};
....@@ -887,7 +299,7 @@
887299 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
888300 					| AT91_XDMAC_DT_PERID(27))>;
889301 				dma-names = "tx", "rx";
890
-				clocks = <&ssc0_clk>;
302
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
891303 				clock-names = "pclk";
892304 				status = "disabled";
893305 			};
....@@ -897,7 +309,7 @@
897309 				reg = <0xf800c000 0x300>;
898310 				interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
899311 				#pwm-cells = <3>;
900
-				clocks = <&pwm_clk>;
312
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
901313 				status = "disabled";
902314 			};
903315 
....@@ -916,7 +328,7 @@
916328 				dma-names = "tx", "rx";
917329 				pinctrl-names = "default";
918330 				pinctrl-0 = <&pinctrl_spi0>;
919
-				clocks = <&spi0_clk>;
331
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
920332 				clock-names = "spi_clk";
921333 				status = "disabled";
922334 			};
....@@ -932,11 +344,14 @@
932344 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
933345 					| AT91_XDMAC_DT_PERID(3))>;
934346 				dma-names = "tx", "rx";
935
-				pinctrl-names = "default";
347
+				pinctrl-names = "default", "gpio";
936348 				pinctrl-0 = <&pinctrl_i2c0>;
349
+				pinctrl-1 = <&pinctrl_i2c0_gpio>;
350
+				sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
351
+				scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
937352 				#address-cells = <1>;
938353 				#size-cells = <0>;
939
-				clocks = <&twi0_clk>;
354
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
940355 				status = "disabled";
941356 			};
942357 
....@@ -951,11 +366,14 @@
951366 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
952367 					| AT91_XDMAC_DT_PERID(5))>;
953368 				dma-names = "tx", "rx";
954
-				pinctrl-names = "default";
369
+				pinctrl-names = "default", "gpio";
955370 				pinctrl-0 = <&pinctrl_i2c1>;
371
+				pinctrl-1 = <&pinctrl_i2c1_gpio>;
372
+				sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
373
+				scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
956374 				#address-cells = <1>;
957375 				#size-cells = <0>;
958
-				clocks = <&twi1_clk>;
376
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
959377 				status = "disabled";
960378 			};
961379 
....@@ -965,7 +383,7 @@
965383 				#size-cells = <0>;
966384 				reg = <0xf801c000 0x100>;
967385 				interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
968
-				clocks = <&tcb0_clk>, <&clk32k>;
386
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
969387 				clock-names = "t0_clk", "slow_clk";
970388 			};
971389 
....@@ -977,7 +395,7 @@
977395 				pinctrl-0 = <&pinctrl_macb0_rmii>;
978396 				#address-cells = <1>;
979397 				#size-cells = <0>;
980
-				clocks = <&macb0_clk>, <&macb0_clk>;
398
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
981399 				clock-names = "hclk", "pclk";
982400 				status = "disabled";
983401 			};
....@@ -993,11 +411,14 @@
993411 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
994412 					| AT91_XDMAC_DT_PERID(7))>;
995413 				dma-names = "tx", "rx";
996
-				pinctrl-names = "default";
414
+				pinctrl-names = "default", "gpio";
997415 				pinctrl-0 = <&pinctrl_i2c2>;
416
+				pinctrl-1 = <&pinctrl_i2c2_gpio>;
417
+				sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>;
418
+				scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
998419 				#address-cells = <1>;
999420 				#size-cells = <0>;
1000
-				clocks = <&twi2_clk>;
421
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
1001422 				status = "disabled";
1002423 			};
1003424 
....@@ -1019,7 +440,7 @@
1019440 				dma-names = "tx", "rx";
1020441 				pinctrl-names = "default";
1021442 				pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
1022
-				clocks = <&usart0_clk>;
443
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
1023444 				clock-names = "usart";
1024445 				status = "disabled";
1025446 			};
....@@ -1037,7 +458,7 @@
1037458 				dma-names = "tx", "rx";
1038459 				pinctrl-names = "default";
1039460 				pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
1040
-				clocks = <&usart1_clk>;
461
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
1041462 				clock-names = "usart";
1042463 				status = "disabled";
1043464 			};
....@@ -1055,7 +476,7 @@
1055476 				status = "disabled";
1056477 				#address-cells = <1>;
1057478 				#size-cells = <0>;
1058
-				clocks = <&mci1_clk>;
479
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
1059480 				clock-names = "mci_clk";
1060481 			};
1061482 
....@@ -1072,7 +493,7 @@
1072493 				dma-names = "tx", "rx";
1073494 				pinctrl-names = "default";
1074495 				pinctrl-0 = <&pinctrl_uart1>;
1075
-				clocks = <&uart1_clk>;
496
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
1076497 				clock-names = "usart";
1077498 				status = "disabled";
1078499 			};
....@@ -1090,7 +511,7 @@
1090511 				dma-names = "tx", "rx";
1091512 				pinctrl-names = "default";
1092513 				pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
1093
-				clocks = <&usart2_clk>;
514
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
1094515 				clock-names = "usart";
1095516 				status = "disabled";
1096517 			};
....@@ -1108,7 +529,7 @@
1108529 				dma-names = "tx", "rx";
1109530 				pinctrl-names = "default";
1110531 				pinctrl-0 = <&pinctrl_usart3>;
1111
-				clocks = <&usart3_clk>;
532
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
1112533 				clock-names = "usart";
1113534 				status = "disabled";
1114535 			};
....@@ -1126,7 +547,7 @@
1126547 				dma-names = "tx", "rx";
1127548 				pinctrl-names = "default";
1128549 				pinctrl-0 = <&pinctrl_usart4>;
1129
-				clocks = <&usart4_clk>;
550
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
1130551 				clock-names = "usart";
1131552 				status = "disabled";
1132553 			};
....@@ -1144,7 +565,7 @@
1144565 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1145566 					| AT91_XDMAC_DT_PERID(29))>;
1146567 				dma-names = "tx", "rx";
1147
-				clocks = <&ssc1_clk>;
568
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
1148569 				clock-names = "pclk";
1149570 				status = "disabled";
1150571 			};
....@@ -1164,7 +585,7 @@
1164585 				dma-names = "tx", "rx";
1165586 				pinctrl-names = "default";
1166587 				pinctrl-0 = <&pinctrl_spi1>;
1167
-				clocks = <&spi1_clk>;
588
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
1168589 				clock-names = "spi_clk";
1169590 				status = "disabled";
1170591 			};
....@@ -1184,7 +605,7 @@
1184605 				dma-names = "tx", "rx";
1185606 				pinctrl-names = "default";
1186607 				pinctrl-0 = <&pinctrl_spi2>;
1187
-				clocks = <&spi2_clk>;
608
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
1188609 				clock-names = "spi_clk";
1189610 				status = "disabled";
1190611 			};
....@@ -1195,7 +616,7 @@
1195616 				#size-cells = <0>;
1196617 				reg = <0xfc020000 0x100>;
1197618 				interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
1198
-				clocks = <&tcb1_clk>, <&clk32k>;
619
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
1199620 				clock-names = "t0_clk", "slow_clk";
1200621 			};
1201622 
....@@ -1205,7 +626,7 @@
1205626 				#size-cells = <0>;
1206627 				reg = <0xfc024000 0x100>;
1207628 				interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
1208
-				clocks = <&tcb2_clk>, <&clk32k>;
629
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
1209630 				clock-names = "t0_clk", "slow_clk";
1210631 			};
1211632 
....@@ -1217,7 +638,7 @@
1217638 				pinctrl-0 = <&pinctrl_macb1_rmii>;
1218639 				#address-cells = <1>;
1219640 				#size-cells = <0>;
1220
-				clocks = <&macb1_clk>, <&macb1_clk>;
641
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
1221642 				clock-names = "hclk", "pclk";
1222643 				status = "disabled";
1223644 			};
....@@ -1226,14 +647,14 @@
1226647 				compatible = "atmel,at91sam9g45-trng";
1227648 				reg = <0xfc030000 0x100>;
1228649 				interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
1229
-				clocks = <&trng_clk>;
650
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
1230651 			};
1231652 
1232653 			adc0: adc@fc034000 {
1233654 				compatible = "atmel,at91sam9x5-adc";
1234655 				reg = <0xfc034000 0x100>;
1235656 				interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
1236
-				clocks = <&adc_clk>,
657
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
1237658 					 <&adc_op_clk>;
1238659 				clock-names = "adc_clk", "adc_op_clk";
1239660 				atmel,adc-channels-used = <0x01f>;
....@@ -1276,7 +697,7 @@
1276697 				       <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1277698 					| AT91_XDMAC_DT_PERID(40))>;
1278699 				dma-names = "tx", "rx";
1279
-				clocks = <&aes_clk>;
700
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
1280701 				clock-names = "aes_clk";
1281702 				status = "okay";
1282703 			};
....@@ -1290,7 +711,7 @@
1290711 				       <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1291712 					| AT91_XDMAC_DT_PERID(43))>;
1292713 				dma-names = "tx", "rx";
1293
-				clocks = <&tdes_clk>;
714
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
1294715 				clock-names = "tdes_clk";
1295716 				status = "okay";
1296717 			};
....@@ -1302,7 +723,7 @@
1302723 				dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1303724 					| AT91_XDMAC_DT_PERID(44))>;
1304725 				dma-names = "tx";
1305
-				clocks = <&sha_clk>;
726
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
1306727 				clock-names = "sha_clk";
1307728 				status = "okay";
1308729 			};
....@@ -1311,7 +732,7 @@
1311732 				compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
1312733 				reg = <0xfc05c000 0x1000>;
1313734 				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
1314
-				clocks = <&hsmc_clk>;
735
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
1315736 				#address-cells = <1>;
1316737 				#size-cells = <1>;
1317738 				ranges;
....@@ -1323,13 +744,13 @@
1323744 				};
1324745 			};
1325746 
1326
-			rstc@fc068600 {
747
+			reset_controller: rstc@fc068600 {
1327748 				compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1328749 				reg = <0xfc068600 0x10>;
1329750 				clocks = <&clk32k>;
1330751 			};
1331752 
1332
-			shdwc@fc068610 {
753
+			shutdown_controller: shdwc@fc068610 {
1333754 				compatible = "atmel,at91sam9x5-shdwc";
1334755 				reg = <0xfc068610 0x10>;
1335756 				clocks = <&clk32k>;
....@@ -1339,10 +760,10 @@
1339760 				compatible = "atmel,at91sam9260-pit";
1340761 				reg = <0xfc068630 0x10>;
1341762 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1342
-				clocks = <&h32ck>;
763
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
1343764 			};
1344765 
1345
-			watchdog@fc068640 {
766
+			watchdog: watchdog@fc068640 {
1346767 				compatible = "atmel,sama5d4-wdt";
1347768 				reg = <0xfc068640 0x10>;
1348769 				interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
....@@ -1358,7 +779,7 @@
1358779 			};
1359780 
1360781 			rtc@fc0686b0 {
1361
-				compatible = "atmel,at91rm9200-rtc";
782
+				compatible = "atmel,sama5d4-rtc";
1362783 				reg = <0xfc0686b0 0x30>;
1363784 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1364785 				clocks = <&clk32k>;
....@@ -1370,13 +791,13 @@
1370791 				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
1371792 				pinctrl-names = "default";
1372793 				pinctrl-0 = <&pinctrl_dbgu>;
1373
-				clocks = <&dbgu_clk>;
794
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
1374795 				clock-names = "usart";
1375796 				status = "disabled";
1376797 			};
1377798 
1378799 
1379
-			pinctrl@fc06a000 {
800
+			pinctrl: pinctrl@fc06a000 {
1380801 				#address-cells = <1>;
1381802 				#size-cells = <1>;
1382803 				compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
....@@ -1400,7 +821,7 @@
1400821 					gpio-controller;
1401822 					interrupt-controller;
1402823 					#interrupt-cells = <2>;
1403
-					clocks = <&pioA_clk>;
824
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
1404825 				};
1405826 
1406827 				pioB: gpio@fc06b000 {
....@@ -1411,7 +832,7 @@
1411832 					gpio-controller;
1412833 					interrupt-controller;
1413834 					#interrupt-cells = <2>;
1414
-					clocks = <&pioB_clk>;
835
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
1415836 				};
1416837 
1417838 				pioC: gpio@fc06c000 {
....@@ -1422,7 +843,7 @@
1422843 					gpio-controller;
1423844 					interrupt-controller;
1424845 					#interrupt-cells = <2>;
1425
-					clocks = <&pioC_clk>;
846
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
1426847 				};
1427848 
1428849 				pioD: gpio@fc068000 {
....@@ -1433,7 +854,7 @@
1433854 					gpio-controller;
1434855 					interrupt-controller;
1435856 					#interrupt-cells = <2>;
1436
-					clocks = <&pioD_clk>;
857
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
1437858 				};
1438859 
1439860 				pioE: gpio@fc06d000 {
....@@ -1444,7 +865,7 @@
1444865 					gpio-controller;
1445866 					interrupt-controller;
1446867 					#interrupt-cells = <2>;
1447
-					clocks = <&pioE_clk>;
868
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
1448869 				};
1449870 
1450871 				/* pinctrl pin settings */
....@@ -1596,6 +1017,12 @@
15961017 							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
15971018 							 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
15981019 					};
1020
+
1021
+					pinctrl_i2c0_gpio: i2c0-gpio {
1022
+						atmel,pins =
1023
+							<AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1024
+							 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1025
+					};
15991026 				};
16001027 
16011028 				i2c1 {
....@@ -1604,6 +1031,12 @@
16041031 							<AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE	/* TWD1, conflicts with UART0 RX and DIBP */
16051032 							 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* TWCK1, conflicts with UART0 TX and DIBN */
16061033 					};
1034
+
1035
+					pinctrl_i2c1_gpio: i2c1-gpio {
1036
+						atmel,pins =
1037
+							<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1038
+							 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1039
+					};
16071040 				};
16081041 
16091042 				i2c2 {
....@@ -1612,6 +1045,12 @@
16121045 							<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* TWD2, conflicts with RD0 and PWML1 */
16131046 							 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
16141047 					};
1048
+
1049
+					pinctrl_i2c2_gpio: i2c2-gpio {
1050
+						atmel,pins =
1051
+							<AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1052
+							 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1053
+					};
16151054 				};
16161055 
16171056 				isi {