add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/pxa2xx.dtsi
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@@ -1,15 +1,34 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
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  *
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  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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- *
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- * Licensed under GPLv2 or later.
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  */
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-#include "skeleton.dtsi"
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 #include "dt-bindings/clock/pxa-clock.h"
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+#define PMGROUP(pin) #pin
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+#define PMMUX(func, pin, af)			\
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+	mux- ## func {				\
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+		groups = PMGROUP(P ## pin);	\
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+		function = #af;			\
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+	}
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+#define PMMUX_LPM_LOW(func, pin, af)		\
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+	mux- ## func {				\
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+		groups = PMGROUP(P ## pin);	\
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+		function = #af;			\
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+		low-power-disable;		\
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+	}
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+#define PMMUX_LPM_HIGH(func, pin, af)		\
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+	mux- ## func {				\
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+		groups = PMGROUP(P ## pin);	\
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+		function = #af;			\
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+		low-power-enable;		\
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+	}
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+
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 / {
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+	#address-cells = <1>;
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+	#size-cells = <1>;
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 	model = "Marvell PXA2xx family SoC";
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 	compatible = "marvell,pxa2xx";
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 	interrupt-parent = <&pxairq>;
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@@ -24,8 +43,6 @@
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 	};
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 	cpus {
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-		#address-cells = <0>;
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-		#size-cells = <0>;
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 		cpu {
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 			compatible = "marvell,xscale";
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 			device_type = "cpu";
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@@ -76,7 +93,7 @@
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 			};
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 		};
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-		ffuart: uart@40100000 {
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+		ffuart: serial@40100000 {
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 			compatible = "mrvl,pxa-uart";
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 			reg = <0x40100000 0x30>;
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 			interrupts = <22>;
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@@ -84,7 +101,7 @@
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 			status = "disabled";
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 		};
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-		btuart: uart@40200000 {
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+		btuart: serial@40200000 {
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 			compatible = "mrvl,pxa-uart";
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 			reg = <0x40200000 0x30>;
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 			interrupts = <21>;
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@@ -92,7 +109,7 @@
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 			status = "disabled";
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 		};
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-		stuart: uart@40700000 {
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+		stuart: serial@40700000 {
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 			compatible = "mrvl,pxa-uart";
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 			reg = <0x40700000 0x30>;
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 			interrupts = <20>;
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@@ -100,9 +117,9 @@
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 			status = "disabled";
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 		};
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-		hwuart: uart@41100000 {
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+		hwuart: serial@41600000 {
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 			compatible = "mrvl,pxa-uart";
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-			reg = <0x41100000 0x30>;
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+			reg = <0x41600000 0x30>;
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 			interrupts = <7>;
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 			status = "disabled";
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 		};