~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,7 +1,7 @@
1	1	/*
2	2	* Device Tree Source for OMAP3 SoC
3	3	*
4		- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	4	+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5	5	*
6	6	* This file is licensed under the terms of the GNU General Public License
7	7	* version 2. This program is licensed "as is" without any warranty of any
..	..	@@ -19,16 +19,66 @@
19	19	};
20	20
21	21	cpus {
22		- /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
	22	+ /* OMAP3630/OMAP37xx variants OPP50 to OPP130 and OPP1G */
23	23	cpu: cpu@0 {
24		- operating-points = <
25		- /* kHz uV */
26		- 300000 1012500
27		- 600000 1200000
28		- 800000 1325000
29		- >;
30		- clock-latency = <300000>; /* From legacy driver */
	24	+ operating-points-v2 = <&cpu0_opp_table>;
	25	+
	26	+ vbb-supply = <&abb_mpu_iva>;
	27	+ clock-latency = <300000>; /* From omap-cpufreq driver */
	28	+ #cooling-cells = <2>;
31	29	};
	30	+ };
	31	+
	32	+ /* see Documentation/devicetree/bindings/opp/opp.txt */
	33	+ cpu0_opp_table: opp-table {
	34	+ compatible = "operating-points-v2-ti-cpu";
	35	+ syscon = <&scm_conf>;
	36	+
	37	+ opp50-300000000 {
	38	+ opp-hz = /bits/ 64 <300000000>;
	39	+ /*
	40	+ * we currently only select the max voltage from table
	41	+ * Table 4-19 of the DM3730 Data sheet (SPRS685B)
	42	+ * Format is: cpu0-supply: <target min max>
	43	+ * vbb-supply: <target min max>
	44	+ */
	45	+ opp-microvolt = <1012500 1012500 1012500>,
	46	+ <1012500 1012500 1012500>;
	47	+ /*
	48	+ * first value is silicon revision bit mask
	49	+ * second one is "speed binned" bit mask
	50	+ */
	51	+ opp-supported-hw = <0xffffffff 3>;
	52	+ opp-suspend;
	53	+ };
	54	+
	55	+ opp100-600000000 {
	56	+ opp-hz = /bits/ 64 <600000000>;
	57	+ opp-microvolt = <1200000 1200000 1200000>,
	58	+ <1200000 1200000 1200000>;
	59	+ opp-supported-hw = <0xffffffff 3>;
	60	+ };
	61	+
	62	+ opp130-800000000 {
	63	+ opp-hz = /bits/ 64 <800000000>;
	64	+ opp-microvolt = <1325000 1325000 1325000>,
	65	+ <1325000 1325000 1325000>;
	66	+ opp-supported-hw = <0xffffffff 3>;
	67	+ };
	68	+
	69	+ opp1g-1000000000 {
	70	+ opp-hz = /bits/ 64 <1000000000>;
	71	+ opp-microvolt = <1375000 1375000 1375000>,
	72	+ <1375000 1375000 1375000>;
	73	+ /* only on am/dm37x with speed-binned bit set */
	74	+ opp-supported-hw = <0xffffffff 2>;
	75	+ turbo-mode;
	76	+ };
	77	+ };
	78	+
	79	+ opp_supply_mpu_iva: opp_supply {
	80	+ compatible = "ti,omap-opp-supply";
	81	+ ti,absolute-max-voltage-uv = <1375000>;
32	82	};
33	83
34	84	ocp@68000000 {
..	..	@@ -139,11 +189,43 @@
139	189	interrupts = <18>;
140	190	};
141	191	};
	192	+
	193	+ /*
	194	+ * Note that the sysconfig register layout is a subset of the
	195	+ * "ti,sysc-omap4" type register with just sidle and midle bits
	196	+ * available while omap34xx has "ti,sysc-omap2" type sysconfig.
	197	+ */
	198	+ sgx_module: target-module@50000000 {
	199	+ compatible = "ti,sysc-omap4", "ti,sysc";
	200	+ reg = <0x5000fe00 0x4>,
	201	+ <0x5000fe10 0x4>;
	202	+ reg-names = "rev", "sysc";
	203	+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
	204	+ <SYSC_IDLE_NO>,
	205	+ <SYSC_IDLE_SMART>;
	206	+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
	207	+ <SYSC_IDLE_NO>,
	208	+ <SYSC_IDLE_SMART>;
	209	+ clocks = <&sgx_fck>, <&sgx_ick>;
	210	+ clock-names = "fck", "ick";
	211	+ #address-cells = <1>;
	212	+ #size-cells = <1>;
	213	+ ranges = <0 0x50000000 0x2000000>;
	214	+
	215	+ /*
	216	+ * Closed source PowerVR driver, no child device
	217	+ * binding or driver in mainline
	218	+ */
	219	+ };
142	220	};
143	221
144	222	thermal_zones: thermal-zones {
145	223	#include "omap3-cpu-thermal.dtsi"
146	224	};
	225	+};
	226	+
	227	+&sdma {
	228	+ compatible = "ti,omap3630-sdma", "ti,omap-sdma";
147	229	};
148	230
149	231	/* OMAP3630 needs dss_96m_fck for VENC */
..	..	@@ -153,7 +235,7 @@
153	235	};
154	236
155	237	&ssi {
156		- status = "ok";
	238	+ status = "okay";
157	239
158	240	clocks = <&ssi_ssr_fck>,
159	241	<&ssi_sst_fck>,