.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2013 Marek Belisko <marek@goldelico.com> |
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3 | 4 | * |
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4 | 5 | * Based on omap3-beagle-xm.dts |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify |
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7 | | - * it under the terms of the GNU General Public License version 2 as |
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8 | | - * published by the Free Software Foundation. |
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9 | 6 | */ |
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10 | 7 | /dts-v1/; |
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11 | 8 | |
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12 | 9 | #include "omap36xx.dtsi" |
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| 10 | +#include <dt-bindings/input/input.h> |
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13 | 11 | |
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14 | 12 | / { |
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15 | 13 | model = "OMAP3 GTA04"; |
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16 | | - compatible = "ti,omap3-gta04", "ti,omap36xx", "ti,omap3"; |
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| 14 | + compatible = "ti,omap3-gta04", "ti,omap3630", "ti,omap36xx", "ti,omap3"; |
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17 | 15 | |
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18 | 16 | cpus { |
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19 | 17 | cpu@0 { |
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.. | .. |
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26 | 24 | reg = <0x80000000 0x20000000>; /* 512 MB */ |
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27 | 25 | }; |
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28 | 26 | |
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| 27 | + chosen { |
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| 28 | + stdout-path = &uart3; |
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| 29 | + }; |
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| 30 | + |
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29 | 31 | aliases { |
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30 | 32 | display0 = &lcd; |
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31 | 33 | display1 = &tv0; |
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| 34 | + /delete-property/ mmc2; |
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| 35 | + /delete-property/ mmc3; |
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| 36 | + }; |
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| 37 | + |
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| 38 | + ldo_3v3: fixedregulator { |
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| 39 | + compatible = "regulator-fixed"; |
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| 40 | + regulator-name = "ldo_3v3"; |
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| 41 | + regulator-min-microvolt = <3300000>; |
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| 42 | + regulator-max-microvolt = <3300000>; |
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| 43 | + regulator-always-on; |
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32 | 44 | }; |
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33 | 45 | |
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34 | 46 | /* fixed 26MHz oscillator */ |
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.. | .. |
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43 | 55 | |
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44 | 56 | aux-button { |
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45 | 57 | label = "aux"; |
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46 | | - linux,code = <169>; |
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| 58 | + linux,code = <KEY_PHONE>; |
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47 | 59 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
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| 60 | + wakeup-source; |
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| 61 | + }; |
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| 62 | + }; |
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| 63 | + |
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| 64 | + antenna-detect { |
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| 65 | + compatible = "gpio-keys"; |
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| 66 | + |
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| 67 | + gps_antenna_button: gps-antenna-button { |
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| 68 | + label = "GPS_EXT_ANT"; |
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| 69 | + linux,input-type = <EV_SW>; |
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| 70 | + linux,code = <SW_LINEIN_INSERT>; |
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| 71 | + gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* GPIO144 */ |
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| 72 | + interrupt-parent = <&gpio5>; |
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| 73 | + interrupts = <16 IRQ_TYPE_EDGE_BOTH>; |
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| 74 | + debounce-interval = <10>; |
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48 | 75 | wakeup-source; |
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49 | 76 | }; |
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50 | 77 | }; |
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.. | .. |
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56 | 83 | ti,mcbsp = <&mcbsp2>; |
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57 | 84 | }; |
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58 | 85 | |
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59 | | - /* GSM audio */ |
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| 86 | + /* GSM audio */ |
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60 | 87 | sound_telephony { |
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61 | 88 | compatible = "simple-audio-card"; |
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62 | 89 | simple-audio-card,name = "GTA04 voice"; |
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.. | .. |
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89 | 116 | gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>; |
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90 | 117 | gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>; |
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91 | 118 | gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>; |
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92 | | - cs-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; |
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| 119 | + cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
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93 | 120 | num-chipselects = <1>; |
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94 | 121 | |
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95 | 122 | /* lcd panel */ |
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.. | .. |
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100 | 127 | spi-cpol; |
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101 | 128 | spi-cpha; |
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102 | 129 | |
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| 130 | + backlight= <&backlight>; |
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103 | 131 | label = "lcd"; |
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104 | 132 | port { |
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105 | 133 | lcd_in: endpoint { |
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.. | .. |
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109 | 137 | }; |
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110 | 138 | }; |
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111 | 139 | |
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112 | | - backlight { |
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| 140 | + backlight: backlight { |
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113 | 141 | compatible = "pwm-backlight"; |
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114 | 142 | pwms = <&pwm11 0 12000000 0>; |
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115 | 143 | pwm-names = "backlight"; |
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.. | .. |
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123 | 151 | compatible = "ti,omap-dmtimer-pwm"; |
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124 | 152 | ti,timers = <&timer11>; |
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125 | 153 | #pwm-cells = <3>; |
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| 154 | + ti,clock-source = <0x01>; |
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126 | 155 | }; |
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127 | 156 | |
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128 | 157 | hsusb2_phy: hsusb2_phy { |
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.. | .. |
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169 | 198 | wifi_pwrseq: wifi_pwrseq { |
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170 | 199 | compatible = "mmc-pwrseq-simple"; |
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171 | 200 | reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>; /* W2CBW003 reset through tca6507 */ |
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| 201 | + }; |
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| 202 | + |
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| 203 | + /* devconf0 setup for mcbsp1 clock pins */ |
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| 204 | + pinmux_mcbsp1@48002274 { |
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| 205 | + compatible = "pinctrl-single"; |
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| 206 | + reg = <0x48002274 4>; /* CONTROL_DEVCONF0 */ |
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| 207 | + #address-cells = <1>; |
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| 208 | + #size-cells = <0>; |
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| 209 | + pinctrl-single,bit-per-mux; |
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| 210 | + pinctrl-single,register-width = <32>; |
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| 211 | + pinctrl-single,function-mask = <0x7>; /* MCBSP1 CLK pinmux */ |
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| 212 | + #pinctrl-cells = <2>; |
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| 213 | + pinctrl-names = "default"; |
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| 214 | + pinctrl-0 = <&mcbsp1_devconf0_pins>; |
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| 215 | + mcbsp1_devconf0_pins: pinmux_mcbsp1_devconf0_pins { |
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| 216 | + /* offset bits mask */ |
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| 217 | + pinctrl-single,bits = <0x00 0x08 0x1c>; /* set MCBSP1_CLKR */ |
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| 218 | + }; |
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| 219 | + }; |
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| 220 | + |
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| 221 | + /* devconf1 setup for tvout pins */ |
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| 222 | + pinmux_tv_out@480022d8 { |
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| 223 | + compatible = "pinctrl-single"; |
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| 224 | + reg = <0x480022d8 4>; /* CONTROL_DEVCONF1 */ |
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| 225 | + #address-cells = <1>; |
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| 226 | + #size-cells = <0>; |
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| 227 | + pinctrl-single,bit-per-mux; |
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| 228 | + pinctrl-single,register-width = <32>; |
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| 229 | + pinctrl-single,function-mask = <0x81>; /* TV out pin control */ |
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| 230 | + #pinctrl-cells = <2>; |
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| 231 | + pinctrl-names = "default"; |
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| 232 | + pinctrl-0 = <&tv_acbias_devconf1_pins>; |
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| 233 | + tv_acbias_devconf1_pins: pinmux_tv_acbias_devconf1_pins { |
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| 234 | + /* offset bits mask */ |
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| 235 | + pinctrl-single,bits = <0x00 0x40800 0x40800>; /* set TVOUTBYPASS and TVOUTACEN */ |
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| 236 | + }; |
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| 237 | + }; |
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| 238 | +}; |
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| 239 | + |
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| 240 | +&omap3_pmx_wkup { |
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| 241 | + gpio1_pins: pinmux_gpio1_pins { |
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| 242 | + pinctrl-single,pins = < |
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| 243 | + OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ |
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| 244 | + OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_clkout.gpio_10 */ |
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| 245 | + >; |
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172 | 246 | }; |
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173 | 247 | }; |
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174 | 248 | |
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.. | .. |
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221 | 295 | >; |
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222 | 296 | }; |
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223 | 297 | |
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224 | | - backlight_pins: backlight_pins_pimnux { |
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| 298 | + backlight_pins: backlight_pins_pinmux { |
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225 | 299 | pinctrl-single,pins = < |
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226 | 300 | OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3) /* gpt11/gpio57 */ |
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227 | 301 | >; |
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228 | 302 | }; |
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229 | 303 | |
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230 | 304 | dss_dpi_pins: pinmux_dss_dpi_pins { |
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231 | | - pinctrl-single,pins = < |
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| 305 | + pinctrl-single,pins = < |
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232 | 306 | OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ |
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233 | 307 | OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ |
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234 | 308 | OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ |
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.. | .. |
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260 | 334 | >; |
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261 | 335 | }; |
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262 | 336 | |
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| 337 | + gps_pins: pinmux_gps_pins { |
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| 338 | + pinctrl-single,pins = < |
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| 339 | + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* gpio145 */ |
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| 340 | + >; |
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| 341 | + }; |
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| 342 | + |
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263 | 343 | hdq_pins: hdq_pins { |
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264 | 344 | pinctrl-single,pins = < |
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265 | 345 | OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */ |
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| 346 | + >; |
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| 347 | + }; |
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| 348 | + |
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| 349 | + bmp085_pins: pinmux_bmp085_pins { |
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| 350 | + pinctrl-single,pins = < |
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| 351 | + OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio113 */ |
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266 | 352 | >; |
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267 | 353 | }; |
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268 | 354 | |
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.. | .. |
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288 | 374 | pinctrl-single,pins = < |
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289 | 375 | /* here we could enable to wakeup the cpu from suspend by a pen touch */ |
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290 | 376 | OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */ |
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| 377 | + >; |
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| 378 | + }; |
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| 379 | + |
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| 380 | + camera_pins: pinmux_camera_pins { |
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| 381 | + pinctrl-single,pins = < |
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| 382 | + /* set up parallel camera interface */ |
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| 383 | + OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_hs */ |
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| 384 | + OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_vs */ |
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| 385 | + OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */ |
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| 386 | + OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_pclk */ |
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| 387 | + OMAP3_CORE1_IOPAD(0x2114, PIN_OUTPUT | MUX_MODE4) /* cam_fld = gpio_98 */ |
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| 388 | + OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d0 */ |
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| 389 | + OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d1 */ |
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| 390 | + OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d2 */ |
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| 391 | + OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d3 */ |
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| 392 | + OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d4 */ |
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| 393 | + OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d5 */ |
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| 394 | + OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d6 */ |
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| 395 | + OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d7 */ |
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| 396 | + OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d8 */ |
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| 397 | + OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d9 */ |
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| 398 | + OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */ |
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| 399 | + OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */ |
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| 400 | + OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE0) /* cam_xclkb */ |
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| 401 | + OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* cam_wen = gpio_167 */ |
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| 402 | + OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLDOWN | MUX_MODE4) /* cam_strobe */ |
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| 403 | + >; |
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| 404 | + }; |
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| 405 | + |
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| 406 | + mcbsp1_pins: pinmux_mcbsp1_pins { |
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| 407 | + pinctrl-single,pins = < |
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| 408 | + OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT | MUX_MODE4) /* mcbsp1_clkr.mcbsp1_clkr - gpio_156 FM interrupt */ |
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| 409 | + OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_clkr.mcbsp1_fsr */ |
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| 410 | + OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */ |
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| 411 | + OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */ |
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| 412 | + /* mcbsp_clks is used as PENIRQ */ |
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| 413 | + /* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0) mcbsp_clks.mcbsp_clks */ |
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| 414 | + OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */ |
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| 415 | + OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */ |
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| 416 | + >; |
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| 417 | + }; |
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| 418 | + |
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| 419 | + mcbsp2_pins: pinmux_mcbsp2_pins { |
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| 420 | + pinctrl-single,pins = < |
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| 421 | + OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ |
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| 422 | + OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_clkx */ |
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| 423 | + OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dr */ |
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| 424 | + OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dx */ |
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| 425 | + >; |
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| 426 | + }; |
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| 427 | + |
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| 428 | + mcbsp3_pins: pinmux_mcbsp3_pins { |
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| 429 | + pinctrl-single,pins = < |
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| 430 | + OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dx */ |
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| 431 | + OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dr */ |
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| 432 | + OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_clkx */ |
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| 433 | + OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_fsx */ |
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| 434 | + >; |
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| 435 | + }; |
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| 436 | + |
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| 437 | + mcbsp4_pins: pinmux_mcbsp4_pins { |
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| 438 | + pinctrl-single,pins = < |
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| 439 | + OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_clkx */ |
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| 440 | + OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_dr */ |
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| 441 | + OMAP3_CORE1_IOPAD(0x218a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_dx.mcbsp4_fsx */ |
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291 | 442 | >; |
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292 | 443 | }; |
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293 | 444 | }; |
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.. | .. |
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355 | 506 | bmp085@77 { |
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356 | 507 | compatible = "bosch,bmp085"; |
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357 | 508 | reg = <0x77>; |
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| 509 | + pinctrl-names = "default"; |
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| 510 | + pinctrl-0 = <&bmp085_pins>; |
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358 | 511 | interrupt-parent = <&gpio4>; |
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359 | 512 | interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */ |
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360 | 513 | }; |
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.. | .. |
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410 | 563 | reg = <0x4>; |
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411 | 564 | }; |
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412 | 565 | |
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413 | | - wifi_reset: wifi_reset@6 { |
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| 566 | + wifi_reset: wifi_reset@6 { /* reference as <&tca_gpios 0 0> since it is currently the only GPIO */ |
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414 | 567 | reg = <0x6>; |
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415 | 568 | compatible = "gpio"; |
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416 | 569 | }; |
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.. | .. |
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479 | 632 | vmmc-supply = <&vmmc1>; |
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480 | 633 | bus-width = <4>; |
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481 | 634 | ti,non-removable; |
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| 635 | + broken-cd; /* hardware has no CD */ |
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482 | 636 | }; |
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483 | 637 | |
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484 | 638 | &mmc2 { |
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.. | .. |
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493 | 647 | status = "disabled"; |
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494 | 648 | }; |
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495 | 649 | |
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| 650 | +#define BIT(x) (1 << (x)) |
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| 651 | +&twl_gpio { |
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| 652 | + /* pullups: BIT(2) */ |
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| 653 | + ti,pullups = <BIT(2)>; |
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| 654 | + /* |
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| 655 | + * pulldowns: |
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| 656 | + * BIT(0), BIT(1), BIT(6), BIT(7), BIT(8), BIT(13) |
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| 657 | + * BIT(15), BIT(16), BIT(17) |
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| 658 | + */ |
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| 659 | + ti,pulldowns = <(BIT(0) | BIT(1) | BIT(6) | BIT(7) | BIT(8) | |
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| 660 | + BIT(13) | BIT(15) | BIT(16) | BIT(17))>; |
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| 661 | +}; |
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| 662 | + |
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496 | 663 | &twl_keypad { |
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497 | 664 | status = "disabled"; |
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| 665 | +}; |
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| 666 | + |
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| 667 | +&gpio1 { |
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| 668 | + pinctrl-names = "default"; |
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| 669 | + pinctrl-0 = <&gpio1_pins>; |
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498 | 670 | }; |
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499 | 671 | |
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500 | 672 | &uart1 { |
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.. | .. |
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505 | 677 | &uart2 { |
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506 | 678 | pinctrl-names = "default"; |
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507 | 679 | pinctrl-0 = <&uart2_pins>; |
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| 680 | + gnss: gnss { |
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| 681 | + compatible = "wi2wi,w2sg0004"; |
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| 682 | + pinctrl-names = "default"; |
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| 683 | + pinctrl-0 = <&gps_pins>; |
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| 684 | + sirf,onoff-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; |
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| 685 | + lna-supply = <&vsim>; |
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| 686 | + vcc-supply = <&ldo_3v3>; |
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| 687 | + }; |
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508 | 688 | }; |
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509 | 689 | |
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510 | 690 | &uart3 { |
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511 | 691 | pinctrl-names = "default"; |
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512 | 692 | pinctrl-0 = <&uart3_pins>; |
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| 693 | + interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; |
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513 | 694 | }; |
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514 | 695 | |
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515 | 696 | &charger { |
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.. | .. |
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527 | 708 | &vaux2 { |
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528 | 709 | regulator-min-microvolt = <2800000>; |
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529 | 710 | regulator-max-microvolt = <2800000>; |
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530 | | - regulator-always-on; |
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| 711 | + regulator-always-on; /* we should never switch off while vio is on! */ |
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531 | 712 | }; |
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532 | 713 | |
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533 | 714 | /* camera */ |
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.. | .. |
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574 | 755 | |
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575 | 756 | vdda-supply = <&vdac>; |
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576 | 757 | |
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577 | | - #address-cells = <1>; |
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578 | | - #size-cells = <0>; |
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579 | | - |
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580 | 758 | port { |
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581 | | - reg = <0>; |
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582 | 759 | venc_out: endpoint { |
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583 | 760 | remote-endpoint = <&opa_in>; |
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584 | 761 | ti,channels = <1>; |
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.. | .. |
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596 | 773 | interrupt-parent = <&gpmc>; |
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597 | 774 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ |
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598 | 775 | <1 IRQ_TYPE_NONE>; /* termcount */ |
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| 776 | + ti,nand-ecc-opt = "ham1"; |
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| 777 | + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ |
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599 | 778 | nand-bus-width = <16>; |
---|
600 | | - ti,nand-ecc-opt = "bch8"; |
---|
| 779 | + #address-cells = <1>; |
---|
| 780 | + #size-cells = <1>; |
---|
601 | 781 | |
---|
602 | | - gpmc,sync-clk-ps = <0>; |
---|
| 782 | + gpmc,device-width = <2>; |
---|
603 | 783 | gpmc,cs-on-ns = <0>; |
---|
604 | 784 | gpmc,cs-rd-off-ns = <44>; |
---|
605 | 785 | gpmc,cs-wr-off-ns = <44>; |
---|
606 | 786 | gpmc,adv-on-ns = <6>; |
---|
607 | 787 | gpmc,adv-rd-off-ns = <34>; |
---|
608 | 788 | gpmc,adv-wr-off-ns = <44>; |
---|
609 | | - gpmc,we-off-ns = <40>; |
---|
610 | 789 | gpmc,oe-off-ns = <54>; |
---|
| 790 | + gpmc,we-off-ns = <40>; |
---|
611 | 791 | gpmc,access-ns = <64>; |
---|
612 | 792 | gpmc,rd-cycle-ns = <82>; |
---|
613 | 793 | gpmc,wr-cycle-ns = <82>; |
---|
614 | 794 | gpmc,wr-access-ns = <40>; |
---|
615 | 795 | gpmc,wr-data-mux-bus-ns = <0>; |
---|
616 | | - gpmc,device-width = <2>; |
---|
617 | | - |
---|
618 | | - #address-cells = <1>; |
---|
619 | | - #size-cells = <1>; |
---|
| 796 | + gpmc,sync-clk-ps = <0>; |
---|
620 | 797 | |
---|
621 | 798 | x-loader@0 { |
---|
622 | 799 | label = "X-Loader"; |
---|
.. | .. |
---|
645 | 822 | }; |
---|
646 | 823 | }; |
---|
647 | 824 | |
---|
648 | | -&mcbsp2 { |
---|
| 825 | +&mcbsp1 { /* FM Transceiver PCM */ |
---|
649 | 826 | status = "okay"; |
---|
| 827 | + #sound-dai-cells = <0>; |
---|
| 828 | + pinctrl-names = "default"; |
---|
| 829 | + pinctrl-0 = <&mcbsp1_pins>; |
---|
| 830 | +}; |
---|
| 831 | + |
---|
| 832 | +&mcbsp2 { /* TPS65950 I2S */ |
---|
| 833 | + status = "okay"; |
---|
| 834 | + pinctrl-names = "default"; |
---|
| 835 | + pinctrl-0 = <&mcbsp2_pins>; |
---|
| 836 | +}; |
---|
| 837 | + |
---|
| 838 | +&mcbsp3 { /* Bluetooth PCM */ |
---|
| 839 | + status = "okay"; |
---|
| 840 | + #sound-dai-cells = <0>; |
---|
| 841 | + pinctrl-names = "default"; |
---|
| 842 | + pinctrl-0 = <&mcbsp3_pins>; |
---|
| 843 | +}; |
---|
| 844 | + |
---|
| 845 | +&mcbsp4 { /* GSM voice PCM */ |
---|
| 846 | + status = "okay"; |
---|
| 847 | + #sound-dai-cells = <0>; |
---|
| 848 | + pinctrl-names = "default"; |
---|
| 849 | + pinctrl-0 = <&mcbsp4_pins>; |
---|
650 | 850 | }; |
---|
651 | 851 | |
---|
652 | 852 | &hdqw1w { |
---|
.. | .. |
---|
654 | 854 | pinctrl-0 = <&hdq_pins>; |
---|
655 | 855 | }; |
---|
656 | 856 | |
---|
657 | | -&mcbsp4 { |
---|
658 | | - status = "okay"; |
---|
| 857 | +/* image signal processor within OMAP3 SoC */ |
---|
| 858 | +&isp { |
---|
| 859 | + ports { |
---|
| 860 | + port@0 { |
---|
| 861 | + reg = <0>; |
---|
| 862 | + parallel_ep: endpoint { |
---|
| 863 | + ti,isp-clock-divisor = <1>; |
---|
| 864 | + ti,strobe-mode; |
---|
| 865 | + bus-width = <8>;/* Used data lines */ |
---|
| 866 | + data-shift = <2>; /* Lines 9:2 are used */ |
---|
| 867 | + hsync-active = <0>; /* Active low */ |
---|
| 868 | + vsync-active = <1>; /* Active high */ |
---|
| 869 | + data-active = <1>;/* Active high */ |
---|
| 870 | + pclk-sample = <1>;/* Falling */ |
---|
| 871 | + }; |
---|
| 872 | + }; |
---|
| 873 | + /* port@1 and port@2 are not used by GTA04 */ |
---|
| 874 | + }; |
---|
659 | 875 | }; |
---|