add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/imx7s-warp.dts
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@@ -1,44 +1,7 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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 /*
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  * Copyright (C) 2016 NXP Semiconductors.
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  * Author: Fabio Estevam <fabio.estevam@nxp.com>
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- *
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- * This file is dual-licensed: you can use it either under the terms
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- * of the GPL or the X11 license, at your option. Note that this dual
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- * licensing only applies to this file, and not this project as a
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- * whole.
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- *
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- *  a) This file is free software; you can redistribute it and/or
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- *     modify it under the terms of the GNU General Public License as
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- *     published by the Free Software Foundation; either version 2 of the
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- *     License, or (at your option) any later version.
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- *
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- *     This file is distributed in the hope that it will be useful,
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- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
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- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- *     GNU General Public License for more details.
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- *
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- * Or, alternatively,
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- *
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- *  b) Permission is hereby granted, free of charge, to any person
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- *     obtaining a copy of this software and associated documentation
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- *     files (the "Software"), to deal in the Software without
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- *     restriction, including without limitation the rights to use,
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- *     copy, modify, merge, publish, distribute, sublicense, and/or
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- *     sell copies of the Software, and to permit persons to whom the
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- *     Software is furnished to do so, subject to the following
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- *     conditions:
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- *
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- *     The above copyright notice and this permission notice shall be
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- *     included in all copies or substantial portions of the Software.
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- *
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- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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- *     OTHER DEALINGS IN THE SOFTWARE.
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  */
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 /dts-v1/;
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@@ -92,6 +55,14 @@
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 		regulator-always-on;
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 	};
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+	reg_peri_3p15v: regulator-peri-3p15v {
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+		compatible = "regulator-fixed";
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+		regulator-name = "peri_3p15v_reg";
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+		regulator-min-microvolt = <3150000>;
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+		regulator-max-microvolt = <3150000>;
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+		regulator-always-on;
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+	};
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+
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 	sound {
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 		compatible = "simple-audio-card";
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 		simple-audio-card,name = "imx7-sgtl5000";
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@@ -104,7 +75,7 @@
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 		dailink_master: simple-audio-card,codec {
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 			sound-dai = <&codec>;
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-			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
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+			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
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 		};
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 	};
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 };
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@@ -112,6 +83,10 @@
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 &clks {
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 	assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
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 	assigned-clock-rates = <884736000>;
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+};
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+
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+&csi {
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+	status = "okay";
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 };
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 &i2c1 {
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@@ -158,6 +133,8 @@
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 			swbst_reg: swbst {
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 				regulator-min-microvolt = <5000000>;
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 				regulator-max-microvolt = <5150000>;
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+				regulator-boot-on;
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+				regulator-always-on;
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 			};
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 			snvs_reg: vsnvs {
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@@ -215,6 +192,34 @@
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_i2c2>;
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 	status = "okay";
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+
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+	ov2680: camera@36 {
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+		compatible = "ovti,ov2680";
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+		pinctrl-names = "default";
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+		pinctrl-0 = <&pinctrl_ov2680>;
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+		reg = <0x36>;
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+		clocks = <&osc>;
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+		clock-names = "xvclk";
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+		reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
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+		DOVDD-supply = <&sw2_reg>;
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+		DVDD-supply = <&sw2_reg>;
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+		AVDD-supply = <&reg_peri_3p15v>;
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+
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+		port {
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+			ov2680_to_mipi: endpoint {
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+				remote-endpoint = <&mipi_from_sensor>;
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+				clock-lanes = <0>;
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+				data-lanes = <1>;
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+			};
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+		};
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+	};
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+};
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+
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+&i2c3 {
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+	clock-frequency = <100000>;
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_i2c3>;
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+	status = "okay";
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 };
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 &i2c4 {
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@@ -227,7 +232,7 @@
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 		#sound-dai-cells = <0>;
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 		reg = <0x0a>;
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 		compatible = "fsl,sgtl5000";
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-		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
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+		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
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 		pinctrl-names = "default";
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 		pinctrl-0 = <&pinctrl_sai1_mclk>;
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 		VDDA-supply = <&vgen4_reg>;
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@@ -238,6 +243,22 @@
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 	mpl3115@60 {
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 		compatible = "fsl,mpl3115";
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 		reg = <0x60>;
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+	};
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+};
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+
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+&mipi_csi {
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+	clock-frequency = <166000000>;
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+	fsl,csis-hs-settle = <3>;
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+	status = "okay";
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+
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+	port@0 {
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+		reg = <0>;
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+
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+		mipi_from_sensor: endpoint {
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+			remote-endpoint = <&ov2680_to_mipi>;
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+			data-lanes = <1>;
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+		};
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+
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 	};
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 };
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@@ -307,6 +328,10 @@
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 	status = "okay";
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 };
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+&video_mux {
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+	status = "okay";
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+};
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+
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 &wdog1 {
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_wdog>;
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@@ -347,6 +372,13 @@
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 		>;
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 	};
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+	pinctrl_i2c3: i2c3grp {
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+		fsl,pins = <
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+			MX7D_PAD_I2C3_SDA__I2C3_SDA	0x4000007f
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+			MX7D_PAD_I2C3_SCL__I2C3_SCL	0x4000007f
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+		>;
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+	};
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+
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 	pinctrl_i2c4: i2c4grp {
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 		fsl,pins = <
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 			MX7D_PAD_I2C4_SCL__I2C4_SCL	0x4000007f
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@@ -354,6 +386,12 @@
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 		>;
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 	};
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+	pinctrl_ov2680: ov2660grp {
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+		fsl,pins = <
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+			MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3	0x14
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+		>;
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+	};
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+
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 	pinctrl_sai1: sai1grp {
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 		fsl,pins = <
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 			MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0	0x1f