forked from ~ljy/RK356X_SDK_RELEASE

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hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/imx6ull-colibri.dtsi
....@@ -37,7 +37,7 @@
3737 
3838 	reg_sd1_vmmc: regulator-sd1-vmmc {
3939 		compatible = "regulator-gpio";
40
-		gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
40
+		gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
4141 		pinctrl-names = "default";
4242 		pinctrl-0 = <&pinctrl_snvs_reg_sd>;
4343 		regulator-always-on;
....@@ -54,16 +54,29 @@
5454 	vref-supply = <&reg_module_3v3_avdd>;
5555 };
5656 
57
+&can1 {
58
+	pinctrl-names = "default";
59
+	pinctrl-0 = <&pinctrl_flexcan1>;
60
+	status = "disabled";
61
+};
62
+
63
+&can2 {
64
+	pinctrl-names = "default";
65
+	pinctrl-0 = <&pinctrl_flexcan2>;
66
+	status = "disabled";
67
+};
68
+
5769 /* Colibri SPI */
5870 &ecspi1 {
59
-	cs-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>;
71
+	cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
6072 	pinctrl-names = "default";
6173 	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
6274 };
6375 
6476 &fec2 {
65
-	pinctrl-names = "default";
77
+	pinctrl-names = "default", "sleep";
6678 	pinctrl-0 = <&pinctrl_enet2>;
79
+	pinctrl-1 = <&pinctrl_enet2_sleep>;
6780 	phy-mode = "rmii";
6881 	phy-handle = <&ethphy1>;
6982 	status = "okay";
....@@ -94,16 +107,16 @@
94107 	pinctrl-names = "default", "gpio";
95108 	pinctrl-0 = <&pinctrl_i2c1>;
96109 	pinctrl-1 = <&pinctrl_i2c1_gpio>;
97
-	sda-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
98
-	scl-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
110
+	sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
111
+	scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
99112 };
100113 
101114 &i2c2 {
102115 	pinctrl-names = "default", "gpio";
103116 	pinctrl-0 = <&pinctrl_i2c2>;
104117 	pinctrl-1 = <&pinctrl_i2c2_gpio>;
105
-	sda-gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
106
-	scl-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
118
+	sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
119
+	scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
107120 	status = "okay";
108121 
109122 	ad7879@2c {
....@@ -132,25 +145,21 @@
132145 &pwm4 {
133146 	pinctrl-names = "default";
134147 	pinctrl-0 = <&pinctrl_pwm4>;
135
-	#pwm-cells = <3>;
136148 };
137149 
138150 &pwm5 {
139151 	pinctrl-names = "default";
140152 	pinctrl-0 = <&pinctrl_pwm5>;
141
-	#pwm-cells = <3>;
142153 };
143154 
144155 &pwm6 {
145156 	pinctrl-names = "default";
146157 	pinctrl-0 = <&pinctrl_pwm6>;
147
-	#pwm-cells = <3>;
148158 };
149159 
150160 &pwm7 {
151161 	pinctrl-names = "default";
152162 	pinctrl-0 = <&pinctrl_pwm7>;
153
-	#pwm-cells = <3>;
154163 };
155164 
156165 &sdma {
....@@ -198,10 +207,16 @@
198207 	assigned-clock-rates = <0>, <198000000>;
199208 };
200209 
210
+&wdog1 {
211
+	pinctrl-names = "default";
212
+	pinctrl-0 = <&pinctrl_wdog>;
213
+	fsl,ext-reset-output;
214
+};
215
+
201216 &iomuxc {
202217 	pinctrl_can_int: canint-grp {
203218 		fsl,pins = <
204
-			MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04	0X14 /* SODIMM 73 */
219
+			MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04	0x13010	/* SODIMM 73 */
205220 		>;
206221 	};
207222 
....@@ -220,17 +235,39 @@
220235 		>;
221236 	};
222237 
238
+	pinctrl_enet2_sleep: enet2sleepgrp {
239
+		fsl,pins = <
240
+			MX6UL_PAD_GPIO1_IO06__GPIO1_IO06	0x0
241
+			MX6UL_PAD_GPIO1_IO07__GPIO1_IO07	0x0
242
+			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x0
243
+			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	0x0
244
+			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x0
245
+			MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15	0x0
246
+			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
247
+			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x0
248
+			MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12	0x0
249
+			MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13	0x0
250
+		>;
251
+	};
252
+
223253 	pinctrl_ecspi1_cs: ecspi1-cs-grp {
224254 		fsl,pins = <
225
-			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x000a0
255
+			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x70a0	/* SODIMM 86 */
226256 		>;
227257 	};
228258 
229259 	pinctrl_ecspi1: ecspi1-grp {
230260 		fsl,pins = <
231
-			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x000a0
232
-			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x000a0
233
-			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x100a0
261
+			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x000a0	/* SODIMM 88 */
262
+			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x000a0 /* SODIMM 92 */
263
+			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x100a0 /* SODIMM 90 */
264
+		>;
265
+	};
266
+
267
+	pinctrl_flexcan1: flexcan1-grp {
268
+		fsl,pins = <
269
+			MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	0x1b020
270
+			MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	0x1b020
234271 		>;
235272 	};
236273 
....@@ -243,63 +280,68 @@
243280 
244281 	pinctrl_gpio_bl_on: gpio-bl-on-grp {
245282 		fsl,pins = <
246
-			MX6UL_PAD_JTAG_TMS__GPIO1_IO11		0x000a0
283
+			MX6UL_PAD_JTAG_TMS__GPIO1_IO11		0x30a0	/* SODIMM 71 */
247284 		>;
248285 	};
249286 
250287 	pinctrl_gpio1: gpio1-grp {
251288 		fsl,pins = <
252
-			MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00	0x74 /* SODIMM 55 */
253
-			MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01	0x74 /* SODIMM 63 */
254
-			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0X14 /* SODIMM 77 */
255
-			MX6UL_PAD_JTAG_TCK__GPIO1_IO14		0x14 /* SODIMM 99 */
256
-			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x14 /* SODIMM 133 */
257
-			MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24	0x14 /* SODIMM 135 */
258
-			MX6UL_PAD_UART3_CTS_B__GPIO1_IO26	0x14 /* SODIMM 100 */
259
-			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15	0x14 /* SODIMM 102 */
260
-			MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07	0x14 /* SODIMM 104 */
261
-			MX6UL_PAD_UART3_RTS_B__GPIO1_IO27	0x14 /* SODIMM 186 */
289
+			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x10b0 /* SODIMM 77 */
290
+			MX6UL_PAD_JTAG_TCK__GPIO1_IO14		0x70a0 /* SODIMM 99 */
291
+			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x10b0 /* SODIMM 133 */
292
+			MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24	0x10b0 /* SODIMM 135 */
293
+			MX6UL_PAD_UART3_CTS_B__GPIO1_IO26	0x10b0 /* SODIMM 100 */
294
+			MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15	0x70a0 /* SODIMM 102 */
295
+			MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07	0x10b0 /* SODIMM 104 */
296
+			MX6UL_PAD_UART3_RTS_B__GPIO1_IO27	0x10b0 /* SODIMM 186 */
262297 		>;
263298 	};
264299 
265300 	pinctrl_gpio2: gpio2-grp { /* Camera */
266301 		fsl,pins = <
267
-			MX6UL_PAD_CSI_DATA04__GPIO4_IO25	0x74 /* SODIMM 69 */
268
-			MX6UL_PAD_CSI_MCLK__GPIO4_IO17		0x14 /* SODIMM 75 */
269
-			MX6UL_PAD_CSI_DATA06__GPIO4_IO27	0x14 /* SODIMM 85 */
270
-			MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18	0x14 /* SODIMM 96 */
271
-			MX6UL_PAD_CSI_DATA05__GPIO4_IO26	0x14 /* SODIMM 98 */
302
+			MX6UL_PAD_CSI_DATA04__GPIO4_IO25	0x10b0 /* SODIMM 69 */
303
+			MX6UL_PAD_CSI_MCLK__GPIO4_IO17		0x10b0 /* SODIMM 75 */
304
+			MX6UL_PAD_CSI_DATA06__GPIO4_IO27	0x10b0 /* SODIMM 85 */
305
+			MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18	0x10b0 /* SODIMM 96 */
306
+			MX6UL_PAD_CSI_DATA05__GPIO4_IO26	0x10b0 /* SODIMM 98 */
272307 		>;
273308 	};
274309 
275310 	pinctrl_gpio3: gpio3-grp { /* CAN2 */
276311 		fsl,pins = <
277
-			MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02	0x14 /* SODIMM 178 */
278
-			MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03	0x14 /* SODIMM 188 */
312
+			MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02	0x10b0 /* SODIMM 178 */
313
+			MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03	0x10b0 /* SODIMM 188 */
279314 		>;
280315 	};
281316 
282317 	pinctrl_gpio4: gpio4-grp {
283318 		fsl,pins = <
284
-			MX6UL_PAD_CSI_DATA07__GPIO4_IO28	0x74 /* SODIMM 65 */
319
+			MX6UL_PAD_CSI_DATA07__GPIO4_IO28	0x10b0 /* SODIMM 65 */
285320 		>;
286321 	};
287322 
288323 	pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */
289324 		fsl,pins = <
290
-			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x74 /* SODIMM 106 */
325
+			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0xb0a0 /* SODIMM 106 */
291326 		>;
292327 	};
293328 
294329 	pinctrl_gpio6: gpio6-grp { /* Wifi pins */
295330 		fsl,pins = <
296
-			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x14 /* SODIMM 89 */
297
-			MX6UL_PAD_CSI_DATA02__GPIO4_IO23	0x14 /* SODIMM 79 */
298
-			MX6UL_PAD_CSI_VSYNC__GPIO4_IO19		0x14 /* SODIMM 81 */
299
-			MX6UL_PAD_CSI_DATA03__GPIO4_IO24	0x14 /* SODIMM 97 */
300
-			MX6UL_PAD_CSI_DATA00__GPIO4_IO21	0x14 /* SODIMM 101 */
301
-			MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x14 /* SODIMM 103 */
302
-			MX6UL_PAD_CSI_HSYNC__GPIO4_IO20		0x14 /* SODIMM 94 */
331
+			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x10b0 /* SODIMM 89 */
332
+			MX6UL_PAD_CSI_DATA02__GPIO4_IO23	0x10b0 /* SODIMM 79 */
333
+			MX6UL_PAD_CSI_VSYNC__GPIO4_IO19		0x10b0 /* SODIMM 81 */
334
+			MX6UL_PAD_CSI_DATA03__GPIO4_IO24	0x10b0 /* SODIMM 97 */
335
+			MX6UL_PAD_CSI_DATA00__GPIO4_IO21	0x10b0 /* SODIMM 101 */
336
+			MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x10b0 /* SODIMM 103 */
337
+			MX6UL_PAD_CSI_HSYNC__GPIO4_IO20		0x10b0 /* SODIMM 94 */
338
+		>;
339
+	};
340
+
341
+	pinctrl_gpio7: gpio7-grp { /* CAN1 */
342
+		fsl,pins = <
343
+			MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00	0xb0b0/* SODIMM 55 */
344
+			MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01	0xb0b0 /* SODIMM 63 */
303345 		>;
304346 	};
305347 
....@@ -324,15 +366,15 @@
324366 
325367 	pinctrl_i2c1: i2c1-grp {
326368 		fsl,pins = <
327
-			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
328
-			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
369
+			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0	/* SODIMM 196 */
370
+			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0	/* SODIMM 194 */
329371 		>;
330372 	};
331373 
332374 	pinctrl_i2c1_gpio: i2c1-gpio-grp {
333375 		fsl,pins = <
334
-			MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0
335
-			MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0
376
+			MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0	/* SODIMM 196 */
377
+			MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0	/* SODIMM 194 */
336378 		>;
337379 	};
338380 
....@@ -352,107 +394,107 @@
352394 
353395 	pinctrl_lcdif_dat: lcdif-dat-grp {
354396 		fsl,pins = <
355
-			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x00079
356
-			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x00079
357
-			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x00079
358
-			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x00079
359
-			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x00079
360
-			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x00079
361
-			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x00079
362
-			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x00079
363
-			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x00079
364
-			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x00079
365
-			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x00079
366
-			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x00079
367
-			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x00079
368
-			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x00079
369
-			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x00079
370
-			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x00079
371
-			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x00079
372
-			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x00079
397
+			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x00079	/* SODIMM 76 */
398
+			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x00079	/* SODIMM 70 */
399
+			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x00079	/* SODIMM 60 */
400
+			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x00079	/* SODIMM 58 */
401
+			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x00079	/* SODIMM 78 */
402
+			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x00079	/* SODIMM 72 */
403
+			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x00079	/* SODIMM 80 */
404
+			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x00079	/* SODIMM 46 */
405
+			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x00079	/* SODIMM 62 */
406
+			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x00079	/* SODIMM 48 */
407
+			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x00079	/* SODIMM 74 */
408
+			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x00079	/* SODIMM 50 */
409
+			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x00079	/* SODIMM 52 */
410
+			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x00079	/* SODIMM 54 */
411
+			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x00079	/* SODIMM 66 */
412
+			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x00079	/* SODIMM 64 */
413
+			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x00079	/* SODIMM 57 */
414
+			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x00079	/* SODIMM 61 */
373415 		>;
374416 	};
375417 
376418 	pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
377419 		fsl,pins = <
378
-			MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x00079
379
-			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x00079
380
-			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x00079
381
-			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x00079
420
+			MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x00079	/* SODIMM 56 */
421
+			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x00079	/* SODIMM 44 */
422
+			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x00079	/* SODIMM 68 */
423
+			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x00079	/* SODIMM 82 */
382424 		>;
383425 	};
384426 
385427 	pinctrl_pwm4: pwm4-grp {
386428 		fsl,pins = <
387
-			MX6UL_PAD_NAND_WP_B__PWM4_OUT	0x00079
429
+			MX6UL_PAD_NAND_WP_B__PWM4_OUT	0x00079		/* SODIMM 59 */
388430 		>;
389431 	};
390432 
391433 	pinctrl_pwm5: pwm5-grp {
392434 		fsl,pins = <
393
-			MX6UL_PAD_NAND_DQS__PWM5_OUT	0x00079
435
+			MX6UL_PAD_NAND_DQS__PWM5_OUT	0x00079		/* SODIMM 28 */
394436 		>;
395437 	};
396438 
397439 	pinctrl_pwm6: pwm6-grp {
398440 		fsl,pins = <
399
-			MX6UL_PAD_ENET1_TX_EN__PWM6_OUT	0x00079
441
+			MX6UL_PAD_ENET1_TX_EN__PWM6_OUT	0x00079		/* SODIMM 30 */
400442 		>;
401443 	};
402444 
403445 	pinctrl_pwm7: pwm7-grp {
404446 		fsl,pins = <
405
-			MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT	0x00079
447
+			MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT	0x00079	/* SODIMM 67 */
406448 		>;
407449 	};
408450 
409451 	pinctrl_uart1: uart1-grp {
410452 		fsl,pins = <
411
-			MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX	0x1b0b1
412
-			MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX	0x1b0b1
413
-			MX6UL_PAD_UART1_RTS_B__UART1_DTE_CTS	0x1b0b1
414
-			MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS	0x1b0b1
453
+			MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX	0x1b0b1	/* SODIMM 33 */
454
+			MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX	0x1b0b1	/* SODIMM 35 */
455
+			MX6UL_PAD_UART1_RTS_B__UART1_DTE_CTS	0x1b0b1	/* SODIMM 27 */
456
+			MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS	0x1b0b1	/* SODIMM 25 */
415457 		>;
416458 	};
417459 
418460 	pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */
419461 		fsl,pins = <
420
-			MX6UL_PAD_JTAG_TDI__GPIO1_IO13		0x1b0b1 /* DCD */
421
-			MX6UL_PAD_LCD_DATA18__GPIO3_IO23	0x1b0b1 /* DSR */
422
-			MX6UL_PAD_JTAG_TDO__GPIO1_IO12		0x1b0b1 /* DTR */
423
-			MX6UL_PAD_LCD_DATA19__GPIO3_IO24        0x1b0b1 /* RI */
462
+			MX6UL_PAD_JTAG_TDI__GPIO1_IO13		0x70a0 /* SODIMM 31 */
463
+			MX6UL_PAD_LCD_DATA18__GPIO3_IO23	0x10b0 /* SODIMM 29 */
464
+			MX6UL_PAD_JTAG_TDO__GPIO1_IO12		0x90b1 /* SODIMM 23 */
465
+			MX6UL_PAD_LCD_DATA19__GPIO3_IO24        0x10b0 /* SODIMM 37 */
424466 		>;
425467 	};
426468 
427469 	pinctrl_uart2: uart2-grp {
428470 		fsl,pins = <
429
-			MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX	0x1b0b1
430
-			MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX	0x1b0b1
431
-			MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS	0x1b0b1
432
-			MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS	0x1b0b1
471
+			MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX	0x1b0b1 /* SODIMM 36 */
472
+			MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX	0x1b0b1 /* SODIMM 38 */
473
+			MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS	0x1b0b1 /* SODIMM 32 */
474
+			MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS	0x1b0b1 /* SODIMM 34 */
433475 		>;
434476 	};
435477 	pinctrl_uart5: uart5-grp {
436478 		fsl,pins = <
437
-			MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX	0x1b0b1
438
-			MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX	0x1b0b1
479
+			MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX	0x1b0b1 /* SODIMM 19 */
480
+			MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX	0x1b0b1 /* SODIMM 21 */
439481 		>;
440482 	};
441483 
442484 	pinctrl_usbh_reg: gpio-usbh-reg {
443485 		fsl,pins = <
444
-			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x1b0b1 /* SODIMM 129 USBH PEN */
486
+			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x10b0 /* SODIMM 129 */
445487 		>;
446488 	};
447489 
448490 	pinctrl_usdhc1: usdhc1-grp {
449491 		fsl,pins = <
450
-			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x17059
451
-			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x10059
452
-			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059
453
-			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059
454
-			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059
455
-			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059
492
+			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x17059 /* SODIMM 47 */
493
+			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x10059 /* SODIMM 190 */
494
+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059 /* SODIMM 192 */
495
+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059 /* SODIMM 49 */
496
+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059 /* SODIMM 51 */
497
+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059 /* SODIMM 53 */
456498 		>;
457499 	};
458500 
....@@ -487,7 +529,13 @@
487529 			MX6UL_PAD_CSI_HSYNC__USDHC2_CMD		0x17059
488530 			MX6UL_PAD_CSI_VSYNC__USDHC2_CLK		0x17059
489531 
490
-			MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT	0x14
532
+			MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT	0x10
533
+		>;
534
+	};
535
+
536
+	pinctrl_wdog: wdog-grp {
537
+		fsl,pins = <
538
+			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
491539 		>;
492540 	};
493541 };
....@@ -495,59 +543,65 @@
495543 &iomuxc_snvs {
496544 	pinctrl_snvs_gpio1: snvs-gpio1-grp {
497545 		fsl,pins = <
498
-			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x14 /* SODIMM 93 */
499
-			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x14 /* SODIMM 95 */
500
-			MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10	0x74 /* SODIMM 105 */
501
-			MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05	0x14 /* SODIMM 131 USBH OC */
502
-			MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x74 /* SODIMM 138 */
546
+			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x110a0	/* SODIMM 93 */
547
+			MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03	0x110a0	/* SODIMM 95 */
548
+			MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10	0x1b0a0	/* SODIMM 105 */
549
+			MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05	0x0b0a0	/* SODIMM 131 */
550
+			MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08	0x110a0	/* SODIMM 138 */
503551 		>;
504552 	};
505553 
506554 	pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */
507555 		fsl,pins = <
508
-			MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04	0x74 /* SODIMM 107 */
556
+			MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04	0xb0a0	/* SODIMM 107 */
509557 		>;
510558 	};
511559 
512560 	pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */
513561 		fsl,pins = <
514
-			MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11	0x14 /* SODIMM 127 */
562
+			MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11	0x130a0	/* SODIMM 127 */
515563 		>;
516564 	};
517565 
518566 	pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */
519567 		fsl,pins = <
520
-			MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07	0x1b0b0
568
+			MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07	0x100b0
521569 		>;
522570 	};
523571 
524572 	pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
525573 		fsl,pins = <
526
-			MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x4001b8b0
574
+			MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09	0x400100b0
527575 		>;
528576 	};
529577 
530578 	pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
531579 		fsl,pins = <
532
-			MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x1b0b0
580
+			MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x130b0
533581 		>;
534582 	};
535583 
536584 	pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp {
537585 		fsl,pins = <
538
-			MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x130b0
586
+			MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01	0x130a0	/* SODIMM 45 */
539587 		>;
540588 	};
541589 
542590 	pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp {
543591 		fsl,pins = <
544
-			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x1b0b0 /* CD */
592
+			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x1b0a0 /* SODIMM 43 */
593
+		>;
594
+	};
595
+
596
+	pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp {
597
+		fsl,pins = <
598
+			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x0
545599 		>;
546600 	};
547601 
548602 	pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp {
549603 		fsl,pins = <
550
-			MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11	0x14
604
+			MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11	0x130a0
551605 		>;
552606 	};
553607 };