add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi
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@@ -7,6 +7,11 @@
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  */
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 / {
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+	memory@80000000 {
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+		device_type = "memory";
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+		reg = <0x80000000 0>; /* will be filled by U-Boot */
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+	};
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+
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 	reserved-memory {
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 		#address-cells = <1>;
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 		#size-cells = <1>;
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@@ -161,6 +166,25 @@
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 	};
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 };
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+/* UART1 (Bluetooth) */
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+&uart1 {
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_uart1>;
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+	uart-has-rtscts;
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+	status = "okay";
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+};
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+
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+/* USDHC1 (Wireless) */
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+&usdhc1 {
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+	pinctrl-names = "default", "sleep";
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+	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_wifibt_ctrl>;
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+	pinctrl-1 = <&pinctrl_usdhc1_sleep &pinctrl_wifibt_ctrl_sleep>;
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+	non-removable;
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+	no-1-8-v;
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+	bus-width = <4>;
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+	status = "okay";
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+};
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+
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 &iomuxc {
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 	pinctrl_gpmi_nand: gpmigrp {
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 		fsl,pins = <
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@@ -179,15 +203,60 @@
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 			MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06	0xb0b1
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 			MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07	0xb0b1
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 			MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B	0xb0b1
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-			>;
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-		};
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+		>;
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+	};
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 	pinctrl_i2c1: i2c1grp {
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 		fsl,pins = <
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 			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
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 			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
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-			>;
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-		};
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+		>;
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+	};
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+
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+	pinctrl_uart1: uart1grp {
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+		fsl,pins = <
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+			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1
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+			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX   0x1b0b1
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+			MX6UL_PAD_UART1_RTS_B__UART1_DCE_RTS    0x1b0b1
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+			MX6UL_PAD_UART1_CTS_B__UART1_DCE_CTS    0x1b0b1
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+		>;
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+	};
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+
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+	pinctrl_usdhc1: usdhc1grp {
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+		fsl,pins = <
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+			MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
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+			MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x17051
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+			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
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+			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
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+			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
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+			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
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+		>;
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+	};
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+
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+	pinctrl_usdhc1_sleep: usdhc1grp-sleep {
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+		fsl,pins = <
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+			MX6UL_PAD_SD1_CMD__GPIO2_IO16           0x3000
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+			MX6UL_PAD_SD1_CLK__GPIO2_IO17           0x3000
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+			MX6UL_PAD_SD1_DATA0__GPIO2_IO18         0x3000
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+			MX6UL_PAD_SD1_DATA1__GPIO2_IO19         0x3000
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+			MX6UL_PAD_SD1_DATA2__GPIO2_IO20         0x3000
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+			MX6UL_PAD_SD1_DATA3__GPIO2_IO21         0x3000
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+		>;
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+	};
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+
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+	pinctrl_wifibt_ctrl: wifibt-ctrl-grp {
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+		fsl,pins = <
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+			MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x08a0
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+			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09      0x08a0
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+		>;
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+	};
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+
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+	pinctrl_wifibt_ctrl_sleep: wifibt-ctrl-grp-sleep {
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+		fsl,pins = <
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+			MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x3000
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+			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09      0x3000
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+		>;
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+	};
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 };
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 &reg_arm {