add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/imx6sl.dtsi
..
..
@@ -23,6 +23,13 @@
23
23
 		gpio2 = &gpio3;
24
24
 		gpio3 = &gpio4;
25
25
 		gpio4 = &gpio5;
26
+		i2c0 = &i2c1;
27
+		i2c1 = &i2c2;
28
+		i2c2 = &i2c3;
29
+		mmc0 = &usdhc1;
30
+		mmc1 = &usdhc2;
31
+		mmc2 = &usdhc3;
32
+		mmc3 = &usdhc4;
26
33
 		serial0 = &uart1;
27
34
 		serial1 = &uart2;
28
35
 		serial2 = &uart3;
..
..
@@ -67,16 +74,9 @@
67
74
 			arm-supply = <&reg_arm>;
68
75
 			pu-supply = <&reg_pu>;
69
76
 			soc-supply = <&reg_soc>;
77
+			nvmem-cells = <&cpu_speed_grade>;
78
+			nvmem-cell-names = "speed_grade";
70
79
 		};
71
-	};
72
-
73
-	intc: interrupt-controller@a01000 {
74
-		compatible = "arm,cortex-a9-gic";
75
-		#interrupt-cells = <3>;
76
-		interrupt-controller;
77
-		reg = <0x00a01000 0x1000>,
78
-		      <0x00a00100 0x100>;
79
-		interrupt-parent = <&intc>;
80
80
 	};
81
81
 
82
82
 	clocks {
..
..
@@ -93,19 +93,15 @@
93
93
 		};
94
94
 	};
95
95
 
96
-	tempmon: tempmon {
97
-		compatible = "fsl,imx6q-tempmon";
98
-		interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
99
-		interrupt-parent = <&gpc>;
100
-		fsl,tempmon = <&anatop>;
101
-		fsl,tempmon-data = <&ocotp>;
102
-		clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
103
-	};
104
-
105
96
 	pmu {
106
97
 		compatible = "arm,cortex-a9-pmu";
107
98
 		interrupt-parent = <&gpc>;
108
99
 		interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
100
+	};
101
+
102
+	usbphynop1: usbphynop1 {
103
+		compatible = "usb-nop-xceiv";
104
+		#phy-cells = <0>;
109
105
 	};
110
106
 
111
107
 	soc {
..
..
@@ -118,10 +114,22 @@
118
114
 		ocram: sram@900000 {
119
115
 			compatible = "mmio-sram";
120
116
 			reg = <0x00900000 0x20000>;
117
+			ranges = <0 0x00900000 0x20000>;
118
+			#address-cells = <1>;
119
+			#size-cells = <1>;
121
120
 			clocks = <&clks IMX6SL_CLK_OCRAM>;
122
121
 		};
123
122
 
124
-		L2: l2-cache@a02000 {
123
+		intc: interrupt-controller@a01000 {
124
+			compatible = "arm,cortex-a9-gic";
125
+			#interrupt-cells = <3>;
126
+			interrupt-controller;
127
+			reg = <0x00a01000 0x1000>,
128
+			      <0x00a00100 0x100>;
129
+			interrupt-parent = <&intc>;
130
+		};
131
+
132
+		L2: cache-controller@a02000 {
125
133
 			compatible = "arm,pl310-cache";
126
134
 			reg = <0x00a02000 0x1000>;
127
135
 			interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -131,7 +139,7 @@
131
139
 			arm,data-latency = <4 2 3>;
132
140
 		};
133
141
 
134
-		aips1: aips-bus@2000000 {
142
+		aips1: bus@2000000 {
135
143
 			compatible = "fsl,aips-bus", "simple-bus";
136
144
 			#address-cells = <1>;
137
145
 			#size-cells = <1>;
..
..
@@ -166,7 +174,7 @@
166
174
 					status = "disabled";
167
175
 				};
168
176
 
169
-				ecspi1: ecspi@2008000 {
177
+				ecspi1: spi@2008000 {
170
178
 					#address-cells = <1>;
171
179
 					#size-cells = <0>;
172
180
 					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
..
..
@@ -178,7 +186,7 @@
178
186
 					status = "disabled";
179
187
 				};
180
188
 
181
-				ecspi2: ecspi@200c000 {
189
+				ecspi2: spi@200c000 {
182
190
 					#address-cells = <1>;
183
191
 					#size-cells = <0>;
184
192
 					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
..
..
@@ -190,7 +198,7 @@
190
198
 					status = "disabled";
191
199
 				};
192
200
 
193
-				ecspi3: ecspi@2010000 {
201
+				ecspi3: spi@2010000 {
194
202
 					#address-cells = <1>;
195
203
 					#size-cells = <0>;
196
204
 					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
..
..
@@ -202,7 +210,7 @@
202
210
 					status = "disabled";
203
211
 				};
204
212
 
205
-				ecspi4: ecspi@2014000 {
213
+				ecspi4: spi@2014000 {
206
214
 					#address-cells = <1>;
207
215
 					#size-cells = <0>;
208
216
 					compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi";
..
..
@@ -329,46 +337,46 @@
329
337
 			};
330
338
 
331
339
 			pwm1: pwm@2080000 {
332
-				#pwm-cells = <2>;
340
+				#pwm-cells = <3>;
333
341
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
334
342
 				reg = <0x02080000 0x4000>;
335
343
 				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
336
-				clocks = <&clks IMX6SL_CLK_PWM1>,
344
+				clocks = <&clks IMX6SL_CLK_PERCLK>,
337
345
 					 <&clks IMX6SL_CLK_PWM1>;
338
346
 				clock-names = "ipg", "per";
339
347
 			};
340
348
 
341
349
 			pwm2: pwm@2084000 {
342
-				#pwm-cells = <2>;
350
+				#pwm-cells = <3>;
343
351
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
344
352
 				reg = <0x02084000 0x4000>;
345
353
 				interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
346
-				clocks = <&clks IMX6SL_CLK_PWM2>,
354
+				clocks = <&clks IMX6SL_CLK_PERCLK>,
347
355
 					 <&clks IMX6SL_CLK_PWM2>;
348
356
 				clock-names = "ipg", "per";
349
357
 			};
350
358
 
351
359
 			pwm3: pwm@2088000 {
352
-				#pwm-cells = <2>;
360
+				#pwm-cells = <3>;
353
361
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
354
362
 				reg = <0x02088000 0x4000>;
355
363
 				interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
356
-				clocks = <&clks IMX6SL_CLK_PWM3>,
364
+				clocks = <&clks IMX6SL_CLK_PERCLK>,
357
365
 					 <&clks IMX6SL_CLK_PWM3>;
358
366
 				clock-names = "ipg", "per";
359
367
 			};
360
368
 
361
369
 			pwm4: pwm@208c000 {
362
-				#pwm-cells = <2>;
370
+				#pwm-cells = <3>;
363
371
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
364
372
 				reg = <0x0208c000 0x4000>;
365
373
 				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
366
-				clocks = <&clks IMX6SL_CLK_PWM4>,
374
+				clocks = <&clks IMX6SL_CLK_PERCLK>,
367
375
 					 <&clks IMX6SL_CLK_PWM4>;
368
376
 				clock-names = "ipg", "per";
369
377
 			};
370
378
 
371
-			gpt: gpt@2098000 {
379
+			gpt: timer@2098000 {
372
380
 				compatible = "fsl,imx6sl-gpt";
373
381
 				reg = <0x02098000 0x4000>;
374
382
 				interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -479,30 +487,30 @@
479
487
 					      <&iomuxc 21 161 1>;
480
488
 			};
481
489
 
482
-			kpp: kpp@20b8000 {
490
+			kpp: keypad@20b8000 {
483
491
 				compatible = "fsl,imx6sl-kpp", "fsl,imx21-kpp";
484
492
 				reg = <0x020b8000 0x4000>;
485
493
 				interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
486
-				clocks = <&clks IMX6SL_CLK_DUMMY>;
494
+				clocks = <&clks IMX6SL_CLK_IPG>;
487
495
 				status = "disabled";
488
496
 			};
489
497
 
490
-			wdog1: wdog@20bc000 {
498
+			wdog1: watchdog@20bc000 {
491
499
 				compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
492
500
 				reg = <0x020bc000 0x4000>;
493
501
 				interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
494
-				clocks = <&clks IMX6SL_CLK_DUMMY>;
502
+				clocks = <&clks IMX6SL_CLK_IPG>;
495
503
 			};
496
504
 
497
-			wdog2: wdog@20c0000 {
505
+			wdog2: watchdog@20c0000 {
498
506
 				compatible = "fsl,imx6sl-wdt", "fsl,imx21-wdt";
499
507
 				reg = <0x020c0000 0x4000>;
500
508
 				interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
501
-				clocks = <&clks IMX6SL_CLK_DUMMY>;
509
+				clocks = <&clks IMX6SL_CLK_IPG>;
502
510
 				status = "disabled";
503
511
 			};
504
512
 
505
-			clks: ccm@20c4000 {
513
+			clks: clock-controller@20c4000 {
506
514
 				compatible = "fsl,imx6sl-ccm";
507
515
 				reg = <0x020c4000 0x4000>;
508
516
 				interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -513,13 +521,13 @@
513
521
 			anatop: anatop@20c8000 {
514
522
 				compatible = "fsl,imx6sl-anatop",
515
523
 					     "fsl,imx6q-anatop",
516
-					     "syscon", "simple-bus";
524
+					     "syscon", "simple-mfd";
517
525
 				reg = <0x020c8000 0x1000>;
518
526
 				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
519
527
 					     <0 54 IRQ_TYPE_LEVEL_HIGH>,
520
528
 					     <0 127 IRQ_TYPE_LEVEL_HIGH>;
521
529
 
522
-				regulator-1p1 {
530
+				reg_vdd1p1: regulator-1p1 {
523
531
 					compatible = "fsl,anatop-regulator";
524
532
 					regulator-name = "vdd1p1";
525
533
 					regulator-min-microvolt = <1000000>;
..
..
@@ -534,7 +542,7 @@
534
542
 					anatop-enable-bit = <0>;
535
543
 				};
536
544
 
537
-				regulator-3p0 {
545
+				reg_vdd3p0: regulator-3p0 {
538
546
 					compatible = "fsl,anatop-regulator";
539
547
 					regulator-name = "vdd3p0";
540
548
 					regulator-min-microvolt = <2800000>;
..
..
@@ -549,7 +557,7 @@
549
557
 					anatop-enable-bit = <0>;
550
558
 				};
551
559
 
552
-				regulator-2p5 {
560
+				reg_vdd2p5: regulator-2p5 {
553
561
 					compatible = "fsl,anatop-regulator";
554
562
 					regulator-name = "vdd2p5";
555
563
 					regulator-min-microvolt = <2250000>;
..
..
@@ -586,7 +594,6 @@
586
594
 					regulator-name = "vddpu";
587
595
 					regulator-min-microvolt = <725000>;
588
596
 					regulator-max-microvolt = <1450000>;
589
-					regulator-always-on;
590
597
 					anatop-reg-offset = <0x140>;
591
598
 					anatop-vol-bit-shift = <9>;
592
599
 					anatop-vol-bit-width = <5>;
..
..
@@ -613,6 +620,16 @@
613
620
 					anatop-min-bit-val = <1>;
614
621
 					anatop-min-voltage = <725000>;
615
622
 					anatop-max-voltage = <1450000>;
623
+				};
624
+
625
+				tempmon: tempmon {
626
+					compatible = "fsl,imx6q-tempmon";
627
+					interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
628
+					interrupt-parent = <&gpc>;
629
+					fsl,tempmon = <&anatop>;
630
+					nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
631
+					nvmem-cell-names = "calib", "temp_grade";
632
+					clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
616
633
 				};
617
634
 			};
618
635
 
..
..
@@ -664,7 +681,7 @@
664
681
 				interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
665
682
 			};
666
683
 
667
-			src: src@20d8000 {
684
+			src: reset-controller@20d8000 {
668
685
 				compatible = "fsl,imx6sl-src", "fsl,imx51-src";
669
686
 				reg = <0x020d8000 0x4000>;
670
687
 				interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -717,7 +734,7 @@
717
734
 				reg = <0x020e0000 0x38>;
718
735
 			};
719
736
 
720
-			iomuxc: iomuxc@20e0000 {
737
+			iomuxc: pinctrl@20e0000 {
721
738
 				compatible = "fsl,imx6sl-iomuxc";
722
739
 				reg = <0x020e0000 0x4000>;
723
740
 			};
..
..
@@ -766,7 +783,7 @@
766
783
 				power-domains = <&pd_disp>;
767
784
 			};
768
785
 
769
-			dcp: dcp@20fc000 {
786
+			dcp: crypto@20fc000 {
770
787
 				compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp";
771
788
 				reg = <0x020fc000 0x4000>;
772
789
 				interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -775,7 +792,7 @@
775
792
 			};
776
793
 		};
777
794
 
778
-		aips2: aips-bus@2100000 {
795
+		aips2: bus@2100000 {
779
796
 			compatible = "fsl,aips-bus", "simple-bus";
780
797
 			#address-cells = <1>;
781
798
 			#size-cells = <1>;
..
..
@@ -813,6 +830,8 @@
813
830
 				reg = <0x02184400 0x200>;
814
831
 				interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
815
832
 				clocks = <&clks IMX6SL_CLK_USBOH3>;
833
+				fsl,usbphy = <&usbphynop1>;
834
+				phy_type = "hsic";
816
835
 				fsl,usbmisc = <&usbmisc 2>;
817
836
 				dr_mode = "host";
818
837
 				ahb-burst-config = <0x0>;
..
..
@@ -838,7 +857,7 @@
838
857
 				status = "disabled";
839
858
 			};
840
859
 
841
-			usdhc1: usdhc@2190000 {
860
+			usdhc1: mmc@2190000 {
842
861
 				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
843
862
 				reg = <0x02190000 0x4000>;
844
863
 				interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -850,7 +869,7 @@
850
869
 				status = "disabled";
851
870
 			};
852
871
 
853
-			usdhc2: usdhc@2194000 {
872
+			usdhc2: mmc@2194000 {
854
873
 				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
855
874
 				reg = <0x02194000 0x4000>;
856
875
 				interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -862,7 +881,7 @@
862
881
 				status = "disabled";
863
882
 			};
864
883
 
865
-			usdhc3: usdhc@2198000 {
884
+			usdhc3: mmc@2198000 {
866
885
 				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
867
886
 				reg = <0x02198000 0x4000>;
868
887
 				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -874,7 +893,7 @@
874
893
 				status = "disabled";
875
894
 			};
876
895
 
877
-			usdhc4: usdhc@219c000 {
896
+			usdhc4: mmc@219c000 {
878
897
 				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
879
898
 				reg = <0x0219c000 0x4000>;
880
899
 				interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -916,9 +935,10 @@
916
935
 				status = "disabled";
917
936
 			};
918
937
 
919
-			mmdc: mmdc@21b0000 {
938
+			memory-controller@21b0000 {
920
939
 				compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc";
921
940
 				reg = <0x021b0000 0x4000>;
941
+				clocks = <&clks IMX6SL_CLK_MMDC_P0_IPG>;
922
942
 			};
923
943
 
924
944
 			rngb: rngb@21b4000 {
..
..
@@ -937,10 +957,24 @@
937
957
 				status = "disabled";
938
958
 			};
939
959
 
940
-			ocotp: ocotp@21bc000 {
960
+			ocotp: efuse@21bc000 {
941
961
 				compatible = "fsl,imx6sl-ocotp", "syscon";
942
962
 				reg = <0x021bc000 0x4000>;
943
963
 				clocks = <&clks IMX6SL_CLK_OCOTP>;
964
+				#address-cells = <1>;
965
+				#size-cells = <1>;
966
+
967
+				cpu_speed_grade: speed-grade@10 {
968
+					reg = <0x10 4>;
969
+				};
970
+
971
+				tempmon_calib: calib@38 {
972
+					reg = <0x38 4>;
973
+				};
974
+
975
+				tempmon_temp_grade: temp-grade@20 {
976
+					reg = <0x20 4>;
977
+				};
944
978
 			};
945
979
 
946
980
 			audmux: audmux@21d8000 {