hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arm/boot/dts/imx6qdl.dtsi
....@@ -4,6 +4,7 @@
44 // Copyright 2011 Linaro Ltd.
55
66 #include <dt-bindings/clock/imx6qdl-clock.h>
7
+#include <dt-bindings/input/input.h>
78 #include <dt-bindings/interrupt-controller/arm-gic.h>
89
910 / {
....@@ -13,10 +14,8 @@
1314 * The decompressor and also some bootloaders rely on a
1415 * pre-existing /chosen node to be available to insert the
1516 * command line and merge other ATAGS info.
16
- * Also for U-Boot there must be a pre-existing /memory node.
1717 */
1818 chosen {};
19
- memory { device_type = "memory"; };
2019
2120 aliases {
2221 ethernet0 = &fec;
....@@ -68,15 +67,6 @@
6867 #clock-cells = <0>;
6968 clock-frequency = <24000000>;
7069 };
71
- };
72
-
73
- tempmon: tempmon {
74
- compatible = "fsl,imx6q-tempmon";
75
- interrupt-parent = <&gpc>;
76
- interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
77
- fsl,tempmon = <&anatop>;
78
- fsl,tempmon-data = <&ocotp>;
79
- clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
8070 };
8171
8272 ldb: ldb {
....@@ -139,6 +129,16 @@
139129 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
140130 };
141131
132
+ usbphynop1: usbphynop1 {
133
+ compatible = "usb-nop-xceiv";
134
+ #phy-cells = <0>;
135
+ };
136
+
137
+ usbphynop2: usbphynop2 {
138
+ compatible = "usb-nop-xceiv";
139
+ #phy-cells = <0>;
140
+ };
141
+
142142 soc {
143143 #address-cells = <1>;
144144 #size-cells = <1>;
....@@ -159,10 +159,8 @@
159159 clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
160160 };
161161
162
- gpmi: gpmi-nand@112000 {
162
+ gpmi: nand-controller@112000 {
163163 compatible = "fsl,imx6q-gpmi-nand";
164
- #address-cells = <1>;
165
- #size-cells = <1>;
166164 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
167165 reg-names = "gpmi-nand", "bch";
168166 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
....@@ -216,6 +214,7 @@
216214 <&clks IMX6QDL_CLK_GPU3D_SHADER>;
217215 clock-names = "bus", "core", "shader";
218216 power-domains = <&pd_pu>;
217
+ #cooling-cells = <2>;
219218 };
220219
221220 gpu_2d: gpu@134000 {
....@@ -226,6 +225,7 @@
226225 <&clks IMX6QDL_CLK_GPU2D_CORE>;
227226 clock-names = "bus", "core";
228227 power-domains = <&pd_pu>;
228
+ #cooling-cells = <2>;
229229 };
230230
231231 timer@a00600 {
....@@ -245,7 +245,7 @@
245245 interrupt-parent = <&intc>;
246246 };
247247
248
- L2: l2-cache@a02000 {
248
+ L2: cache-controller@a02000 {
249249 compatible = "arm,pl310-cache";
250250 reg = <0x00a02000 0x1000>;
251251 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
....@@ -268,6 +268,7 @@
268268 ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
269269 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
270270 num-lanes = <1>;
271
+ num-viewport = <4>;
271272 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
272273 interrupt-names = "msi";
273274 #interrupt-cells = <1>;
....@@ -283,7 +284,7 @@
283284 status = "disabled";
284285 };
285286
286
- aips-bus@2000000 { /* AIPS1 */
287
+ bus@2000000 { /* AIPS1 */
287288 compatible = "fsl,aips-bus", "simple-bus";
288289 #address-cells = <1>;
289290 #size-cells = <1>;
....@@ -317,7 +318,7 @@
317318 status = "disabled";
318319 };
319320
320
- ecspi1: ecspi@2008000 {
321
+ ecspi1: spi@2008000 {
321322 #address-cells = <1>;
322323 #size-cells = <0>;
323324 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
....@@ -331,7 +332,7 @@
331332 status = "disabled";
332333 };
333334
334
- ecspi2: ecspi@200c000 {
335
+ ecspi2: spi@200c000 {
335336 #address-cells = <1>;
336337 #size-cells = <0>;
337338 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
....@@ -345,7 +346,7 @@
345346 status = "disabled";
346347 };
347348
348
- ecspi3: ecspi@2010000 {
349
+ ecspi3: spi@2010000 {
349350 #address-cells = <1>;
350351 #size-cells = <0>;
351352 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
....@@ -359,7 +360,7 @@
359360 status = "disabled";
360361 };
361362
362
- ecspi4: ecspi@2014000 {
363
+ ecspi4: spi@2014000 {
363364 #address-cells = <1>;
364365 #size-cells = <0>;
365366 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
....@@ -498,7 +499,7 @@
498499 };
499500
500501 pwm1: pwm@2080000 {
501
- #pwm-cells = <2>;
502
+ #pwm-cells = <3>;
502503 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
503504 reg = <0x02080000 0x4000>;
504505 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
....@@ -509,7 +510,7 @@
509510 };
510511
511512 pwm2: pwm@2084000 {
512
- #pwm-cells = <2>;
513
+ #pwm-cells = <3>;
513514 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
514515 reg = <0x02084000 0x4000>;
515516 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
....@@ -520,7 +521,7 @@
520521 };
521522
522523 pwm3: pwm@2088000 {
523
- #pwm-cells = <2>;
524
+ #pwm-cells = <3>;
524525 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
525526 reg = <0x02088000 0x4000>;
526527 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
....@@ -531,7 +532,7 @@
531532 };
532533
533534 pwm4: pwm@208c000 {
534
- #pwm-cells = <2>;
535
+ #pwm-cells = <3>;
535536 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
536537 reg = <0x0208c000 0x4000>;
537538 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
....@@ -548,6 +549,7 @@
548549 clocks = <&clks IMX6QDL_CLK_CAN1_IPG>,
549550 <&clks IMX6QDL_CLK_CAN1_SERIAL>;
550551 clock-names = "ipg", "per";
552
+ fsl,stop-mode = <&gpr 0x34 28 0x10 17>;
551553 status = "disabled";
552554 };
553555
....@@ -558,10 +560,11 @@
558560 clocks = <&clks IMX6QDL_CLK_CAN2_IPG>,
559561 <&clks IMX6QDL_CLK_CAN2_SERIAL>;
560562 clock-names = "ipg", "per";
563
+ fsl,stop-mode = <&gpr 0x34 29 0x10 18>;
561564 status = "disabled";
562565 };
563566
564
- gpt: gpt@2098000 {
567
+ gpt: timer@2098000 {
565568 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
566569 reg = <0x02098000 0x4000>;
567570 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
....@@ -648,7 +651,7 @@
648651 #interrupt-cells = <2>;
649652 };
650653
651
- kpp: kpp@20b8000 {
654
+ kpp: keypad@20b8000 {
652655 compatible = "fsl,imx6q-kpp", "fsl,imx21-kpp";
653656 reg = <0x020b8000 0x4000>;
654657 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
....@@ -656,22 +659,22 @@
656659 status = "disabled";
657660 };
658661
659
- wdog1: wdog@20bc000 {
662
+ wdog1: watchdog@20bc000 {
660663 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
661664 reg = <0x020bc000 0x4000>;
662665 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
663
- clocks = <&clks IMX6QDL_CLK_DUMMY>;
666
+ clocks = <&clks IMX6QDL_CLK_IPG>;
664667 };
665668
666
- wdog2: wdog@20c0000 {
669
+ wdog2: watchdog@20c0000 {
667670 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
668671 reg = <0x020c0000 0x4000>;
669672 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
670
- clocks = <&clks IMX6QDL_CLK_DUMMY>;
673
+ clocks = <&clks IMX6QDL_CLK_IPG>;
671674 status = "disabled";
672675 };
673676
674
- clks: ccm@20c4000 {
677
+ clks: clock-controller@20c4000 {
675678 compatible = "fsl,imx6q-ccm";
676679 reg = <0x020c4000 0x4000>;
677680 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
....@@ -680,7 +683,7 @@
680683 };
681684
682685 anatop: anatop@20c8000 {
683
- compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
686
+ compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
684687 reg = <0x020c8000 0x1000>;
685688 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
686689 <0 54 IRQ_TYPE_LEVEL_HIGH>,
....@@ -753,7 +756,7 @@
753756 regulator-name = "vddpu";
754757 regulator-min-microvolt = <725000>;
755758 regulator-max-microvolt = <1450000>;
756
- regulator-enable-ramp-delay = <150>;
759
+ regulator-enable-ramp-delay = <380>;
757760 anatop-reg-offset = <0x140>;
758761 anatop-vol-bit-shift = <9>;
759762 anatop-vol-bit-width = <5>;
....@@ -780,6 +783,17 @@
780783 anatop-min-bit-val = <1>;
781784 anatop-min-voltage = <725000>;
782785 anatop-max-voltage = <1450000>;
786
+ };
787
+
788
+ tempmon: tempmon {
789
+ compatible = "fsl,imx6q-tempmon";
790
+ interrupt-parent = <&gpc>;
791
+ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
792
+ fsl,tempmon = <&anatop>;
793
+ nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
794
+ nvmem-cell-names = "calib", "temp_grade";
795
+ clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
796
+ #thermal-sensor-cells = <0>;
783797 };
784798 };
785799
....@@ -820,6 +834,15 @@
820834 status = "disabled";
821835 };
822836
837
+ snvs_pwrkey: snvs-powerkey {
838
+ compatible = "fsl,sec-v4.0-pwrkey";
839
+ regmap = <&snvs>;
840
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
841
+ linux,keycode = <KEY_POWER>;
842
+ wakeup-source;
843
+ status = "disabled";
844
+ };
845
+
823846 snvs_lpgpr: snvs-lpgpr {
824847 compatible = "fsl,imx6q-snvs-lpgpr";
825848 };
....@@ -835,7 +858,7 @@
835858 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
836859 };
837860
838
- src: src@20d8000 {
861
+ src: reset-controller@20d8000 {
839862 compatible = "fsl,imx6q-src", "fsl,imx51-src";
840863 reg = <0x020d8000 0x4000>;
841864 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
....@@ -848,8 +871,7 @@
848871 reg = <0x020dc000 0x4000>;
849872 interrupt-controller;
850873 #interrupt-cells = <3>;
851
- interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
852
- <0 90 IRQ_TYPE_LEVEL_HIGH>;
874
+ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
853875 interrupt-parent = <&intc>;
854876 clocks = <&clks IMX6QDL_CLK_IPG>;
855877 clock-names = "ipg";
....@@ -886,7 +908,7 @@
886908 };
887909 };
888910
889
- iomuxc: iomuxc@20e0000 {
911
+ iomuxc: pinctrl@20e0000 {
890912 compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
891913 reg = <0x20e0000 0x4000>;
892914 };
....@@ -913,14 +935,14 @@
913935 };
914936 };
915937
916
- aips-bus@2100000 { /* AIPS2 */
938
+ bus@2100000 { /* AIPS2 */
917939 compatible = "fsl,aips-bus", "simple-bus";
918940 #address-cells = <1>;
919941 #size-cells = <1>;
920942 reg = <0x02100000 0x100000>;
921943 ranges;
922944
923
- crypto: caam@2100000 {
945
+ crypto: crypto@2100000 {
924946 compatible = "fsl,sec-v4.0";
925947 #address-cells = <1>;
926948 #size-cells = <1>;
....@@ -932,13 +954,13 @@
932954 <&clks IMX6QDL_CLK_EIM_SLOW>;
933955 clock-names = "mem", "aclk", "ipg", "emi_slow";
934956
935
- sec_jr0: jr0@1000 {
957
+ sec_jr0: jr@1000 {
936958 compatible = "fsl,sec-v4.0-job-ring";
937959 reg = <0x1000 0x1000>;
938960 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
939961 };
940962
941
- sec_jr1: jr1@2000 {
963
+ sec_jr1: jr@2000 {
942964 compatible = "fsl,sec-v4.0-job-ring";
943965 reg = <0x2000 0x1000>;
944966 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
....@@ -981,6 +1003,8 @@
9811003 reg = <0x02184400 0x200>;
9821004 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
9831005 clocks = <&clks IMX6QDL_CLK_USBOH3>;
1006
+ fsl,usbphy = <&usbphynop1>;
1007
+ phy_type = "hsic";
9841008 fsl,usbmisc = <&usbmisc 2>;
9851009 dr_mode = "host";
9861010 ahb-burst-config = <0x0>;
....@@ -994,6 +1018,8 @@
9941018 reg = <0x02184600 0x200>;
9951019 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
9961020 clocks = <&clks IMX6QDL_CLK_USBOH3>;
1021
+ fsl,usbphy = <&usbphynop2>;
1022
+ phy_type = "hsic";
9971023 fsl,usbmisc = <&usbmisc 3>;
9981024 dr_mode = "host";
9991025 ahb-burst-config = <0x0>;
....@@ -1017,8 +1043,10 @@
10171043 <0 119 IRQ_TYPE_LEVEL_HIGH>;
10181044 clocks = <&clks IMX6QDL_CLK_ENET>,
10191045 <&clks IMX6QDL_CLK_ENET>,
1046
+ <&clks IMX6QDL_CLK_ENET_REF>,
10201047 <&clks IMX6QDL_CLK_ENET_REF>;
1021
- clock-names = "ipg", "ahb", "ptp";
1048
+ clock-names = "ipg", "ahb", "ptp", "enet_out";
1049
+ fsl,stop-mode = <&gpr 0x34 27>;
10221050 status = "disabled";
10231051 };
10241052
....@@ -1029,7 +1057,7 @@
10291057 <0 126 IRQ_TYPE_LEVEL_HIGH>;
10301058 };
10311059
1032
- usdhc1: usdhc@2190000 {
1060
+ usdhc1: mmc@2190000 {
10331061 compatible = "fsl,imx6q-usdhc";
10341062 reg = <0x02190000 0x4000>;
10351063 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1041,7 +1069,7 @@
10411069 status = "disabled";
10421070 };
10431071
1044
- usdhc2: usdhc@2194000 {
1072
+ usdhc2: mmc@2194000 {
10451073 compatible = "fsl,imx6q-usdhc";
10461074 reg = <0x02194000 0x4000>;
10471075 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1053,7 +1081,7 @@
10531081 status = "disabled";
10541082 };
10551083
1056
- usdhc3: usdhc@2198000 {
1084
+ usdhc3: mmc@2198000 {
10571085 compatible = "fsl,imx6q-usdhc";
10581086 reg = <0x02198000 0x4000>;
10591087 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1065,7 +1093,7 @@
10651093 status = "disabled";
10661094 };
10671095
1068
- usdhc4: usdhc@219c000 {
1096
+ usdhc4: mmc@219c000 {
10691097 compatible = "fsl,imx6q-usdhc";
10701098 reg = <0x0219c000 0x4000>;
10711099 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
....@@ -1111,13 +1139,16 @@
11111139 reg = <0x021ac000 0x4000>;
11121140 };
11131141
1114
- mmdc0: mmdc@21b0000 { /* MMDC0 */
1142
+ mmdc0: memory-controller@21b0000 { /* MMDC0 */
11151143 compatible = "fsl,imx6q-mmdc";
11161144 reg = <0x021b0000 0x4000>;
1145
+ clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
11171146 };
11181147
1119
- mmdc1: mmdc@21b4000 { /* MMDC1 */
1148
+ mmdc1: memory-controller@21b4000 { /* MMDC1 */
1149
+ compatible = "fsl,imx6q-mmdc";
11201150 reg = <0x021b4000 0x4000>;
1151
+ status = "disabled";
11211152 };
11221153
11231154 weim: weim@21b8000 {
....@@ -1131,10 +1162,24 @@
11311162 status = "disabled";
11321163 };
11331164
1134
- ocotp: ocotp@21bc000 {
1165
+ ocotp: efuse@21bc000 {
11351166 compatible = "fsl,imx6q-ocotp", "syscon";
11361167 reg = <0x021bc000 0x4000>;
11371168 clocks = <&clks IMX6QDL_CLK_IIM>;
1169
+ #address-cells = <1>;
1170
+ #size-cells = <1>;
1171
+
1172
+ cpu_speed_grade: speed-grade@10 {
1173
+ reg = <0x10 4>;
1174
+ };
1175
+
1176
+ tempmon_calib: calib@38 {
1177
+ reg = <0x38 4>;
1178
+ };
1179
+
1180
+ tempmon_temp_grade: temp-grade@20 {
1181
+ reg = <0x20 4>;
1182
+ };
11381183 };
11391184
11401185 tzasc@21d0000 { /* TZASC1 */