hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arm/boot/dts/imx6qdl-sr-som.dtsi
....@@ -53,10 +53,35 @@
5353 &fec {
5454 pinctrl-names = "default";
5555 pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
56
- phy-mode = "rgmii";
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- phy-reset-duration = <2>;
56
+ phy-mode = "rgmii-id";
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+
58
+ /*
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+ * The PHY seems to require a long-enough reset duration to avoid
60
+ * some rare issues where the PHY gets stuck in an inconsistent and
61
+ * non-functional state at boot-up. 10ms proved to be fine .
62
+ */
63
+ phy-reset-duration = <10>;
5864 phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
5965 status = "okay";
66
+
67
+ mdio {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /*
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+ * The PHY can appear at either address 0 or 4 due to the
73
+ * configuration (LED) pin not being pulled sufficiently.
74
+ */
75
+ ethernet-phy@0 {
76
+ reg = <0>;
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+ qca,clk-out-frequency = <125000000>;
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+ };
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+
80
+ ethernet-phy@4 {
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+ reg = <4>;
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+ qca,clk-out-frequency = <125000000>;
83
+ };
84
+ };
6085 };
6186
6287 &iomuxc {