add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
..
..
@@ -46,6 +46,10 @@
46
46
  */
47
47
 
48
48
 #include <dt-bindings/gpio/gpio.h>
49
+#include <dt-bindings/media/tda1997x.h>
50
+#include <dt-bindings/input/linux-event-codes.h>
51
+#include <dt-bindings/interrupt-controller/irq.h>
52
+#include <dt-bindings/sound/fsl-imx-audmux.h>
49
53
 
50
54
 / {
51
55
 	/* these are used by bootloader for disabling nodes */
..
..
@@ -59,6 +63,53 @@
59
63
 
60
64
 	chosen {
61
65
 		bootargs = "console=ttymxc1,115200";
66
+	};
67
+
68
+	gpio-keys {
69
+		compatible = "gpio-keys";
70
+		#address-cells = <1>;
71
+		#size-cells = <0>;
72
+
73
+		user-pb {
74
+			label = "user_pb";
75
+			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
76
+			linux,code = <BTN_0>;
77
+		};
78
+
79
+		user-pb1x {
80
+			label = "user_pb1x";
81
+			linux,code = <BTN_1>;
82
+			interrupt-parent = <&gsc>;
83
+			interrupts = <0>;
84
+		};
85
+
86
+		key-erased {
87
+			label = "key-erased";
88
+			linux,code = <BTN_2>;
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+			interrupt-parent = <&gsc>;
90
+			interrupts = <1>;
91
+		};
92
+
93
+		eeprom-wp {
94
+			label = "eeprom_wp";
95
+			linux,code = <BTN_3>;
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+			interrupt-parent = <&gsc>;
97
+			interrupts = <2>;
98
+		};
99
+
100
+		tamper {
101
+			label = "tamper";
102
+			linux,code = <BTN_4>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <5>;
105
+		};
106
+
107
+		switch-hold {
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+			label = "switch_hold";
109
+			linux,code = <BTN_5>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <7>;
112
+		};
62
113
 	};
63
114
 
64
115
 	leds {
..
..
@@ -75,6 +126,7 @@
75
126
 	};
76
127
 
77
128
 	memory@10000000 {
129
+		device_type = "memory";
78
130
 		reg = <0x10000000 0x20000000>;
79
131
 	};
80
132
 
..
..
@@ -97,6 +149,47 @@
97
149
 		regulator-name = "usb_otg_vbus";
98
150
 		regulator-min-microvolt = <5000000>;
99
151
 		regulator-max-microvolt = <5000000>;
152
+	};
153
+
154
+	sound-digital {
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+		compatible = "simple-audio-card";
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+		simple-audio-card,name = "tda1997x-audio";
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+		simple-audio-card,format = "i2s";
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+		simple-audio-card,bitclock-master = <&sound_codec>;
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+		simple-audio-card,frame-master = <&sound_codec>;
160
+
161
+		sound_cpu: simple-audio-card,cpu {
162
+			sound-dai = <&ssi1>;
163
+		};
164
+
165
+		sound_codec: simple-audio-card,codec {
166
+			sound-dai = <&hdmi_receiver>;
167
+		};
168
+	};
169
+};
170
+
171
+&audmux {
172
+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
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+	status = "okay";
175
+
176
+	ssi1 {
177
+		fsl,audmux-port = <0>;
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+		fsl,port-config = <
179
+			(IMX_AUDMUX_V2_PTCR_TFSDIR |
180
+			IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
181
+			IMX_AUDMUX_V2_PTCR_TCLKDIR |
182
+			IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
183
+			IMX_AUDMUX_V2_PTCR_SYN)
184
+			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
185
+		>;
186
+	};
187
+
188
+	aud5 {
189
+		fsl,audmux-port = <4>;
190
+		fsl,port-config = <
191
+			IMX_AUDMUX_V2_PTCR_SYN
192
+			IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
100
193
 	};
101
194
 };
102
195
 
..
..
@@ -123,6 +216,97 @@
123
216
 	pinctrl-0 = <&pinctrl_i2c1>;
124
217
 	status = "okay";
125
218
 
219
+	gsc: gsc@20 {
220
+		compatible = "gw,gsc";
221
+		reg = <0x20>;
222
+		interrupt-parent = <&gpio1>;
223
+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
224
+		interrupt-controller;
225
+		#interrupt-cells = <1>;
226
+		#size-cells = <0>;
227
+
228
+		adc {
229
+			compatible = "gw,gsc-adc";
230
+			#address-cells = <1>;
231
+			#size-cells = <0>;
232
+
233
+			channel@0 {
234
+				gw,mode = <0>;
235
+				reg = <0x00>;
236
+				label = "temp";
237
+			};
238
+
239
+			channel@2 {
240
+				gw,mode = <1>;
241
+				reg = <0x02>;
242
+				label = "vdd_vin";
243
+			};
244
+
245
+			channel@5 {
246
+				gw,mode = <1>;
247
+				reg = <0x05>;
248
+				label = "vdd_3p3";
249
+			};
250
+
251
+			channel@8 {
252
+				gw,mode = <1>;
253
+				reg = <0x08>;
254
+				label = "vdd_bat";
255
+			};
256
+
257
+			channel@b {
258
+				gw,mode = <1>;
259
+				reg = <0x0b>;
260
+				label = "vdd_5p0";
261
+			};
262
+
263
+			channel@e {
264
+				gw,mode = <1>;
265
+				reg = <0xe>;
266
+				label = "vdd_arm";
267
+			};
268
+
269
+			channel@11 {
270
+				gw,mode = <1>;
271
+				reg = <0x11>;
272
+				label = "vdd_soc";
273
+			};
274
+
275
+			channel@14 {
276
+				gw,mode = <1>;
277
+				reg = <0x14>;
278
+				label = "vdd_3p0";
279
+			};
280
+
281
+			channel@17 {
282
+				gw,mode = <1>;
283
+				reg = <0x17>;
284
+				label = "vdd_1p5";
285
+			};
286
+
287
+			channel@1d {
288
+				gw,mode = <1>;
289
+				reg = <0x1d>;
290
+				label = "vdd_1p8a";
291
+			};
292
+
293
+			channel@20 {
294
+				gw,mode = <1>;
295
+				reg = <0x20>;
296
+				label = "vdd_1p0b";
297
+			};
298
+		};
299
+	};
300
+
301
+	gsc_gpio: gpio@23 {
302
+		compatible = "nxp,pca9555";
303
+		reg = <0x23>;
304
+		gpio-controller;
305
+		#gpio-cells = <2>;
306
+		interrupt-parent = <&gsc>;
307
+		interrupts = <4>;
308
+	};
309
+
126
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 	eeprom1: eeprom@50 {
127
311
 		compatible = "atmel,24c02";
128
312
 		reg = <0x50>;
..
..
@@ -145,13 +329,6 @@
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 		compatible = "atmel,24c02";
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 		reg = <0x53>;
147
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 		pagesize = <16>;
148
-	};
149
-
150
-	gpio: pca9555@23 {
151
-		compatible = "nxp,pca9555";
152
-		reg = <0x23>;
153
-		gpio-controller;
154
-		#gpio-cells = <2>;
155
332
 	};
156
333
 
157
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 	rtc: ds1672@68 {
..
..
@@ -263,6 +440,60 @@
263
440
 		#gpio-cells = <2>;
264
441
 	};
265
442
 
443
+	hdmi_receiver: hdmi-receiver@48 {
444
+		compatible = "nxp,tda19971";
445
+		pinctrl-names = "default";
446
+		pinctrl-0 = <&pinctrl_tda1997x>;
447
+		reg = <0x48>;
448
+		interrupt-parent = <&gpio1>;
449
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
450
+		DOVDD-supply = <&reg_3p3>;
451
+		AVDD-supply = <&reg_1p8b>;
452
+		DVDD-supply = <&reg_1p8a>;
453
+		#sound-dai-cells = <0>;
454
+		nxp,audout-format = "i2s";
455
+		nxp,audout-layout = <0>;
456
+		nxp,audout-width = <16>;
457
+		nxp,audout-mclk-fs = <128>;
458
+		/*
459
+		 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
460
+		 * and Y[11:4] across 16bits in the same cycle
461
+		 * which we map to VP[15:08]<->CSI_DATA[19:12]
462
+		 */
463
+		nxp,vidout-portcfg =
464
+			/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
465
+			< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
466
+			/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
467
+			< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
468
+			/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
469
+			< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
470
+			/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
471
+			< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
472
+
473
+		port {
474
+			tda1997x_to_ipu1_csi0_mux: endpoint {
475
+				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
476
+				bus-width = <16>;
477
+				hsync-active = <1>;
478
+				vsync-active = <1>;
479
+				data-active = <1>;
480
+			};
481
+		};
482
+	};
483
+};
484
+
485
+&ipu1_csi0_from_ipu1_csi0_mux {
486
+	bus-width = <16>;
487
+};
488
+
489
+&ipu1_csi0_mux_from_parallel_sensor {
490
+	remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
491
+	bus-width = <16>;
492
+};
493
+
494
+&ipu1_csi0 {
495
+	pinctrl-names = "default";
496
+	pinctrl-0 = <&pinctrl_ipu1_csi0>;
266
497
 };
267
498
 
268
499
 &pcie {
..
..
@@ -320,6 +551,14 @@
320
551
 };
321
552
 
322
553
 &iomuxc {
554
+	pinctrl_audmux: audmuxgrp {
555
+		fsl,pins = <
556
+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
557
+			MX6QDL_PAD_DISP0_DAT14__AUD5_RXC	0x130b0
558
+			MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS	0x130b0
559
+		>;
560
+	};
561
+
323
562
 	pinctrl_flexcan1: flexcan1grp {
324
563
 		fsl,pins = <
325
564
 			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
..
..
@@ -358,6 +597,7 @@
358
597
 		fsl,pins = <
359
598
 			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
360
599
 			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
600
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
361
601
 		>;
362
602
 	};
363
603
 
..
..
@@ -372,6 +612,30 @@
372
612
 		fsl,pins = <
373
613
 			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
374
614
 			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
615
+		>;
616
+	};
617
+
618
+	pinctrl_ipu1_csi0: ipu1_csi0grp {
619
+		fsl,pins = <
620
+			MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04		0x1b0b0
621
+			MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05		0x1b0b0
622
+			MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06		0x1b0b0
623
+			MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07		0x1b0b0
624
+			MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08		0x1b0b0
625
+			MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09		0x1b0b0
626
+			MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10		0x1b0b0
627
+			MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11		0x1b0b0
628
+			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
629
+			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
630
+			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
631
+			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
632
+			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
633
+			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
634
+			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
635
+			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
636
+			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		0x1b0b0
637
+			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
638
+			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		0x1b0b0
375
639
 		>;
376
640
 	};
377
641
 
..
..
@@ -399,6 +663,12 @@
399
663
 		>;
400
664
 	};
401
665
 
666
+	pinctrl_tda1997x: tda1997xgrp {
667
+		fsl,pins = <
668
+			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0
669
+		>;
670
+	};
671
+
402
672
 	pinctrl_uart2: uart2grp {
403
673
 		fsl,pins = <
404
674
 			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1