add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
..
..
@@ -1,15 +1,12 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright 2013 Gateworks Corporation
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- *
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- * The code contained herein is licensed under the GNU General Public
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- * License. You may obtain a copy of the GNU General Public License
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- * Version 2 or later at the following locations:
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- *
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- * http://www.opensource.org/licenses/gpl-license.html
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- * http://www.gnu.org/copyleft/gpl.html
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  */
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5
 
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 #include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/linux-event-codes.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/sound/fsl-imx-audmux.h>
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10
 
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 / {
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12
 	/* these are used by bootloader for disabling nodes */
..
..
@@ -32,6 +29,53 @@
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 		pwms = <&pwm4 0 5000000>;
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 		brightness-levels = <0 4 8 16 32 64 128 255>;
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 		default-brightness-level = <7>;
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+	};
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+
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+	gpio-keys {
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+		compatible = "gpio-keys";
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+		#address-cells = <1>;
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+		#size-cells = <0>;
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+
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+		user-pb {
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+			label = "user_pb";
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+			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
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+			linux,code = <BTN_0>;
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+		};
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+
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+		user-pb1x {
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+			label = "user_pb1x";
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+			linux,code = <BTN_1>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <0>;
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+		};
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+
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+		key-erased {
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+			label = "key-erased";
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+			linux,code = <BTN_2>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <1>;
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+		};
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+
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+		eeprom-wp {
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+			label = "eeprom_wp";
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+			linux,code = <BTN_3>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <2>;
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+		};
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+
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+		tamper {
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+			label = "tamper";
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+			linux,code = <BTN_4>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <5>;
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+		};
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+
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+		switch-hold {
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+			label = "switch_hold";
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+			linux,code = <BTN_5>;
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+			interrupt-parent = <&gsc>;
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+			interrupts = <7>;
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+		};
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 	};
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80
 
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 	leds {
..
..
@@ -60,6 +104,7 @@
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104
 	};
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105
 
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 	memory@10000000 {
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+		device_type = "memory";
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 		reg = <0x10000000 0x40000000>;
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 	};
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110
 
..
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@@ -114,12 +159,12 @@
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159
 		};
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 	};
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161
 
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-	sound {
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+	sound-analog {
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 		compatible = "fsl,imx6q-ventana-sgtl5000",
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 			     "fsl,imx-audio-sgtl5000";
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 		model = "sgtl5000-audio";
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 		ssi-controller = <&ssi1>;
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-		audio-codec = <&codec>;
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+		audio-codec = <&sgtl5000>;
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 		audio-routing =
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 			"MIC_IN", "Mic Jack",
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 			"Mic Jack", "Mic Bias",
..
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@@ -133,6 +178,25 @@
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
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 	status = "okay";
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+
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+	ssi2 {
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+		fsl,audmux-port = <1>;
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+		fsl,port-config = <
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+			(IMX_AUDMUX_V2_PTCR_TFSDIR |
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+			IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
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+			IMX_AUDMUX_V2_PTCR_TCLKDIR |
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+			IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
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+			IMX_AUDMUX_V2_PTCR_SYN)
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+			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
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+		>;
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+	};
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+
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+	aud5 {
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+		fsl,audmux-port = <4>;
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+		fsl,port-config = <
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+			IMX_AUDMUX_V2_PTCR_SYN
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+			IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
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+	};
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 };
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 &can1 {
..
..
@@ -149,7 +213,7 @@
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 };
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214
 
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 &ecspi2 {
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-	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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+	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
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 	pinctrl-names = "default";
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 	pinctrl-0 = <&pinctrl_ecspi2>;
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 	status = "okay";
..
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@@ -180,6 +244,117 @@
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 	pinctrl-0 = <&pinctrl_i2c1>;
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 	status = "okay";
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246
 
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+	gsc: gsc@20 {
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+		compatible = "gw,gsc";
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+		reg = <0x20>;
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+		interrupt-parent = <&gpio1>;
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+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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+		interrupt-controller;
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+		#interrupt-cells = <1>;
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+		#address-cells = <1>;
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+		#size-cells = <0>;
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+
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+		adc {
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+			compatible = "gw,gsc-adc";
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+
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+			channel@0 {
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+				gw,mode = <0>;
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+				reg = <0x00>;
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+				label = "temp";
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+			};
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+
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+			channel@2 {
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+				gw,mode = <1>;
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+				reg = <0x02>;
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+				label = "vdd_vin";
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+			};
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+
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+			channel@5 {
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+				gw,mode = <1>;
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+				reg = <0x05>;
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+				label = "vdd_3p3";
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+			};
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+
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+			channel@8 {
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+				gw,mode = <1>;
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+				reg = <0x08>;
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+				label = "vdd_bat";
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+			};
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+
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+			channel@b {
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+				gw,mode = <1>;
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+				reg = <0x0b>;
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+				label = "vdd_5p0";
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+			};
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+
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+			channel@e {
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+				gw,mode = <1>;
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+				reg = <0xe>;
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+				label = "vdd_arm";
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+			};
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+
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+			channel@11 {
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+				gw,mode = <1>;
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+				reg = <0x11>;
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+				label = "vdd_soc";
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+			};
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+
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+			channel@14 {
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+				gw,mode = <1>;
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+				reg = <0x14>;
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+				label = "vdd_3p0";
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+			};
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+
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+			channel@17 {
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+				gw,mode = <1>;
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+				reg = <0x17>;
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+				label = "vdd_1p5";
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+			};
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+
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+			channel@1d {
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+				gw,mode = <1>;
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+				reg = <0x1d>;
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+				label = "vdd_1p8";
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+			};
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+
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+			channel@20 {
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+				gw,mode = <1>;
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+				reg = <0x20>;
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+				label = "vdd_1p0";
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+			};
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+
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+			channel@23 {
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+				gw,mode = <1>;
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+				reg = <0x23>;
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+				label = "vdd_2p5";
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+			};
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+
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+			channel@26 {
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+				gw,mode = <1>;
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+				reg = <0x26>;
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+				label = "vdd_gps";
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+			};
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+		};
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+
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+		fan-controller@2c {
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+			compatible = "gw,gsc-fan";
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+			#address-cells = <1>;
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+			#size-cells = <0>;
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+			reg = <0x2c>;
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+		};
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+	};
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+
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+	gsc_gpio: gpio@23 {
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+		compatible = "nxp,pca9555";
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+		reg = <0x23>;
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+		gpio-controller;
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+		#gpio-cells = <2>;
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+		interrupt-parent = <&gsc>;
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+		interrupts = <4>;
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+	};
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+
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 	eeprom1: eeprom@50 {
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 		compatible = "atmel,24c02";
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 		reg = <0x50>;
..
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@@ -202,13 +377,6 @@
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 		compatible = "atmel,24c02";
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 		reg = <0x53>;
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 		pagesize = <16>;
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-	};
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-
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-	gpio: pca9555@23 {
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-		compatible = "nxp,pca9555";
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-		reg = <0x23>;
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-		gpio-controller;
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-		#gpio-cells = <2>;
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 	};
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381
 
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 	rtc: ds1672@68 {
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@@ -331,7 +499,7 @@
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 	pinctrl-0 = <&pinctrl_i2c3>;
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500
 	status = "okay";
333
501
 
334
-	codec: sgtl5000@a {
502
+	sgtl5000: audio-codec@a {
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 		compatible = "fsl,sgtl5000";
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 		reg = <0x0a>;
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 		clocks = <&clks IMX6QDL_CLK_CKO>;
..
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@@ -345,6 +513,11 @@
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 		interrupt-parent = <&gpio7>;
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 		interrupts = <12 2>;
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 		wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
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+	};
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+
518
+	accel@1e {
519
+		compatible = "nxp,fxos8700";
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+		reg = <0x1e>;
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 	};
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 };
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523
 
..
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@@ -399,6 +572,7 @@
399
572
 };
400
573
 
401
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 &pwm4 {
575
+	#pwm-cells = <2>;
402
576
 	pinctrl-names = "default", "state_dio";
403
577
 	pinctrl-0 = <&pinctrl_pwm4_backlight>;
404
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 	pinctrl-1 = <&pinctrl_pwm4_dio>;
..
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@@ -475,6 +649,9 @@
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 			MX6QDL_PAD_SD2_DAT2__AUD4_TXD		0x110b0
476
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 			MX6QDL_PAD_SD2_DAT1__AUD4_TXFS		0x130b0
477
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 			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
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+			MX6QDL_PAD_EIM_D25__AUD5_RXC            0x130b0
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+			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD        0x130b0
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+			MX6QDL_PAD_EIM_D24__AUD5_RXFS           0x130b0
478
655
 		>;
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 	};
480
657
 
..
..
@@ -548,6 +725,7 @@
548
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 		fsl,pins = <
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726
 			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
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727
 			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
728
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
551
729
 		>;
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730
 	};
553
731