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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/imx6q-gw54xx.dts
....@@ -1,21 +1,32 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * Copyright 2013 Gateworks Corporation
3
- *
4
- * The code contained herein is licensed under the GNU General Public
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- * License. You may obtain a copy of the GNU General Public License
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- * Version 2 or later at the following locations:
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- *
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- * http://www.opensource.org/licenses/gpl-license.html
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- * http://www.gnu.org/copyleft/gpl.html
104  */
115 
126 /dts-v1/;
137 #include "imx6q.dtsi"
148 #include "imx6qdl-gw54xx.dtsi"
9
+#include <dt-bindings/media/tda1997x.h>
1510 
1611 / {
1712 	model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX";
1813 	compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
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+
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+	sound-digital {
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+		compatible = "simple-audio-card";
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+		simple-audio-card,name = "tda1997x-audio";
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+		simple-audio-card,format = "i2s";
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+		simple-audio-card,bitclock-master = <&sound_codec>;
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+		simple-audio-card,frame-master = <&sound_codec>;
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+
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+		sound_cpu: simple-audio-card,cpu {
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+			sound-dai = <&ssi2>;
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+		};
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+
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+		sound_codec: simple-audio-card,codec {
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+			sound-dai = <&hdmi_receiver>;
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+		};
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+	};
1930 };
2031 
2132 &i2c3 {
....@@ -35,6 +46,61 @@
3546 			};
3647 		};
3748 	};
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+
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+	hdmi_receiver: hdmi-receiver@48 {
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+		compatible = "nxp,tda19971";
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+		pinctrl-names = "default";
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+		pinctrl-0 = <&pinctrl_tda1997x>;
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+		reg = <0x48>;
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+		interrupt-parent = <&gpio1>;
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+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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+		DOVDD-supply = <&reg_3p3v>;
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+		AVDD-supply = <&sw4_reg>;
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+		DVDD-supply = <&sw4_reg>;
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+		#sound-dai-cells = <0>;
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+		nxp,audout-format = "i2s";
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+		nxp,audout-layout = <0>;
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+		nxp,audout-width = <16>;
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+		nxp,audout-mclk-fs = <128>;
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+		/*
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+		 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
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+		 * and Y[11:4] across 16bits in the same cycle
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+		 * which we map to VP[15:08]<->CSI_DATA[19:12]
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+		 */
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+		nxp,vidout-portcfg =
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+			/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
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+			< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
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+			/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
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+			< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
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+			/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
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+			< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
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+			/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
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+			< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
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+
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+		port {
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+			tda1997x_to_ipu1_csi0_mux: endpoint {
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+				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
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+				bus-width = <16>;
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+				hsync-active = <1>;
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+				vsync-active = <1>;
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+				data-active = <1>;
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+			};
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+		};
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+	};
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+};
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+
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+&ipu1_csi0_from_ipu1_csi0_mux {
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+	bus-width = <16>;
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+};
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+
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+&ipu1_csi0_mux_from_parallel_sensor {
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+	remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
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+	bus-width = <16>;
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+};
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+
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+&ipu1_csi0 {
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+	pinctrl-names = "default";
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+	pinctrl-0 = <&pinctrl_ipu1_csi0>;
38104 };
39105 
40106 &ipu2_csi1_from_ipu2_csi1_mux {
....@@ -63,6 +129,30 @@
63129 		>;
64130 	};
65131 
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+	pinctrl_ipu1_csi0: ipu1_csi0grp {
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+		fsl,pins = <
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+			MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
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+			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
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+			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		0x1b0b0
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+			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
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+			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		0x1b0b0
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+		>;
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+	};
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+
66156 	pinctrl_ipu2_csi1: ipu2_csi1grp {
67157 		fsl,pins = <
68158 			MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19    0x1b0b0
....@@ -78,4 +168,10 @@
78168 			MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK    0x1b0b0
79169 		>;
80170 	};
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+
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+	pinctrl_tda1997x: tda1997xgrp {
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+		fsl,pins = <
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+			MX6QDL_PAD_GPIO_7__GPIO1_IO07	0x1b0b0
175
+		>;
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+	};
81177 };