hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
....@@ -20,7 +20,7 @@
2020 };
2121
2222 chosen {
23
- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
23
+ bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
2424 stdout-path = "uart0:19200n8";
2525 };
2626
....@@ -28,7 +28,7 @@
2828 compatible = "gpio-keys";
2929
3030 button-esc {
31
- debounce-interval = <50>;
31
+ debounce-interval = <100>;
3232 wakeup-source;
3333 linux,code = <KEY_ESC>;
3434 label = "reset";
....@@ -36,7 +36,7 @@
3636 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
3737 };
3838 button-eject {
39
- debounce-interval = <50>;
39
+ debounce-interval = <100>;
4040 wakeup-source;
4141 linux,code = <KEY_EJECTCD>;
4242 label = "unmount";
....@@ -64,7 +64,6 @@
6464 gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
6565 gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
6666 gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
67
- /* Collides with pflash CE1, not so cool */
6867 cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
6968 num-chipselects = <1>;
7069
....@@ -73,7 +72,6 @@
7372 reg = <0>;
7473 /* 50 ns min period = 20 MHz */
7574 spi-max-frequency = <20000000>;
76
- spi-cpol; /* Clock active low */
7775 vcc-supply = <&vdisp>;
7876 iovcc-supply = <&vdisp>;
7977 vci-supply = <&vdisp>;
....@@ -121,18 +119,50 @@
121119
122120 /*
123121 * This is a Sunon Maglev GM0502PFV2-8 cooling fan @10000 RPM.
124
- * Since the platform has no temperature sensor, this is controlled
125
- * from userspace by using the hard disks S.M.A.R.T. temperature
126122 * sensor. It is turned on when the temperature exceeds 46 degrees
127123 * and turned off when the temperatures goes below 41 degrees
128124 * (celsius).
129125 */
130
- gpio-fan {
126
+ fan0: gpio-fan {
131127 compatible = "gpio-fan";
132128 /* Collides with IDE */
133129 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
134130 gpio-fan,speed-map = <0 0>, <10000 1>;
135131 #cooling-cells = <2>;
132
+ };
133
+
134
+ thermal-zones {
135
+ chassis-thermal {
136
+ /* Poll every 20 seconds */
137
+ polling-delay = <20000>;
138
+ /* Poll every 2nd second when cooling */
139
+ polling-delay-passive = <2000>;
140
+ /* Use the thermal sensor in the hard drive */
141
+ thermal-sensors = <&drive0>;
142
+
143
+ /* Tripping points from the fan.script in the rootfs */
144
+ trips {
145
+ alert: chassis-alert {
146
+ /* At 43 degrees turn on the fan */
147
+ temperature = <43000>;
148
+ hysteresis = <3000>;
149
+ type = "active";
150
+ };
151
+ crit: chassis-crit {
152
+ /* Just shut down at 60 degrees */
153
+ temperature = <60000>;
154
+ hysteresis = <2000>;
155
+ type = "critical";
156
+ };
157
+ };
158
+
159
+ cooling-maps {
160
+ map0 {
161
+ trip = <&alert>;
162
+ cooling-device = <&fan0 1 1>;
163
+ };
164
+ };
165
+ };
136166 };
137167
138168 /*
....@@ -253,56 +283,65 @@
253283 soc {
254284 flash@30000000 {
255285 /*
256
- * Flash access is by default disabled, because it
257
- * collides with the Chip Enable signal for the display
258
- * panel, that reuse the parallel flash Chip Select 1
259
- * (CS1). Enabling flash makes graphics stop working.
260
- *
261
- * We might be able to hack around this by letting
262
- * GPIO poke around in the flash controller registers.
286
+ * Flash access collides with the Chip Enable signal for
287
+ * the display panel, that reuse the parallel flash Chip
288
+ * Select 1 (CS1). We switch the pin control state so we
289
+ * enable these pins for flash access only when we need
290
+ * then, and when disabled they can be used for GPIO which
291
+ * is what the display panel needs.
263292 */
264
- /* status = "okay"; */
293
+ status = "okay";
294
+ pinctrl-names = "enabled", "disabled";
295
+ pinctrl-0 = <&pflash_default_pins>;
296
+ pinctrl-1 = <&pflash_disabled_pins>;
297
+
265298 /* 32MB of flash */
266299 reg = <0x30000000 0x02000000>;
267300
268
- /*
269
- * This "RedBoot" is the Storlink derivative.
270
- */
271
- partition@0 {
272
- label = "RedBoot";
273
- reg = <0x00000000 0x00040000>;
274
- read-only;
275
- };
276
- /*
277
- * This firmware image contains the kernel catenated
278
- * with the squashfs root filesystem. For some reason
279
- * this is called "upgrade" on the vendor system.
280
- */
281
- partition@40000 {
282
- label = "upgrade";
283
- reg = <0x00040000 0x01f40000>;
284
- read-only;
285
- };
286
- /* RGDB, Residental Gateway Database? */
287
- partition@1f80000 {
288
- label = "rgdb";
289
- reg = <0x01f80000 0x00040000>;
290
- read-only;
291
- };
292
- /*
293
- * This partition contains MAC addresses for WAN,
294
- * WLAN and LAN, and the country code (for wireless
295
- * I guess).
296
- */
297
- partition@1fc0000 {
298
- label = "nvram";
299
- reg = <0x01fc0000 0x00020000>;
300
- read-only;
301
- };
302
- partition@1fe0000 {
303
- label = "LangPack";
304
- reg = <0x01fe0000 0x00020000>;
305
- read-only;
301
+ partitions {
302
+ compatible = "fixed-partitions";
303
+ #address-cells = <1>;
304
+ #size-cells = <1>;
305
+
306
+ /*
307
+ * This "RedBoot" is the Storlink derivative.
308
+ */
309
+ partition@0 {
310
+ label = "RedBoot";
311
+ reg = <0x00000000 0x00040000>;
312
+ read-only;
313
+ };
314
+ /*
315
+ * This firmware image contains the kernel catenated
316
+ * with the squashfs root filesystem. For some reason
317
+ * this is called "upgrade" on the vendor system.
318
+ */
319
+ partition@40000 {
320
+ label = "upgrade";
321
+ reg = <0x00040000 0x01f40000>;
322
+ read-only;
323
+ };
324
+ /* RGDB, Residental Gateway Database? */
325
+ partition@1f80000 {
326
+ label = "rgdb";
327
+ reg = <0x01f80000 0x00040000>;
328
+ read-only;
329
+ };
330
+ /*
331
+ * This partition contains MAC addresses for WAN,
332
+ * WLAN and LAN, and the country code (for wireless
333
+ * I guess).
334
+ */
335
+ partition@1fc0000 {
336
+ label = "nvram";
337
+ reg = <0x01fc0000 0x00020000>;
338
+ read-only;
339
+ };
340
+ partition@1fe0000 {
341
+ label = "LangPack";
342
+ reg = <0x01fe0000 0x00020000>;
343
+ read-only;
344
+ };
306345 };
307346 };
308347
....@@ -327,7 +366,6 @@
327366 "gpio0cgrp",
328367 "gpio0egrp",
329368 "gpio0fgrp",
330
- "gpio0ggrp",
331369 "gpio0hgrp";
332370 };
333371 };
....@@ -340,6 +378,18 @@
340378 mux {
341379 function = "gpio1";
342380 groups = "gpio1bgrp";
381
+ };
382
+ };
383
+ /*
384
+ * These GPIO groups will be mapped in over some
385
+ * of the flash pins when the flash is not in
386
+ * active use.
387
+ */
388
+ pflash_disabled_pins: pinctrl-pflash-disabled {
389
+ mux {
390
+ function = "gpio0";
391
+ groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
392
+ "gpio0kgrp";
343393 };
344394 };
345395 pinctrl-gmii {
....@@ -425,8 +475,18 @@
425475 };
426476 };
427477
428
- ata@63000000 {
478
+ ide@63000000 {
429479 status = "okay";
480
+
481
+ /*
482
+ * This drive may have a temperature sensor with a
483
+ * thermal zone we can use for thermal control of the
484
+ * chassis temperature using the fan.
485
+ */
486
+ drive0: ide-port@0 {
487
+ reg = <0>;
488
+ #thermal-sensor-cells = <0>;
489
+ };
430490 };
431491
432492 display-controller@6a000000 {
....@@ -439,5 +499,13 @@
439499 };
440500 };
441501 };
502
+
503
+ usb@68000000 {
504
+ status = "okay";
505
+ };
506
+
507
+ usb@69000000 {
508
+ status = "okay";
509
+ };
442510 };
443511 };