add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/exynos5410.dtsi
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..
@@ -1,12 +1,12 @@
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 // SPDX-License-Identifier: GPL-2.0
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 /*
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- * SAMSUNG EXYNOS5410 SoC device tree source
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+ * Samsung Exynos5410 SoC device tree source
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  *
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  * Copyright (c) 2013 Samsung Electronics Co., Ltd.
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  *		http://www.samsung.com
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  *
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- * SAMSUNG EXYNOS5410 SoC device nodes are listed in this file.
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- * EXYNOS5410 based board files can include this file and provide
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+ * Samsung Exynos5410 SoC device nodes are listed in this file.
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+ * Exynos5410 based board files can include this file and provide
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  * values for board specfic bindings.
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  */
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@@ -189,42 +189,34 @@
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 			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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 		};
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-		amba {
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-			#address-cells = <1>;
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-			#size-cells = <1>;
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-			compatible = "simple-bus";
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-			interrupt-parent = <&gic>;
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-			ranges;
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+		pdma0: pdma@121a0000 {
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+			compatible = "arm,pl330", "arm,primecell";
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+			reg = <0x121a0000 0x1000>;
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+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+			clocks = <&clock CLK_PDMA0>;
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+			clock-names = "apb_pclk";
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+			#dma-cells = <1>;
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+			#dma-channels = <8>;
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+			#dma-requests = <32>;
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+		};
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-			pdma0: pdma@121a0000 {
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-				compatible = "arm,pl330", "arm,primecell";
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-				reg = <0x121a0000 0x1000>;
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-				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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-				clocks = <&clock CLK_PDMA0>;
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-				clock-names = "apb_pclk";
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-				#dma-cells = <1>;
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-				#dma-channels = <8>;
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-				#dma-requests = <32>;
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-			};
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-
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-			pdma1: pdma@121b0000 {
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-				compatible = "arm,pl330", "arm,primecell";
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-				reg = <0x121b0000 0x1000>;
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-				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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-				clocks = <&clock CLK_PDMA1>;
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-				clock-names = "apb_pclk";
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-				#dma-cells = <1>;
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-				#dma-channels = <8>;
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-				#dma-requests = <32>;
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-			};
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+		pdma1: pdma@121b0000 {
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+			compatible = "arm,pl330", "arm,primecell";
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+			reg = <0x121b0000 0x1000>;
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+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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+			clocks = <&clock CLK_PDMA1>;
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+			clock-names = "apb_pclk";
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+			#dma-cells = <1>;
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+			#dma-channels = <8>;
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+			#dma-requests = <32>;
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 		};
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 		audi2s0: i2s@3830000 {
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 			compatible = "samsung,exynos5420-i2s";
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 			reg = <0x03830000 0x100>;
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-			dmas = <&pdma0 10
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-				&pdma0 9
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-				&pdma0 8>;
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+			dmas = <&pdma0 10>,
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+				<&pdma0 9>,
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+				<&pdma0 8>;
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 			dma-names = "tx", "rx", "tx-sec";
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 			clocks = <&clock_audss EXYNOS_I2S_BUS>,
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 				<&clock_audss EXYNOS_I2S_BUS>,
..
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@@ -246,20 +238,26 @@
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 			#include "exynos5420-trip-points.dtsi"
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 		};
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 		cpu1_thermal: cpu1-thermal {
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-		       thermal-sensors = <&tmu_cpu1>;
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-		       #include "exynos5420-trip-points.dtsi"
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+			thermal-sensors = <&tmu_cpu1>;
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+			#include "exynos5420-trip-points.dtsi"
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 		};
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 		cpu2_thermal: cpu2-thermal {
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-		       thermal-sensors = <&tmu_cpu2>;
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-		       #include "exynos5420-trip-points.dtsi"
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+			thermal-sensors = <&tmu_cpu2>;
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+			#include "exynos5420-trip-points.dtsi"
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 		};
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 		cpu3_thermal: cpu3-thermal {
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-		       thermal-sensors = <&tmu_cpu3>;
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-		       #include "exynos5420-trip-points.dtsi"
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+			thermal-sensors = <&tmu_cpu3>;
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+			#include "exynos5420-trip-points.dtsi"
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 		};
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 	};
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 };
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+&adc {
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+	clocks = <&clock CLK_TSADC>;
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+	clock-names = "adc";
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+	samsung,syscon-phandle = <&pmu_system_controller>;
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+};
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+
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 &arm_a15_pmu {
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 	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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 	status = "okay";