forked from ~ljy/RK356X_SDK_RELEASE

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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/dm814x.dtsi
....@@ -4,6 +4,8 @@
44  * kind, whether express or implied.
55  */
66 
7
+#include <dt-bindings/bus/ti-sysc.h>
8
+#include <dt-bindings/clock/dm814.h>
79 #include <dt-bindings/gpio/gpio.h>
810 #include <dt-bindings/pinctrl/dm814x.h>
911 
....@@ -222,6 +224,30 @@
222224 				#interrupt-cells = <2>;
223225 			};
224226 
227
+			gpio3: gpio@1ac000 {
228
+				compatible = "ti,omap4-gpio";
229
+				ti,hwmods = "gpio3";
230
+				ti,gpio-always-on;
231
+				reg = <0x1ac000 0x2000>;
232
+				interrupts = <32>;
233
+				gpio-controller;
234
+				#gpio-cells = <2>;
235
+				interrupt-controller;
236
+				#interrupt-cells = <2>;
237
+			};
238
+
239
+			gpio4: gpio@1ae000 {
240
+				compatible = "ti,omap4-gpio";
241
+				ti,hwmods = "gpio4";
242
+				ti,gpio-always-on;
243
+				reg = <0x1ae000 0x2000>;
244
+				interrupts = <62>;
245
+				gpio-controller;
246
+				#gpio-cells = <2>;
247
+				interrupt-controller;
248
+				#interrupt-cells = <2>;
249
+			};
250
+
225251 			i2c2: i2c@2a000 {
226252 				compatible = "ti,omap4-i2c";
227253 				#address-cells = <1>;
....@@ -240,18 +266,72 @@
240266 				ti,spi-num-cs = <4>;
241267 				ti,hwmods = "mcspi1";
242268 				dmas = <&edma 16 0 &edma 17 0
243
-					&edma 18 0 &edma 19 0>;
269
+					&edma 18 0 &edma 19 0
270
+					&edma 20 0 &edma 21 0
271
+					&edma 22 0 &edma 23 0>;
272
+
273
+				dma-names = "tx0", "rx0", "tx1", "rx1",
274
+					"tx2", "rx2", "tx3", "rx3";
275
+			};
276
+
277
+			mcspi2: spi@1a0000 {
278
+				compatible = "ti,omap4-mcspi";
279
+				reg = <0x1a0000 0x1000>;
280
+				#address-cells = <1>;
281
+				#size-cells = <0>;
282
+				interrupts = <125>;
283
+				ti,spi-num-cs = <4>;
284
+				ti,hwmods = "mcspi2";
285
+				dmas = <&edma 42 0 &edma 43 0
286
+					&edma 44 0 &edma 45 0>;
244287 				dma-names = "tx0", "rx0", "tx1", "rx1";
245288 			};
246289 
247
-			timer1: timer@2e000 {
248
-				compatible = "ti,dm814-timer";
249
-				reg = <0x2e000 0x2000>;
250
-				interrupts = <67>;
251
-				ti,hwmods = "timer1";
252
-				ti,timer-alwon;
290
+			/* Board must configure dmas with edma_xbar for EDMA */
291
+			mcspi3: spi@1a2000 {
292
+				compatible = "ti,omap4-mcspi";
293
+				reg = <0x1a2000 0x1000>;
294
+				#address-cells = <1>;
295
+				#size-cells = <0>;
296
+				interrupts = <126>;
297
+				ti,spi-num-cs = <4>;
298
+				ti,hwmods = "mcspi3";
299
+			};
300
+
301
+			mcspi4: spi@1a4000 {
302
+				compatible = "ti,omap4-mcspi";
303
+				reg = <0x1a4000 0x1000>;
304
+				#address-cells = <1>;
305
+				#size-cells = <0>;
306
+				interrupts = <127>;
307
+				ti,spi-num-cs = <4>;
308
+				ti,hwmods = "mcspi4";
309
+			};
310
+
311
+			timer1_target: target-module@2e000 {
312
+				compatible = "ti,sysc-omap4-timer", "ti,sysc";
313
+				reg = <0x2e000 0x4>,
314
+				      <0x2e010 0x4>;
315
+				reg-names = "rev", "sysc";
316
+				ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
317
+				ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318
+						<SYSC_IDLE_NO>,
319
+						<SYSC_IDLE_SMART>,
320
+						<SYSC_IDLE_SMART_WKUP>;
253321 				clocks = <&timer1_fck>;
254322 				clock-names = "fck";
323
+				#address-cells = <1>;
324
+				#size-cells = <1>;
325
+				ranges = <0x0 0x2e000 0x1000>;
326
+
327
+				timer1: timer@0 {
328
+					compatible = "ti,am335x-timer-1ms";
329
+					reg = <0x0 0x400>;
330
+					interrupts = <67>;
331
+					ti,timer-alwon;
332
+					clocks = <&timer1_fck>;
333
+					clock-names = "fck";
334
+				};
255335 			};
256336 
257337 			uart1: uart@20000 {
....@@ -284,13 +364,29 @@
284364 				dma-names = "tx", "rx";
285365 			};
286366 
287
-			timer2: timer@40000 {
288
-				compatible = "ti,dm814-timer";
289
-				reg = <0x40000 0x2000>;
290
-				interrupts = <68>;
291
-				ti,hwmods = "timer2";
367
+			timer2_target: target-module@40000 {
368
+				compatible = "ti,sysc-omap4-timer", "ti,sysc";
369
+				reg = <0x40000 0x4>,
370
+				      <0x40010 0x4>;
371
+				reg-names = "rev", "sysc";
372
+				ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
373
+				ti,sysc-sidle = <SYSC_IDLE_FORCE>,
374
+						<SYSC_IDLE_NO>,
375
+						<SYSC_IDLE_SMART>,
376
+						<SYSC_IDLE_SMART_WKUP>;
292377 				clocks = <&timer2_fck>;
293378 				clock-names = "fck";
379
+				#address-cells = <1>;
380
+				#size-cells = <1>;
381
+				ranges = <0x0 0x40000 0x1000>;
382
+
383
+				timer2: timer@0 {
384
+					compatible = "ti,dm814-timer";
385
+					reg = <0 0x1000>;
386
+					interrupts = <68>;
387
+					clocks = <&timer2_fck>;
388
+					clock-names = "fck";
389
+				};
294390 			};
295391 
296392 			timer3: timer@42000 {
....@@ -342,6 +438,12 @@
342438 					#address-cells = <1>;
343439 					#size-cells = <1>;
344440 					ranges = <0 0 0x800>;
441
+
442
+					phy_gmii_sel: phy-gmii-sel {
443
+						compatible = "ti,dm814-phy-gmii-sel";
444
+						reg = <0x650 0x4>;
445
+						#phy-cells = <1>;
446
+					};
345447 
346448 					scm_clocks: clocks {
347449 						#address-cells = <1>;
....@@ -451,53 +553,123 @@
451553 			reg = <0x47810000 0x1000>;
452554 		};
453555 
454
-		edma: edma@49000000 {
455
-			compatible = "ti,edma3-tpcc";
456
-			ti,hwmods = "tpcc";
457
-			reg =	<0x49000000 0x10000>;
458
-			reg-names = "edma3_cc";
459
-			interrupts = <12 13 14>;
460
-			interrupt-names = "edma3_ccint", "edma3_mperr",
461
-					  "edma3_ccerrint";
462
-			dma-requests = <64>;
463
-			#dma-cells = <2>;
556
+		target-module@49000000 {
557
+			compatible = "ti,sysc-omap4", "ti,sysc";
558
+			reg = <0x49000000 0x4>;
559
+			reg-names = "rev";
560
+			clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
561
+			clock-names = "fck";
562
+			#address-cells = <1>;
563
+			#size-cells = <1>;
564
+			ranges = <0x0 0x49000000 0x10000>;
464565 
465
-			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
466
-				   <&edma_tptc2 3>, <&edma_tptc3 0>;
566
+			edma: dma@0 {
567
+				compatible = "ti,edma3-tpcc";
568
+				reg = <0 0x10000>;
569
+				reg-names = "edma3_cc";
570
+				interrupts = <12 13 14>;
571
+				interrupt-names = "edma3_ccint", "edma3_mperr",
572
+						  "edma3_ccerrint";
573
+				dma-requests = <64>;
574
+				#dma-cells = <2>;
467575 
468
-			ti,edma-memcpy-channels = <20 21>;
576
+				ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
577
+					   <&edma_tptc2 3>, <&edma_tptc3 0>;
578
+
579
+				ti,edma-memcpy-channels = <20 21>;
580
+			};
469581 		};
470582 
471
-		edma_tptc0: tptc@49800000 {
472
-			compatible = "ti,edma3-tptc";
473
-			ti,hwmods = "tptc0";
474
-			reg =	<0x49800000 0x100000>;
475
-			interrupts = <112>;
476
-			interrupt-names = "edma3_tcerrint";
583
+		target-module@49800000 {
584
+			compatible = "ti,sysc-omap4", "ti,sysc";
585
+			reg = <0x49800000 0x4>,
586
+			      <0x49800010 0x4>;
587
+			reg-names = "rev", "sysc";
588
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
589
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
590
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
591
+					<SYSC_IDLE_SMART>;
592
+			clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
593
+			clock-names = "fck";
594
+			#address-cells = <1>;
595
+			#size-cells = <1>;
596
+			ranges = <0x0 0x49800000 0x100000>;
597
+
598
+			edma_tptc0: dma@0 {
599
+				compatible = "ti,edma3-tptc";
600
+				reg = <0 0x100000>;
601
+				interrupts = <112>;
602
+				interrupt-names = "edma3_tcerrint";
603
+			};
477604 		};
478605 
479
-		edma_tptc1: tptc@49900000 {
480
-			compatible = "ti,edma3-tptc";
481
-			ti,hwmods = "tptc1";
482
-			reg =	<0x49900000 0x100000>;
483
-			interrupts = <113>;
484
-			interrupt-names = "edma3_tcerrint";
606
+		target-module@49900000 {
607
+			compatible = "ti,sysc-omap4", "ti,sysc";
608
+			reg = <0x49900000 0x4>,
609
+			      <0x49900010 0x4>;
610
+			reg-names = "rev", "sysc";
611
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
612
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
613
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
614
+					<SYSC_IDLE_SMART>;
615
+			clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
616
+			clock-names = "fck";
617
+			#address-cells = <1>;
618
+			#size-cells = <1>;
619
+			ranges = <0x0 0x49900000 0x100000>;
620
+
621
+			edma_tptc1: dma@0 {
622
+				compatible = "ti,edma3-tptc";
623
+				reg = <0 0x100000>;
624
+				interrupts = <113>;
625
+				interrupt-names = "edma3_tcerrint";
626
+			};
485627 		};
486628 
487
-		edma_tptc2: tptc@49a00000 {
488
-			compatible = "ti,edma3-tptc";
489
-			ti,hwmods = "tptc2";
490
-			reg =	<0x49a00000 0x100000>;
491
-			interrupts = <114>;
492
-			interrupt-names = "edma3_tcerrint";
629
+		target-module@49a00000 {
630
+			compatible = "ti,sysc-omap4", "ti,sysc";
631
+			reg = <0x49a00000 0x4>,
632
+			      <0x49a00010 0x4>;
633
+			reg-names = "rev", "sysc";
634
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
635
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
636
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
637
+					<SYSC_IDLE_SMART>;
638
+			clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
639
+			clock-names = "fck";
640
+			#address-cells = <1>;
641
+			#size-cells = <1>;
642
+			ranges = <0x0 0x49a00000 0x100000>;
643
+
644
+			edma_tptc2: dma@0 {
645
+				compatible = "ti,edma3-tptc";
646
+				reg = <0 0x100000>;
647
+				interrupts = <114>;
648
+				interrupt-names = "edma3_tcerrint";
649
+			};
493650 		};
494651 
495
-		edma_tptc3: tptc@49b00000 {
496
-			compatible = "ti,edma3-tptc";
497
-			ti,hwmods = "tptc3";
498
-			reg =	<0x49b00000 0x100000>;
499
-			interrupts = <115>;
500
-			interrupt-names = "edma3_tcerrint";
652
+		target-module@49b00000 {
653
+			compatible = "ti,sysc-omap4", "ti,sysc";
654
+			reg = <0x49b00000 0x4>,
655
+			      <0x49b00010 0x4>;
656
+			reg-names = "rev", "sysc";
657
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
658
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
659
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
660
+					<SYSC_IDLE_SMART>;
661
+			clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
662
+			clock-names = "fck";
663
+			#address-cells = <1>;
664
+			#size-cells = <1>;
665
+			ranges = <0x0 0x49b00000 0x100000>;
666
+
667
+			edma_tptc3: dma@0 {
668
+				compatible = "ti,edma3-tptc";
669
+				reg = <0 0x100000>;
670
+				interrupts = <115>;
671
+				interrupt-names = "edma3_tcerrint";
672
+			};
501673 		};
502674 
503675 		/* See TRM "Table 1-318. L4HS Instance Summary" */
....@@ -506,60 +678,73 @@
506678 			#address-cells = <1>;
507679 			#size-cells = <1>;
508680 			ranges = <0 0x4a000000 0x1b4040>;
509
-		};
510681 
511
-		/* REVISIT: Move to live under l4hs once driver is fixed */
512
-		mac: ethernet@4a100000 {
513
-			compatible = "ti,cpsw";
514
-			ti,hwmods = "cpgmac0";
515
-			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
516
-			clock-names = "fck", "cpts";
517
-			cpdma_channels = <8>;
518
-			ale_entries = <1024>;
519
-			bd_ram_size = <0x2000>;
520
-			mac_control = <0x20>;
521
-			slaves = <2>;
522
-			active_slave = <0>;
523
-			cpts_clock_mult = <0x80000000>;
524
-			cpts_clock_shift = <29>;
525
-			reg = <0x4a100000 0x800
526
-			       0x4a100900 0x100>;
527
-			#address-cells = <1>;
528
-			#size-cells = <1>;
529
-			interrupt-parent = <&intc>;
530
-			/*
531
-			 * c0_rx_thresh_pend
532
-			 * c0_rx_pend
533
-			 * c0_tx_pend
534
-			 * c0_misc_pend
535
-			 */
536
-			interrupts = <40 41 42 43>;
537
-			ranges;
538
-			syscon = <&scm_conf>;
539
-
540
-			davinci_mdio: mdio@4a100800 {
541
-				compatible = "ti,davinci_mdio";
682
+			target-module@100000 {
683
+				compatible = "ti,sysc-omap4-simple", "ti,sysc";
684
+				reg = <0x100900 0x4>,
685
+				      <0x100908 0x4>,
686
+				      <0x100904 0x4>;
687
+				reg-names = "rev", "sysc", "syss";
688
+				ti,sysc-mask = <0>;
689
+				ti,sysc-midle = <SYSC_IDLE_FORCE>,
690
+						<SYSC_IDLE_NO>;
691
+				ti,sysc-sidle = <SYSC_IDLE_FORCE>,
692
+						<SYSC_IDLE_NO>;
693
+				ti,syss-mask = <1>;
694
+				clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
695
+				clock-names = "fck";
542696 				#address-cells = <1>;
543
-				#size-cells = <0>;
544
-				ti,hwmods = "davinci_mdio";
545
-				bus_freq = <1000000>;
546
-				reg = <0x4a100800 0x100>;
547
-			};
697
+				#size-cells = <1>;
698
+				ranges = <0 0x100000 0x8000>;
548699 
549
-			cpsw_emac0: slave@4a100200 {
550
-				/* Filled in by U-Boot */
551
-				mac-address = [ 00 00 00 00 00 00 ];
552
-			};
700
+				mac: ethernet@0 {
701
+					compatible = "ti,cpsw";
702
+					clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
703
+					clock-names = "fck", "cpts";
704
+					cpdma_channels = <8>;
705
+					ale_entries = <1024>;
706
+					bd_ram_size = <0x2000>;
707
+					mac_control = <0x20>;
708
+					slaves = <2>;
709
+					active_slave = <0>;
710
+					cpts_clock_mult = <0x80000000>;
711
+					cpts_clock_shift = <29>;
712
+					reg = <0 0x800>,
713
+					      <0x900 0x100>;
714
+					#address-cells = <1>;
715
+					#size-cells = <1>;
716
+					/*
717
+					* c0_rx_thresh_pend
718
+					* c0_rx_pend
719
+					* c0_tx_pend
720
+					* c0_misc_pend
721
+					*/
722
+					interrupts = <40 41 42 43>;
723
+					ranges = <0 0 0x8000>;
724
+					syscon = <&scm_conf>;
553725 
554
-			cpsw_emac1: slave@4a100300 {
555
-				/* Filled in by U-Boot */
556
-				mac-address = [ 00 00 00 00 00 00 ];
557
-			};
726
+					davinci_mdio: mdio@800 {
727
+						compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
728
+						clocks = <&cpsw_125mhz_gclk>;
729
+						clock-names = "fck";
730
+						#address-cells = <1>;
731
+						#size-cells = <0>;
732
+						bus_freq = <1000000>;
733
+						reg = <0x800 0x100>;
734
+					};
558735 
559
-			phy_sel: cpsw-phy-sel@48140650 {
560
-				compatible = "ti,am3352-cpsw-phy-sel";
561
-				reg= <0x48140650 0x4>;
562
-				reg-names = "gmii-sel";
736
+					cpsw_emac0: slave@200 {
737
+						/* Filled in by U-Boot */
738
+						mac-address = [ 00 00 00 00 00 00 ];
739
+						phys = <&phy_gmii_sel 1>;
740
+					};
741
+
742
+					cpsw_emac1: slave@300 {
743
+						/* Filled in by U-Boot */
744
+						mac-address = [ 00 00 00 00 00 00 ];
745
+						phys = <&phy_gmii_sel 2>;
746
+					};
747
+				};
563748 			};
564749 		};
565750 
....@@ -582,3 +767,23 @@
582767 };
583768 
584769 #include "dm814x-clocks.dtsi"
770
+
771
+/* Preferred always-on timer for clocksource */
772
+&timer1_target {
773
+	ti,no-reset-on-init;
774
+	ti,no-idle;
775
+	timer@0 {
776
+		assigned-clocks = <&timer1_fck>;
777
+		assigned-clock-parents = <&devosc_ck>;
778
+	};
779
+};
780
+
781
+/* Preferred timer for clockevent */
782
+&timer2_target {
783
+	ti,no-reset-on-init;
784
+	ti,no-idle;
785
+	timer@0 {
786
+		assigned-clocks = <&timer2_fck>;
787
+		assigned-clock-parents = <&devosc_ck>;
788
+	};
789
+};