hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arm/boot/dts/bcm-cygnus.dtsi
....@@ -34,15 +34,20 @@
3434 #include <dt-bindings/interrupt-controller/irq.h>
3535 #include <dt-bindings/clock/bcm-cygnus.h>
3636
37
-#include "skeleton.dtsi"
38
-
3937 / {
38
+ #address-cells = <1>;
39
+ #size-cells = <1>;
4040 compatible = "brcm,cygnus";
4141 model = "Broadcom Cygnus SoC";
4242 interrupt-parent = <&gic>;
4343
4444 aliases {
4545 ethernet0 = &eth0;
46
+ };
47
+
48
+ memory@0 {
49
+ device_type = "memory";
50
+ reg = <0 0>;
4651 };
4752
4853 cpus {
....@@ -64,7 +69,7 @@
6469 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
6570 };
6671
67
- core {
72
+ core@19000000 {
6873 compatible = "simple-bus";
6974 ranges = <0x00000000 0x19000000 0x1000000>;
7075 #address-cells = <1>;
....@@ -86,7 +91,7 @@
8691 <0x20100 0x100>;
8792 };
8893
89
- L2: l2-cache {
94
+ L2: cache-controller@22000 {
9095 compatible = "arm,pl310-cache";
9196 reg = <0x22000 0x1000>;
9297 cache-unified;
....@@ -229,8 +234,8 @@
229234 compatible = "arm,sp805" , "arm,primecell";
230235 reg = <0x18009000 0x1000>;
231236 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
232
- clocks = <&axi81_clk>;
233
- clock-names = "apb_pclk";
237
+ clocks = <&axi81_clk>, <&axi81_clk>;
238
+ clock-names = "wdog_clk", "apb_pclk";
234239 };
235240
236241 gpio_ccm: gpio@1800a000 {