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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/at91sam9x5.dtsi
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
34  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
....@@ -5,11 +6,8 @@
56  *
67  *  Copyright (C) 2012 Atmel,
78  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8
- *
9
- * Licensed under GPLv2 or later.
109  */
1110 
12
-#include "skeleton.dtsi"
1311 #include <dt-bindings/dma/at91.h>
1412 #include <dt-bindings/pinctrl/at91.h>
1513 #include <dt-bindings/interrupt-controller/irq.h>
....@@ -17,6 +15,8 @@
1715 #include <dt-bindings/clock/at91.h>
1816 
1917 / {
18
+	#address-cells = <1>;
19
+	#size-cells = <1>;
2020 	model = "Atmel AT91SAM9x5 family SoC";
2121 	compatible = "atmel,at91sam9x5";
2222 	interrupt-parent = <&aic>;
....@@ -39,16 +39,18 @@
3939 		pwm0 = &pwm0;
4040 	};
4141 	cpus {
42
-		#address-cells = <0>;
42
+		#address-cells = <1>;
4343 		#size-cells = <0>;
4444 
45
-		cpu {
45
+		cpu@0 {
4646 			compatible = "arm,arm926ej-s";
4747 			device_type = "cpu";
48
+			reg = <0>;
4849 		};
4950 	};
5051 
51
-	memory {
52
+	memory@20000000 {
53
+		device_type = "memory";
5254 		reg = <0x20000000 0x10000000>;
5355 	};
5456 
....@@ -75,6 +77,9 @@
7577 	sram: sram@300000 {
7678 		compatible = "mmio-sram";
7779 		reg = <0x00300000 0x8000>;
80
+		#address-cells = <1>;
81
+		#size-cells = <1>;
82
+		ranges = <0 0x00300000 0x8000>;
7883 	};
7984 
8085 	ahb {
....@@ -111,7 +116,7 @@
111116 			ramc0: ramc@ffffe800 {
112117 				compatible = "atmel,at91sam9g45-ddramc";
113118 				reg = <0xffffe800 0x200>;
114
-				clocks = <&ddrck>;
119
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
115120 				clock-names = "ddrck";
116121 			};
117122 
....@@ -124,269 +129,9 @@
124129 				compatible = "atmel,at91sam9x5-pmc", "syscon";
125130 				reg = <0xfffffc00 0x200>;
126131 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
127
-				interrupt-controller;
128
-				#address-cells = <1>;
129
-				#size-cells = <0>;
130
-				#interrupt-cells = <1>;
131
-
132
-				main_rc_osc: main_rc_osc {
133
-					compatible = "atmel,at91sam9x5-clk-main-rc-osc";
134
-					#clock-cells = <0>;
135
-					interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
136
-					clock-frequency = <12000000>;
137
-					clock-accuracy = <50000000>;
138
-				};
139
-
140
-				main_osc: main_osc {
141
-					compatible = "atmel,at91rm9200-clk-main-osc";
142
-					#clock-cells = <0>;
143
-					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
144
-					clocks = <&main_xtal>;
145
-				};
146
-
147
-				main: mainck {
148
-					compatible = "atmel,at91sam9x5-clk-main";
149
-					#clock-cells = <0>;
150
-					interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
151
-					clocks = <&main_rc_osc>, <&main_osc>;
152
-				};
153
-
154
-				plla: pllack {
155
-					compatible = "atmel,at91rm9200-clk-pll";
156
-					#clock-cells = <0>;
157
-					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
158
-					clocks = <&main>;
159
-					reg = <0>;
160
-					atmel,clk-input-range = <2000000 32000000>;
161
-					#atmel,pll-clk-output-range-cells = <4>;
162
-					atmel,pll-clk-output-ranges = <745000000 800000000 0 0
163
-								       695000000 750000000 1 0
164
-								       645000000 700000000 2 0
165
-								       595000000 650000000 3 0
166
-								       545000000 600000000 0 1
167
-								       495000000 555000000 1 1
168
-								       445000000 500000000 2 1
169
-								       400000000 450000000 3 1>;
170
-				};
171
-
172
-				plladiv: plladivck {
173
-					compatible = "atmel,at91sam9x5-clk-plldiv";
174
-					#clock-cells = <0>;
175
-					clocks = <&plla>;
176
-				};
177
-
178
-				utmi: utmick {
179
-					compatible = "atmel,at91sam9x5-clk-utmi";
180
-					#clock-cells = <0>;
181
-					interrupts-extended = <&pmc AT91_PMC_LOCKU>;
182
-					clocks = <&main>;
183
-				};
184
-
185
-				mck: masterck {
186
-					compatible = "atmel,at91sam9x5-clk-master";
187
-					#clock-cells = <0>;
188
-					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
189
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
190
-					atmel,clk-output-range = <0 133333333>;
191
-					atmel,clk-divisors = <1 2 4 3>;
192
-					atmel,master-clk-have-div3-pres;
193
-				};
194
-
195
-				usb: usbck {
196
-					compatible = "atmel,at91sam9x5-clk-usb";
197
-					#clock-cells = <0>;
198
-					clocks = <&plladiv>, <&utmi>;
199
-				};
200
-
201
-				prog: progck {
202
-					compatible = "atmel,at91sam9x5-clk-programmable";
203
-					#address-cells = <1>;
204
-					#size-cells = <0>;
205
-					interrupt-parent = <&pmc>;
206
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
207
-
208
-					prog0: prog0 {
209
-						#clock-cells = <0>;
210
-						reg = <0>;
211
-						interrupts = <AT91_PMC_PCKRDY(0)>;
212
-					};
213
-
214
-					prog1: prog1 {
215
-						#clock-cells = <0>;
216
-						reg = <1>;
217
-						interrupts = <AT91_PMC_PCKRDY(1)>;
218
-					};
219
-				};
220
-
221
-				smd: smdclk {
222
-					compatible = "atmel,at91sam9x5-clk-smd";
223
-					#clock-cells = <0>;
224
-					clocks = <&plladiv>, <&utmi>;
225
-				};
226
-
227
-				systemck {
228
-					compatible = "atmel,at91rm9200-clk-system";
229
-					#address-cells = <1>;
230
-					#size-cells = <0>;
231
-
232
-					ddrck: ddrck {
233
-						#clock-cells = <0>;
234
-						reg = <2>;
235
-						clocks = <&mck>;
236
-					};
237
-
238
-					smdck: smdck {
239
-						#clock-cells = <0>;
240
-						reg = <4>;
241
-						clocks = <&smd>;
242
-					};
243
-
244
-					uhpck: uhpck {
245
-						#clock-cells = <0>;
246
-						reg = <6>;
247
-						clocks = <&usb>;
248
-					};
249
-
250
-					udpck: udpck {
251
-						#clock-cells = <0>;
252
-						reg = <7>;
253
-						clocks = <&usb>;
254
-					};
255
-
256
-					pck0: pck0 {
257
-						#clock-cells = <0>;
258
-						reg = <8>;
259
-						clocks = <&prog0>;
260
-					};
261
-
262
-					pck1: pck1 {
263
-						#clock-cells = <0>;
264
-						reg = <9>;
265
-						clocks = <&prog1>;
266
-					};
267
-				};
268
-
269
-				periphck {
270
-					compatible = "atmel,at91sam9x5-clk-peripheral";
271
-					#address-cells = <1>;
272
-					#size-cells = <0>;
273
-					clocks = <&mck>;
274
-
275
-					pioAB_clk: pioAB_clk {
276
-						#clock-cells = <0>;
277
-						reg = <2>;
278
-					};
279
-
280
-					pioCD_clk: pioCD_clk {
281
-						#clock-cells = <0>;
282
-						reg = <3>;
283
-					};
284
-
285
-					smd_clk: smd_clk {
286
-						#clock-cells = <0>;
287
-						reg = <4>;
288
-					};
289
-
290
-					usart0_clk: usart0_clk {
291
-						#clock-cells = <0>;
292
-						reg = <5>;
293
-					};
294
-
295
-					usart1_clk: usart1_clk {
296
-						#clock-cells = <0>;
297
-						reg = <6>;
298
-					};
299
-
300
-					usart2_clk: usart2_clk {
301
-						#clock-cells = <0>;
302
-						reg = <7>;
303
-					};
304
-
305
-					twi0_clk: twi0_clk {
306
-						reg = <9>;
307
-						#clock-cells = <0>;
308
-					};
309
-
310
-					twi1_clk: twi1_clk {
311
-						#clock-cells = <0>;
312
-						reg = <10>;
313
-					};
314
-
315
-					twi2_clk: twi2_clk {
316
-						#clock-cells = <0>;
317
-						reg = <11>;
318
-					};
319
-
320
-					mci0_clk: mci0_clk {
321
-						#clock-cells = <0>;
322
-						reg = <12>;
323
-					};
324
-
325
-					spi0_clk: spi0_clk {
326
-						#clock-cells = <0>;
327
-						reg = <13>;
328
-					};
329
-
330
-					spi1_clk: spi1_clk {
331
-						#clock-cells = <0>;
332
-						reg = <14>;
333
-					};
334
-
335
-					uart0_clk: uart0_clk {
336
-						#clock-cells = <0>;
337
-						reg = <15>;
338
-					};
339
-
340
-					uart1_clk: uart1_clk {
341
-						#clock-cells = <0>;
342
-						reg = <16>;
343
-					};
344
-
345
-					tcb0_clk: tcb0_clk {
346
-						#clock-cells = <0>;
347
-						reg = <17>;
348
-					};
349
-
350
-					pwm_clk: pwm_clk {
351
-						#clock-cells = <0>;
352
-						reg = <18>;
353
-					};
354
-
355
-					adc_clk: adc_clk {
356
-						#clock-cells = <0>;
357
-						reg = <19>;
358
-					};
359
-
360
-					dma0_clk: dma0_clk {
361
-						#clock-cells = <0>;
362
-						reg = <20>;
363
-					};
364
-
365
-					dma1_clk: dma1_clk {
366
-						#clock-cells = <0>;
367
-						reg = <21>;
368
-					};
369
-
370
-					uhphs_clk: uhphs_clk {
371
-						#clock-cells = <0>;
372
-						reg = <22>;
373
-					};
374
-
375
-					udphs_clk: udphs_clk {
376
-						#clock-cells = <0>;
377
-						reg = <23>;
378
-					};
379
-
380
-					mci1_clk: mci1_clk {
381
-						#clock-cells = <0>;
382
-						reg = <26>;
383
-					};
384
-
385
-					ssc0_clk: ssc0_clk {
386
-						#clock-cells = <0>;
387
-						reg = <28>;
388
-					};
389
-				};
132
+				#clock-cells = <2>;
133
+				clocks = <&clk32k>, <&main_xtal>;
134
+				clock-names = "slow_clk", "main_xtal";
390135 			};
391136 
392137 			reset_controller: rstc@fffffe00 {
....@@ -405,31 +150,14 @@
405150 				compatible = "atmel,at91sam9260-pit";
406151 				reg = <0xfffffe30 0xf>;
407152 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
408
-				clocks = <&mck>;
153
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
409154 			};
410155 
411
-			sckc@fffffe50 {
156
+			clk32k: sckc@fffffe50 {
412157 				compatible = "atmel,at91sam9x5-sckc";
413158 				reg = <0xfffffe50 0x4>;
414
-
415
-				slow_osc: slow_osc {
416
-					compatible = "atmel,at91sam9x5-clk-slow-osc";
417
-					#clock-cells = <0>;
418
-					clocks = <&slow_xtal>;
419
-				};
420
-
421
-				slow_rc_osc: slow_rc_osc {
422
-					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
423
-					#clock-cells = <0>;
424
-					clock-frequency = <32768>;
425
-					clock-accuracy = <50000000>;
426
-				};
427
-
428
-				clk32k: slck {
429
-					compatible = "atmel,at91sam9x5-clk-slow";
430
-					#clock-cells = <0>;
431
-					clocks = <&slow_rc_osc>, <&slow_osc>;
432
-				};
159
+				clocks = <&slow_xtal>;
160
+				#clock-cells = <0>;
433161 			};
434162 
435163 			tcb0: timer@f8008000 {
....@@ -438,7 +166,7 @@
438166 				#size-cells = <0>;
439167 				reg = <0xf8008000 0x100>;
440168 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
441
-				clocks = <&tcb0_clk>, <&clk32k>;
169
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
442170 				clock-names = "t0_clk", "slow_clk";
443171 			};
444172 
....@@ -448,7 +176,7 @@
448176 				#size-cells = <0>;
449177 				reg = <0xf800c000 0x100>;
450178 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
451
-				clocks = <&tcb0_clk>, <&clk32k>;
179
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
452180 				clock-names = "t0_clk", "slow_clk";
453181 			};
454182 
....@@ -457,7 +185,7 @@
457185 				reg = <0xffffec00 0x200>;
458186 				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
459187 				#dma-cells = <2>;
460
-				clocks = <&dma0_clk>;
188
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
461189 				clock-names = "dma_clk";
462190 			};
463191 
....@@ -466,7 +194,7 @@
466194 				reg = <0xffffee00 0x200>;
467195 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
468196 				#dma-cells = <2>;
469
-				clocks = <&dma1_clk>;
197
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
470198 				clock-names = "dma_clk";
471199 			};
472200 
....@@ -864,7 +592,7 @@
864592 					gpio-controller;
865593 					interrupt-controller;
866594 					#interrupt-cells = <2>;
867
-					clocks = <&pioAB_clk>;
595
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
868596 				};
869597 
870598 				pioB: gpio@fffff600 {
....@@ -876,7 +604,7 @@
876604 					#gpio-lines = <19>;
877605 					interrupt-controller;
878606 					#interrupt-cells = <2>;
879
-					clocks = <&pioAB_clk>;
607
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
880608 				};
881609 
882610 				pioC: gpio@fffff800 {
....@@ -887,7 +615,7 @@
887615 					gpio-controller;
888616 					interrupt-controller;
889617 					#interrupt-cells = <2>;
890
-					clocks = <&pioCD_clk>;
618
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
891619 				};
892620 
893621 				pioD: gpio@fffffa00 {
....@@ -899,7 +627,7 @@
899627 					#gpio-lines = <22>;
900628 					interrupt-controller;
901629 					#interrupt-cells = <2>;
902
-					clocks = <&pioCD_clk>;
630
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
903631 				};
904632 			};
905633 
....@@ -912,7 +640,7 @@
912640 				dma-names = "tx", "rx";
913641 				pinctrl-names = "default";
914642 				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
915
-				clocks = <&ssc0_clk>;
643
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
916644 				clock-names = "pclk";
917645 				status = "disabled";
918646 			};
....@@ -923,8 +651,7 @@
923651 				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
924652 				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
925653 				dma-names = "rxtx";
926
-				pinctrl-names = "default";
927
-				clocks = <&mci0_clk>;
654
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
928655 				clock-names = "mci_clk";
929656 				#address-cells = <1>;
930657 				#size-cells = <0>;
....@@ -937,8 +664,7 @@
937664 				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
938665 				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
939666 				dma-names = "rxtx";
940
-				pinctrl-names = "default";
941
-				clocks = <&mci1_clk>;
667
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
942668 				clock-names = "mci_clk";
943669 				#address-cells = <1>;
944670 				#size-cells = <0>;
....@@ -954,7 +680,7 @@
954680 				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
955681 				       <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
956682 				dma-names = "tx", "rx";
957
-				clocks = <&mck>;
683
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
958684 				clock-names = "usart";
959685 				status = "disabled";
960686 			};
....@@ -968,7 +694,7 @@
968694 				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
969695 				       <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
970696 				dma-names = "tx", "rx";
971
-				clocks = <&usart0_clk>;
697
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
972698 				clock-names = "usart";
973699 				status = "disabled";
974700 			};
....@@ -982,7 +708,7 @@
982708 				dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
983709 				       <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
984710 				dma-names = "tx", "rx";
985
-				clocks = <&usart1_clk>;
711
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
986712 				clock-names = "usart";
987713 				status = "disabled";
988714 			};
....@@ -996,7 +722,7 @@
996722 				dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
997723 				       <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
998724 				dma-names = "tx", "rx";
999
-				clocks = <&usart2_clk>;
725
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
1000726 				clock-names = "usart";
1001727 				status = "disabled";
1002728 			};
....@@ -1012,7 +738,7 @@
1012738 				#size-cells = <0>;
1013739 				pinctrl-names = "default";
1014740 				pinctrl-0 = <&pinctrl_i2c0>;
1015
-				clocks = <&twi0_clk>;
741
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
1016742 				status = "disabled";
1017743 			};
1018744 
....@@ -1027,7 +753,7 @@
1027753 				#size-cells = <0>;
1028754 				pinctrl-names = "default";
1029755 				pinctrl-0 = <&pinctrl_i2c1>;
1030
-				clocks = <&twi1_clk>;
756
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
1031757 				status = "disabled";
1032758 			};
1033759 
....@@ -1042,7 +768,7 @@
1042768 				#size-cells = <0>;
1043769 				pinctrl-names = "default";
1044770 				pinctrl-0 = <&pinctrl_i2c2>;
1045
-				clocks = <&twi2_clk>;
771
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
1046772 				status = "disabled";
1047773 			};
1048774 
....@@ -1052,7 +778,7 @@
1052778 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
1053779 				pinctrl-names = "default";
1054780 				pinctrl-0 = <&pinctrl_uart0>;
1055
-				clocks = <&uart0_clk>;
781
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
1056782 				clock-names = "usart";
1057783 				status = "disabled";
1058784 			};
....@@ -1063,7 +789,7 @@
1063789 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1064790 				pinctrl-names = "default";
1065791 				pinctrl-0 = <&pinctrl_uart1>;
1066
-				clocks = <&uart1_clk>;
792
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
1067793 				clock-names = "usart";
1068794 				status = "disabled";
1069795 			};
....@@ -1074,7 +800,7 @@
1074800 				compatible = "atmel,at91sam9x5-adc";
1075801 				reg = <0xf804c000 0x100>;
1076802 				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
1077
-				clocks = <&adc_clk>,
803
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
1078804 					 <&adc_op_clk>;
1079805 				clock-names = "adc_clk", "adc_op_clk";
1080806 				atmel,adc-use-external-triggers;
....@@ -1121,7 +847,7 @@
1121847 				dma-names = "tx", "rx";
1122848 				pinctrl-names = "default";
1123849 				pinctrl-0 = <&pinctrl_spi0>;
1124
-				clocks = <&spi0_clk>;
850
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
1125851 				clock-names = "spi_clk";
1126852 				status = "disabled";
1127853 			};
....@@ -1137,73 +863,19 @@
1137863 				dma-names = "tx", "rx";
1138864 				pinctrl-names = "default";
1139865 				pinctrl-0 = <&pinctrl_spi1>;
1140
-				clocks = <&spi1_clk>;
866
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
1141867 				clock-names = "spi_clk";
1142868 				status = "disabled";
1143869 			};
1144870 
1145871 			usb2: gadget@f803c000 {
1146
-				#address-cells = <1>;
1147
-				#size-cells = <0>;
1148872 				compatible = "atmel,at91sam9g45-udc";
1149873 				reg = <0x00500000 0x80000
1150874 				       0xf803c000 0x400>;
1151875 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1152
-				clocks = <&utmi>, <&udphs_clk>;
876
+				clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
1153877 				clock-names = "hclk", "pclk";
1154878 				status = "disabled";
1155
-
1156
-				ep@0 {
1157
-					reg = <0>;
1158
-					atmel,fifo-size = <64>;
1159
-					atmel,nb-banks = <1>;
1160
-				};
1161
-
1162
-				ep@1 {
1163
-					reg = <1>;
1164
-					atmel,fifo-size = <1024>;
1165
-					atmel,nb-banks = <2>;
1166
-					atmel,can-dma;
1167
-					atmel,can-isoc;
1168
-				};
1169
-
1170
-				ep@2 {
1171
-					reg = <2>;
1172
-					atmel,fifo-size = <1024>;
1173
-					atmel,nb-banks = <2>;
1174
-					atmel,can-dma;
1175
-					atmel,can-isoc;
1176
-				};
1177
-
1178
-				ep@3 {
1179
-					reg = <3>;
1180
-					atmel,fifo-size = <1024>;
1181
-					atmel,nb-banks = <3>;
1182
-					atmel,can-dma;
1183
-				};
1184
-
1185
-				ep@4 {
1186
-					reg = <4>;
1187
-					atmel,fifo-size = <1024>;
1188
-					atmel,nb-banks = <3>;
1189
-					atmel,can-dma;
1190
-				};
1191
-
1192
-				ep@5 {
1193
-					reg = <5>;
1194
-					atmel,fifo-size = <1024>;
1195
-					atmel,nb-banks = <3>;
1196
-					atmel,can-dma;
1197
-					atmel,can-isoc;
1198
-				};
1199
-
1200
-				ep@6 {
1201
-					reg = <6>;
1202
-					atmel,fifo-size = <1024>;
1203
-					atmel,nb-banks = <3>;
1204
-					atmel,can-dma;
1205
-					atmel,can-isoc;
1206
-				};
1207879 			};
1208880 
1209881 			watchdog: watchdog@fffffe40 {
....@@ -1217,7 +889,7 @@
1217889 				status = "disabled";
1218890 			};
1219891 
1220
-			rtc@fffffeb0 {
892
+			rtc: rtc@fffffeb0 {
1221893 				compatible = "atmel,at91sam9x5-rtc";
1222894 				reg = <0xfffffeb0 0x40>;
1223895 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
....@@ -1229,7 +901,7 @@
1229901 				compatible = "atmel,at91sam9rl-pwm";
1230902 				reg = <0xf8034000 0x300>;
1231903 				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1232
-				clocks = <&pwm_clk>;
904
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
1233905 				#pwm-cells = <3>;
1234906 				status = "disabled";
1235907 			};
....@@ -1239,7 +911,7 @@
1239911 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1240912 			reg = <0x00600000 0x100000>;
1241913 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1242
-			clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
914
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
1243915 			clock-names = "ohci_clk", "hclk", "uhpck";
1244916 			status = "disabled";
1245917 		};
....@@ -1248,7 +920,7 @@
1248920 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1249921 			reg = <0x00700000 0x100000>;
1250922 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1251
-			clocks = <&utmi>, <&uhphs_clk>;
923
+			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
1252924 			clock-names = "usb_clk", "ehci_clk";
1253925 			status = "disabled";
1254926 		};
....@@ -1266,7 +938,7 @@
1266938 				  0x3 0x0 0x40000000 0x10000000
1267939 				  0x4 0x0 0x50000000 0x10000000
1268940 				  0x5 0x0 0x60000000 0x10000000>;
1269
-			clocks = <&mck>;
941
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1270942 			status = "disabled";
1271943 
1272944 			nand_controller: nand-controller {