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2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d 
 kernel/arch/arm/boot/dts/at91sam9g45.dtsi
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
34  *                    applies to AT91SAM9G45, AT91SAM9M10,
....@@ -5,11 +6,8 @@
56  *
67  *  Copyright (C) 2011 Atmel,
78  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8
- *
9
- * Licensed under GPLv2 or later.
109  */
1110 
12
-#include "skeleton.dtsi"
1311 #include <dt-bindings/dma/at91.h>
1412 #include <dt-bindings/pinctrl/at91.h>
1513 #include <dt-bindings/interrupt-controller/irq.h>
....@@ -17,6 +15,8 @@
1715 #include <dt-bindings/clock/at91.h>
1816 
1917 / {
18
+	#address-cells = <1>;
19
+	#size-cells = <1>;
2020 	model = "Atmel AT91SAM9G45 family SoC";
2121 	compatible = "atmel,at91sam9g45";
2222 	interrupt-parent = <&aic>;
....@@ -41,16 +41,18 @@
4141 		pwm0 = &pwm0;
4242 	};
4343 	cpus {
44
-		#address-cells = <0>;
44
+		#address-cells = <1>;
4545 		#size-cells = <0>;
4646 
47
-		cpu {
47
+		cpu@0 {
4848 			compatible = "arm,arm926ej-s";
4949 			device_type = "cpu";
50
+			reg = <0>;
5051 		};
5152 	};
5253 
53
-	memory {
54
+	memory@70000000 {
55
+		device_type = "memory";
5456 		reg = <0x70000000 0x10000000>;
5557 	};
5658 
....@@ -77,6 +79,9 @@
7779 	sram: sram@300000 {
7880 		compatible = "mmio-sram";
7981 		reg = <0x00300000 0x10000>;
82
+		#address-cells = <1>;
83
+		#size-cells = <1>;
84
+		ranges = <0 0x00300000 0x10000>;
8085 	};
8186 
8287 	ahb {
....@@ -102,14 +107,14 @@
102107 			ramc0: ramc@ffffe400 {
103108 				compatible = "atmel,at91sam9g45-ddramc";
104109 				reg = <0xffffe400 0x200>;
105
-				clocks = <&ddrck>;
110
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
106111 				clock-names = "ddrck";
107112 			};
108113 
109114 			ramc1: ramc@ffffe600 {
110115 				compatible = "atmel,at91sam9g45-ddramc";
111116 				reg = <0xffffe600 0x200>;
112
-				clocks = <&ddrck>;
117
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>;
113118 				clock-names = "ddrck";
114119 			};
115120 
....@@ -127,271 +132,9 @@
127132 				compatible = "atmel,at91sam9g45-pmc", "syscon";
128133 				reg = <0xfffffc00 0x100>;
129134 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
130
-				interrupt-controller;
131
-				#address-cells = <1>;
132
-				#size-cells = <0>;
133
-				#interrupt-cells = <1>;
134
-
135
-				main_osc: main_osc {
136
-					compatible = "atmel,at91rm9200-clk-main-osc";
137
-					#clock-cells = <0>;
138
-					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
139
-					clocks = <&main_xtal>;
140
-				};
141
-
142
-				main: mainck {
143
-					compatible = "atmel,at91rm9200-clk-main";
144
-					#clock-cells = <0>;
145
-					clocks = <&main_osc>;
146
-				};
147
-
148
-				plla: pllack {
149
-					compatible = "atmel,at91rm9200-clk-pll";
150
-					#clock-cells = <0>;
151
-					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
152
-					clocks = <&main>;
153
-					reg = <0>;
154
-					atmel,clk-input-range = <2000000 32000000>;
155
-					#atmel,pll-clk-output-range-cells = <4>;
156
-					atmel,pll-clk-output-ranges = <745000000 800000000 0 0
157
-								       695000000 750000000 1 0
158
-								       645000000 700000000 2 0
159
-								       595000000 650000000 3 0
160
-								       545000000 600000000 0 1
161
-								       495000000 555000000 1 1
162
-								       445000000 500000000 2 1
163
-								       400000000 450000000 3 1>;
164
-				};
165
-
166
-				plladiv: plladivck {
167
-					compatible = "atmel,at91sam9x5-clk-plldiv";
168
-					#clock-cells = <0>;
169
-					clocks = <&plla>;
170
-				};
171
-
172
-				utmi: utmick {
173
-					compatible = "atmel,at91sam9x5-clk-utmi";
174
-					#clock-cells = <0>;
175
-					interrupts-extended = <&pmc AT91_PMC_LOCKU>;
176
-					clocks = <&main>;
177
-				};
178
-
179
-				mck: masterck {
180
-					compatible = "atmel,at91rm9200-clk-master";
181
-					#clock-cells = <0>;
182
-					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
183
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
184
-					atmel,clk-output-range = <0 133333333>;
185
-					atmel,clk-divisors = <1 2 4 3>;
186
-				};
187
-
188
-				usb: usbck {
189
-					compatible = "atmel,at91sam9x5-clk-usb";
190
-					#clock-cells = <0>;
191
-					clocks = <&plladiv>, <&utmi>;
192
-				};
193
-
194
-				prog: progck {
195
-					compatible = "atmel,at91sam9g45-clk-programmable";
196
-					#address-cells = <1>;
197
-					#size-cells = <0>;
198
-					interrupt-parent = <&pmc>;
199
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
200
-
201
-					prog0: prog0 {
202
-						#clock-cells = <0>;
203
-						reg = <0>;
204
-						interrupts = <AT91_PMC_PCKRDY(0)>;
205
-					};
206
-
207
-					prog1: prog1 {
208
-						#clock-cells = <0>;
209
-						reg = <1>;
210
-						interrupts = <AT91_PMC_PCKRDY(1)>;
211
-					};
212
-				};
213
-
214
-				systemck {
215
-					compatible = "atmel,at91rm9200-clk-system";
216
-					#address-cells = <1>;
217
-					#size-cells = <0>;
218
-
219
-					ddrck: ddrck {
220
-						#clock-cells = <0>;
221
-						reg = <2>;
222
-						clocks = <&mck>;
223
-					};
224
-
225
-					uhpck: uhpck {
226
-						#clock-cells = <0>;
227
-						reg = <6>;
228
-						clocks = <&usb>;
229
-					};
230
-
231
-					pck0: pck0 {
232
-						#clock-cells = <0>;
233
-						reg = <8>;
234
-						clocks = <&prog0>;
235
-					};
236
-
237
-					pck1: pck1 {
238
-						#clock-cells = <0>;
239
-						reg = <9>;
240
-						clocks = <&prog1>;
241
-					};
242
-				};
243
-
244
-				periphck {
245
-					compatible = "atmel,at91rm9200-clk-peripheral";
246
-					#address-cells = <1>;
247
-					#size-cells = <0>;
248
-					clocks = <&mck>;
249
-
250
-					pioA_clk: pioA_clk {
251
-						#clock-cells = <0>;
252
-						reg = <2>;
253
-					};
254
-
255
-					pioB_clk: pioB_clk {
256
-						#clock-cells = <0>;
257
-						reg = <3>;
258
-					};
259
-
260
-					pioC_clk: pioC_clk {
261
-						#clock-cells = <0>;
262
-						reg = <4>;
263
-					};
264
-
265
-					pioDE_clk: pioDE_clk {
266
-						#clock-cells = <0>;
267
-						reg = <5>;
268
-					};
269
-
270
-					trng_clk: trng_clk {
271
-						#clock-cells = <0>;
272
-						reg = <6>;
273
-					};
274
-
275
-					usart0_clk: usart0_clk {
276
-						#clock-cells = <0>;
277
-						reg = <7>;
278
-					};
279
-
280
-					usart1_clk: usart1_clk {
281
-						#clock-cells = <0>;
282
-						reg = <8>;
283
-					};
284
-
285
-					usart2_clk: usart2_clk {
286
-						#clock-cells = <0>;
287
-						reg = <9>;
288
-					};
289
-
290
-					usart3_clk: usart3_clk {
291
-						#clock-cells = <0>;
292
-						reg = <10>;
293
-					};
294
-
295
-					mci0_clk: mci0_clk {
296
-						#clock-cells = <0>;
297
-						reg = <11>;
298
-					};
299
-
300
-					twi0_clk: twi0_clk {
301
-						#clock-cells = <0>;
302
-						reg = <12>;
303
-					};
304
-
305
-					twi1_clk: twi1_clk {
306
-						#clock-cells = <0>;
307
-						reg = <13>;
308
-					};
309
-
310
-					spi0_clk: spi0_clk {
311
-						#clock-cells = <0>;
312
-						reg = <14>;
313
-					};
314
-
315
-					spi1_clk: spi1_clk {
316
-						#clock-cells = <0>;
317
-						reg = <15>;
318
-					};
319
-
320
-					ssc0_clk: ssc0_clk {
321
-						#clock-cells = <0>;
322
-						reg = <16>;
323
-					};
324
-
325
-					ssc1_clk: ssc1_clk {
326
-						#clock-cells = <0>;
327
-						reg = <17>;
328
-					};
329
-
330
-					tcb0_clk: tcb0_clk {
331
-						#clock-cells = <0>;
332
-						reg = <18>;
333
-					};
334
-
335
-					pwm_clk: pwm_clk {
336
-						#clock-cells = <0>;
337
-						reg = <19>;
338
-					};
339
-
340
-					adc_clk: adc_clk {
341
-						#clock-cells = <0>;
342
-						reg = <20>;
343
-					};
344
-
345
-					dma0_clk: dma0_clk {
346
-						#clock-cells = <0>;
347
-						reg = <21>;
348
-					};
349
-
350
-					uhphs_clk: uhphs_clk {
351
-						#clock-cells = <0>;
352
-						reg = <22>;
353
-					};
354
-
355
-					lcd_clk: lcd_clk {
356
-						#clock-cells = <0>;
357
-						reg = <23>;
358
-					};
359
-
360
-					ac97_clk: ac97_clk {
361
-						#clock-cells = <0>;
362
-						reg = <24>;
363
-					};
364
-
365
-					macb0_clk: macb0_clk {
366
-						#clock-cells = <0>;
367
-						reg = <25>;
368
-					};
369
-
370
-					isi_clk: isi_clk {
371
-						#clock-cells = <0>;
372
-						reg = <26>;
373
-					};
374
-
375
-					udphs_clk: udphs_clk {
376
-						#clock-cells = <0>;
377
-						reg = <27>;
378
-					};
379
-
380
-					aestdessha_clk: aestdessha_clk {
381
-						#clock-cells = <0>;
382
-						reg = <28>;
383
-					};
384
-
385
-					mci1_clk: mci1_clk {
386
-						#clock-cells = <0>;
387
-						reg = <29>;
388
-					};
389
-
390
-					vdec_clk: vdec_clk {
391
-						#clock-cells = <0>;
392
-						reg = <30>;
393
-					};
394
-				};
135
+				#clock-cells = <2>;
136
+				clocks = <&clk32k>, <&main_xtal>;
137
+				clock-names = "slow_clk", "main_xtal";
395138 			};
396139 
397140 			rstc@fffffd00 {
....@@ -404,7 +147,7 @@
404147 				compatible = "atmel,at91sam9260-pit";
405148 				reg = <0xfffffd30 0xf>;
406149 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
407
-				clocks = <&mck>;
150
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
408151 			};
409152 
410153 
....@@ -420,7 +163,7 @@
420163 				#size-cells = <0>;
421164 				reg = <0xfff7c000 0x100>;
422165 				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
423
-				clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
166
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
424167 				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
425168 			};
426169 
....@@ -430,7 +173,7 @@
430173 				#size-cells = <0>;
431174 				reg = <0xfffd4000 0x100>;
432175 				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
433
-				clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
176
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
434177 				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
435178 			};
436179 
....@@ -439,7 +182,7 @@
439182 				reg = <0xffffec00 0x200>;
440183 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
441184 				#dma-cells = <2>;
442
-				clocks = <&dma0_clk>;
185
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
443186 				clock-names = "dma_clk";
444187 			};
445188 
....@@ -882,7 +625,7 @@
882625 					gpio-controller;
883626 					interrupt-controller;
884627 					#interrupt-cells = <2>;
885
-					clocks = <&pioA_clk>;
628
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
886629 				};
887630 
888631 				pioB: gpio@fffff400 {
....@@ -893,7 +636,7 @@
893636 					gpio-controller;
894637 					interrupt-controller;
895638 					#interrupt-cells = <2>;
896
-					clocks = <&pioB_clk>;
639
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
897640 				};
898641 
899642 				pioC: gpio@fffff600 {
....@@ -904,7 +647,7 @@
904647 					gpio-controller;
905648 					interrupt-controller;
906649 					#interrupt-cells = <2>;
907
-					clocks = <&pioC_clk>;
650
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
908651 				};
909652 
910653 				pioD: gpio@fffff800 {
....@@ -915,7 +658,7 @@
915658 					gpio-controller;
916659 					interrupt-controller;
917660 					#interrupt-cells = <2>;
918
-					clocks = <&pioDE_clk>;
661
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
919662 				};
920663 
921664 				pioE: gpio@fffffa00 {
....@@ -926,7 +669,7 @@
926669 					gpio-controller;
927670 					interrupt-controller;
928671 					#interrupt-cells = <2>;
929
-					clocks = <&pioDE_clk>;
672
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
930673 				};
931674 			};
932675 
....@@ -936,7 +679,7 @@
936679 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
937680 				pinctrl-names = "default";
938681 				pinctrl-0 = <&pinctrl_dbgu>;
939
-				clocks = <&mck>;
682
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
940683 				clock-names = "usart";
941684 				status = "disabled";
942685 			};
....@@ -949,7 +692,7 @@
949692 				atmel,use-dma-tx;
950693 				pinctrl-names = "default";
951694 				pinctrl-0 = <&pinctrl_usart0>;
952
-				clocks = <&usart0_clk>;
695
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
953696 				clock-names = "usart";
954697 				status = "disabled";
955698 			};
....@@ -962,7 +705,7 @@
962705 				atmel,use-dma-tx;
963706 				pinctrl-names = "default";
964707 				pinctrl-0 = <&pinctrl_usart1>;
965
-				clocks = <&usart1_clk>;
708
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
966709 				clock-names = "usart";
967710 				status = "disabled";
968711 			};
....@@ -975,7 +718,7 @@
975718 				atmel,use-dma-tx;
976719 				pinctrl-names = "default";
977720 				pinctrl-0 = <&pinctrl_usart2>;
978
-				clocks = <&usart2_clk>;
721
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
979722 				clock-names = "usart";
980723 				status = "disabled";
981724 			};
....@@ -988,7 +731,7 @@
988731 				atmel,use-dma-tx;
989732 				pinctrl-names = "default";
990733 				pinctrl-0 = <&pinctrl_usart3>;
991
-				clocks = <&usart3_clk>;
734
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
992735 				clock-names = "usart";
993736 				status = "disabled";
994737 			};
....@@ -999,7 +742,7 @@
999742 				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
1000743 				pinctrl-names = "default";
1001744 				pinctrl-0 = <&pinctrl_macb_rmii>;
1002
-				clocks = <&macb0_clk>, <&macb0_clk>;
745
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>;
1003746 				clock-names = "hclk", "pclk";
1004747 				status = "disabled";
1005748 			};
....@@ -1008,7 +751,7 @@
1008751 				compatible = "atmel,at91sam9g45-trng";
1009752 				reg = <0xfffcc000 0x100>;
1010753 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
1011
-				clocks = <&trng_clk>;
754
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
1012755 			};
1013756 
1014757 			i2c0: i2c@fff84000 {
....@@ -1019,7 +762,7 @@
1019762 				pinctrl-0 = <&pinctrl_i2c0>;
1020763 				#address-cells = <1>;
1021764 				#size-cells = <0>;
1022
-				clocks = <&twi0_clk>;
765
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
1023766 				status = "disabled";
1024767 			};
1025768 
....@@ -1031,7 +774,7 @@
1031774 				pinctrl-0 = <&pinctrl_i2c1>;
1032775 				#address-cells = <1>;
1033776 				#size-cells = <0>;
1034
-				clocks = <&twi1_clk>;
777
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
1035778 				status = "disabled";
1036779 			};
1037780 
....@@ -1041,7 +784,7 @@
1041784 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1042785 				pinctrl-names = "default";
1043786 				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
1044
-				clocks = <&ssc0_clk>;
787
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
1045788 				clock-names = "pclk";
1046789 				status = "disabled";
1047790 			};
....@@ -1052,7 +795,7 @@
1052795 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
1053796 				pinctrl-names = "default";
1054797 				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1055
-				clocks = <&ssc1_clk>;
798
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
1056799 				clock-names = "pclk";
1057800 				status = "disabled";
1058801 			};
....@@ -1063,7 +806,7 @@
1063806 				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
1064807 				pinctrl-names = "default";
1065808 				pinctrl-0 = <&pinctrl_ac97>;
1066
-				clocks = <&ac97_clk>;
809
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
1067810 				clock-names = "ac97_clk";
1068811 				status = "disabled";
1069812 			};
....@@ -1074,7 +817,7 @@
1074817 				compatible = "atmel,at91sam9g45-adc";
1075818 				reg = <0xfffb0000 0x100>;
1076819 				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
1077
-				clocks = <&adc_clk>, <&adc_op_clk>;
820
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
1078821 				clock-names = "adc_clk", "adc_op_clk";
1079822 				atmel,adc-channels-used = <0xff>;
1080823 				atmel,adc-vref = <3300>;
....@@ -1110,7 +853,7 @@
1110853 				compatible = "atmel,at91sam9g45-isi";
1111854 				reg = <0xfffb4000 0x4000>;
1112855 				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
1113
-				clocks = <&isi_clk>;
856
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
1114857 				clock-names = "isi_clk";
1115858 				status = "disabled";
1116859 				port {
....@@ -1124,7 +867,7 @@
1124867 				reg = <0xfffb8000 0x300>;
1125868 				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1126869 				#pwm-cells = <3>;
1127
-				clocks = <&pwm_clk>;
870
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
1128871 				status = "disabled";
1129872 			};
1130873 
....@@ -1132,12 +875,11 @@
1132875 				compatible = "atmel,hsmci";
1133876 				reg = <0xfff80000 0x600>;
1134877 				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1135
-				pinctrl-names = "default";
1136878 				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1137879 				dma-names = "rxtx";
1138880 				#address-cells = <1>;
1139881 				#size-cells = <0>;
1140
-				clocks = <&mci0_clk>;
882
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
1141883 				clock-names = "mci_clk";
1142884 				status = "disabled";
1143885 			};
....@@ -1146,12 +888,11 @@
1146888 				compatible = "atmel,hsmci";
1147889 				reg = <0xfffd0000 0x600>;
1148890 				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1149
-				pinctrl-names = "default";
1150891 				dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1151892 				dma-names = "rxtx";
1152893 				#address-cells = <1>;
1153894 				#size-cells = <0>;
1154
-				clocks = <&mci1_clk>;
895
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
1155896 				clock-names = "mci_clk";
1156897 				status = "disabled";
1157898 			};
....@@ -1175,7 +916,7 @@
1175916 				interrupts = <14 4 3>;
1176917 				pinctrl-names = "default";
1177918 				pinctrl-0 = <&pinctrl_spi0>;
1178
-				clocks = <&spi0_clk>;
919
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
1179920 				clock-names = "spi_clk";
1180921 				status = "disabled";
1181922 			};
....@@ -1188,99 +929,26 @@
1188929 				interrupts = <15 4 3>;
1189930 				pinctrl-names = "default";
1190931 				pinctrl-0 = <&pinctrl_spi1>;
1191
-				clocks = <&spi1_clk>;
932
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
1192933 				clock-names = "spi_clk";
1193934 				status = "disabled";
1194935 			};
1195936 
1196937 			usb2: gadget@fff78000 {
1197
-				#address-cells = <1>;
1198
-				#size-cells = <0>;
1199938 				compatible = "atmel,at91sam9g45-udc";
1200939 				reg = <0x00600000 0x80000
1201940 				       0xfff78000 0x400>;
1202941 				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1203
-				clocks = <&udphs_clk>, <&utmi>;
942
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
1204943 				clock-names = "pclk", "hclk";
1205944 				status = "disabled";
1206
-
1207
-				ep@0 {
1208
-					reg = <0>;
1209
-					atmel,fifo-size = <64>;
1210
-					atmel,nb-banks = <1>;
1211
-				};
1212
-
1213
-				ep@1 {
1214
-					reg = <1>;
1215
-					atmel,fifo-size = <1024>;
1216
-					atmel,nb-banks = <2>;
1217
-					atmel,can-dma;
1218
-					atmel,can-isoc;
1219
-				};
1220
-
1221
-				ep@2 {
1222
-					reg = <2>;
1223
-					atmel,fifo-size = <1024>;
1224
-					atmel,nb-banks = <2>;
1225
-					atmel,can-dma;
1226
-					atmel,can-isoc;
1227
-				};
1228
-
1229
-				ep@3 {
1230
-					reg = <3>;
1231
-					atmel,fifo-size = <1024>;
1232
-					atmel,nb-banks = <3>;
1233
-					atmel,can-dma;
1234
-				};
1235
-
1236
-				ep@4 {
1237
-					reg = <4>;
1238
-					atmel,fifo-size = <1024>;
1239
-					atmel,nb-banks = <3>;
1240
-					atmel,can-dma;
1241
-				};
1242
-
1243
-				ep@5 {
1244
-					reg = <5>;
1245
-					atmel,fifo-size = <1024>;
1246
-					atmel,nb-banks = <3>;
1247
-					atmel,can-dma;
1248
-					atmel,can-isoc;
1249
-				};
1250
-
1251
-				ep@6 {
1252
-					reg = <6>;
1253
-					atmel,fifo-size = <1024>;
1254
-					atmel,nb-banks = <3>;
1255
-					atmel,can-dma;
1256
-					atmel,can-isoc;
1257
-				};
1258945 			};
1259946 
1260
-			sckc@fffffd50 {
947
+			clk32k: sckc@fffffd50 {
1261948 				compatible = "atmel,at91sam9x5-sckc";
1262949 				reg = <0xfffffd50 0x4>;
1263
-
1264
-				slow_osc: slow_osc {
1265
-					compatible = "atmel,at91sam9x5-clk-slow-osc";
1266
-					#clock-cells = <0>;
1267
-					atmel,startup-time-usec = <1200000>;
1268
-					clocks = <&slow_xtal>;
1269
-				};
1270
-
1271
-				slow_rc_osc: slow_rc_osc {
1272
-					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1273
-					#clock-cells = <0>;
1274
-					atmel,startup-time-usec = <75>;
1275
-					clock-frequency = <32768>;
1276
-					clock-accuracy = <50000000>;
1277
-				};
1278
-
1279
-				clk32k: slck {
1280
-					compatible = "atmel,at91sam9x5-clk-slow";
1281
-					#clock-cells = <0>;
1282
-					clocks = <&slow_rc_osc &slow_osc>;
1283
-				};
950
+				clocks = <&slow_xtal>;
951
+				#clock-cells = <0>;
1284952 			};
1285953 
1286954 			rtc@fffffd20 {
....@@ -1312,7 +980,7 @@
1312980 			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1313981 			pinctrl-names = "default";
1314982 			pinctrl-0 = <&pinctrl_fb>;
1315
-			clocks = <&lcd_clk>, <&lcd_clk>;
983
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
1316984 			clock-names = "hclk", "lcdc_clk";
1317985 			status = "disabled";
1318986 		};
....@@ -1321,7 +989,7 @@
1321989 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1322990 			reg = <0x00700000 0x100000>;
1323991 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1324
-			clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
992
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
1325993 			clock-names = "ohci_clk", "hclk", "uhpck";
1326994 			status = "disabled";
1327995 		};
....@@ -1330,7 +998,7 @@
1330998 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1331999 			reg = <0x00800000 0x100000>;
13321000 			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1333
-			clocks = <&utmi>, <&uhphs_clk>;
1001
+			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
13341002 			clock-names = "usb_clk", "ehci_clk";
13351003 			status = "disabled";
13361004 		};
....@@ -1348,7 +1016,7 @@
13481016 				  0x3 0x0 0x40000000 0x10000000
13491017 				  0x4 0x0 0x50000000 0x10000000
13501018 				  0x5 0x0 0x60000000 0x10000000>;
1351
-			clocks = <&mck>;
1019
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
13521020 			status = "disabled";
13531021 
13541022 			nand_controller: nand-controller {