add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/arm-realview-pb11mp.dts
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@@ -23,9 +23,10 @@
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 /dts-v1/;
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 #include <dt-bindings/interrupt-controller/irq.h>
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 #include <dt-bindings/gpio/gpio.h>
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-#include "skeleton.dtsi"
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 / {
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+	#address-cells = <1>;
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+	#size-cells = <1>;
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 	model = "ARM RealView PB11MPcore";
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 	compatible = "arm,realview-pb11mp";
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@@ -39,6 +40,7 @@
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 	};
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 	memory {
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+		device_type = "memory";
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 		/*
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 		 * The PB11MPCore has 512 MiB memory @ 0x70000000
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 		 * and the first 256 are also remapped @ 0x00000000
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@@ -90,7 +92,7 @@
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 		      <0x1f000100 0x100>;
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 	};
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-	L2: l2-cache {
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+	L2: cache-controller {
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 		compatible = "arm,l220-cache";
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 		reg = <0x1f002000 0x1000>;
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 		interrupt-parent = <&intc_tc11mp>;
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@@ -233,6 +235,9 @@
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 		compatible = "arm,versatile-flash", "cfi-flash";
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 		reg = <0x40000000 0x04000000>;
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 		bank-width = <4>;
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+		partitions {
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+			compatible = "arm,arm-firmware-suite";
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+		};
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 	};
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 	flash1@44000000 {
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@@ -240,6 +245,9 @@
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 		compatible = "arm,versatile-flash", "cfi-flash";
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 		reg = <0x44000000 0x04000000>;
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 		bank-width = <4>;
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+		partitions {
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+			compatible = "arm,arm-firmware-suite";
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+		};
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 	};
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 	bridge {
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@@ -538,7 +546,7 @@
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 			interrupt-parent = <&intc_pb11mp>;
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 			interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
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 			clocks = <&wdogclk>, <&pclk>;
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-			clock-names = "wdogclk", "apb_pclk";
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+			clock-names = "wdog_clk", "apb_pclk";
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 			status = "disabled";
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 		};
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@@ -548,7 +556,7 @@
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 			interrupt-parent = <&intc_pb11mp>;
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 			interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
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 			clocks = <&wdogclk>, <&pclk>;
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-			clock-names = "wdogclk", "apb_pclk";
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+			clock-names = "wdog_clk", "apb_pclk";
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 		};
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 		timer01: timer@10011000 {
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@@ -560,8 +568,8 @@
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 			clocks = <&sp810_syscon 0>,
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 			         <&sp810_syscon 1>,
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 				 <&pclk>;
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-			clock-names = "timerclk0",
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-				    "timerclk1",
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+			clock-names = "timer0clk",
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+				    "timer1clk",
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 				    "apb_pclk";
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 		};
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@@ -574,8 +582,8 @@
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 			clocks = <&sp810_syscon 2>,
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 			         <&sp810_syscon 3>,
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 				 <&pclk>;
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-			clock-names = "timerclk2",
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-				    "timerclk3",
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+			clock-names = "timer0clk",
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+				    "timer1clk",
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 				    "apb_pclk";
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 		};
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@@ -637,16 +645,16 @@
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 		timer45: timer@10018000 {
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 			compatible = "arm,sp804", "arm,primecell";
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 			reg = <0x10018000 0x1000>;
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-			clocks = <&timclk>, <&pclk>;
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-			clock-names = "timer", "apb_pclk";
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+			clocks = <&timclk>, <&timclk>, <&pclk>;
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+			clock-names = "timer0clk", "timer1clk", "apb_pclk";
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 			status = "disabled";
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 		};
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 		timer67: timer@10019000 {
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 			compatible = "arm,sp804", "arm,primecell";
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 			reg = <0x10019000 0x1000>;
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-			clocks = <&timclk>, <&pclk>;
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-			clock-names = "timer", "apb_pclk";
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+			clocks = <&timclk>, <&timclk>, <&pclk>;
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+			clock-names = "timer0clk", "timer1clk", "apb_pclk";
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 			status = "disabled";
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 		};
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