add boot partition size

hc

2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d

 kernel/arch/arm/boot/dts/am335x-shc.dts
..
..
@@ -1,11 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0
1
2
 /*
2
3
  * support for the bosch am335x based shc c3 board
3
4
  *
4
5
  * Copyright, C) 2015 Heiko Schocher <hs@denx.de>
5
6
  *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License version 2 as
8
- * published by the Free Software Foundation.
9
7
  */
10
8
 /dts-v1/;
11
9
 
..
..
@@ -119,10 +117,6 @@
119
117
 	status = "okay";
120
118
 };
121
119
 
122
-&cppi41dma  {
123
-	status = "okay";
124
-};
125
-
126
120
 &davinci_mdio {
127
121
 	pinctrl-names = "default", "sleep";
128
122
 	pinctrl-0 = <&davinci_mdio_default>;
..
..
@@ -138,7 +132,7 @@
138
132
 &epwmss1 {
139
133
 	status = "okay";
140
134
 
141
-	ehrpwm1: pwm@48302200 {
135
+	ehrpwm1: pwm@200 {
142
136
 		pinctrl-names = "default";
143
137
 		pinctrl-0 = <&ehrpwm1_pins>;
144
138
 		status = "okay";
..
..
@@ -205,8 +199,7 @@
205
199
 	pinctrl-1 = <&cpsw_sleep>;
206
200
 	status = "okay";
207
201
 	slaves = <1>;
208
-	cpsw_emac0: slave@4a100200  {
209
-		phy_id = <&davinci_mdio>, <0>;
202
+	cpsw_emac0: slave@200 {
210
203
 		phy-mode = "mii";
211
204
 		phy-handle = <&ethernetphy0>;
212
205
 	};
..
..
@@ -216,7 +209,7 @@
216
209
 	pinctrl-names = "default";
217
210
 	pinctrl-0 = <&mmc1_pins>;
218
211
 	bus-width = <0x4>;
219
-	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
212
+	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
220
213
 	cd-inverted;
221
214
 	max-frequency = <26000000>;
222
215
 	vmmc-supply = <&vmmcsd_fixed>;
..
..
@@ -361,20 +354,7 @@
361
354
 	status = "okay";
362
355
 };
363
356
 
364
-&usb {
365
-	status = "okay";
366
-};
367
-
368
-&usb_ctrl_mod {
369
-	status = "okay";
370
-};
371
-
372
-&usb1_phy {
373
-	status = "okay";
374
-};
375
-
376
357
 &usb1 {
377
-	status = "okay";
378
358
 	dr_mode = "host";
379
359
 };
380
360
 
..
..
@@ -385,193 +365,191 @@
385
365
 	clkout2_pin: pinmux_clkout2_pin {
386
366
 		pinctrl-single,pins = <
387
367
 			/* xdma_event_intr1.clkout2 */
388
-			AM33XX_IOPAD(0x9b4, PIN_INPUT | MUX_MODE6)
368
+			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT, MUX_MODE6)
389
369
 		>;
390
370
 	};
391
371
 
392
372
 	cpsw_default: cpsw_default {
393
373
 		pinctrl-single,pins = <
394
374
 			/* Slave 1 */
395
-			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE0)
396
-			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
397
-			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE0)
398
-			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
399
-			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
400
-			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE0)
401
-			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE0)
402
-			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0)
403
-			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE0)
404
-			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE0)
405
-			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE0)
406
-			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE0)
407
-			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE0)
375
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE0)
376
+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
377
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE0)
378
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
379
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
380
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
381
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
382
+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
383
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
384
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE0)
385
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE0)
386
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE0)
387
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE0)
408
388
 		>;
409
389
 	};
410
390
 
411
391
 	cpsw_sleep: cpsw_sleep {
412
392
 		pinctrl-single,pins = <
413
393
 			/* Slave 1 reset value */
414
-			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
415
-			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
416
-			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
417
-			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
418
-			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
419
-			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
420
-			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
421
-			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
422
-			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
423
-			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
424
-			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
425
-			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
426
-			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
394
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
395
+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
396
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
397
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
398
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
399
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
400
+			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
401
+			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
402
+			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
403
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
404
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
405
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
406
+			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
427
407
 		>;
428
408
 	};
429
409
 
430
410
 	davinci_mdio_default: davinci_mdio_default {
431
411
 		pinctrl-single,pins = <
432
-			/* mdio_data.mdio_data */
433
-			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
434
-			/* mdio_clk.mdio_clk */
435
-			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)
412
+			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
413
+			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
436
414
 		>;
437
415
 	};
438
416
 
439
417
 	davinci_mdio_sleep: davinci_mdio_sleep {
440
418
 		pinctrl-single,pins = <
441
419
 			/* MDIO reset value */
442
-			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
443
-			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
420
+			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
421
+			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
444
422
 		>;
445
423
 	};
446
424
 
447
425
 	ehrpwm1_pins: pinmux_ehrpwm1 {
448
426
 		pinctrl-single,pins = <
449
-			AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.gpio1_19 */
427
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.gpio1_19 */
450
428
 		>;
451
429
 	};
452
430
 
453
431
 	emmc_pins: pinmux_emmc_pins {
454
432
 		pinctrl-single,pins = <
455
-			AM33XX_IOPAD(0x880, PIN_INPUT | MUX_MODE2)
456
-			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)
457
-			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)
458
-			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)
459
-			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)
460
-			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)
461
-			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1)
462
-			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1)
463
-			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1)
464
-			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1)
433
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT, MUX_MODE2)
434
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)
435
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)
436
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)
437
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)
438
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)
439
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)
440
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)
441
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)
442
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)
465
443
 		>;
466
444
 	};
467
445
 
468
446
 	i2c0_pins: pinmux_i2c0_pins {
469
447
 		pinctrl-single,pins = <
470
-			AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0)
471
-			AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0)
448
+			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
449
+			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
472
450
 		>;
473
451
 	};
474
452
 
475
453
 	mmc1_pins: pinmux_mmc1_pins {
476
454
 		pinctrl-single,pins = <
477
-			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE5)
455
+			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE5)
478
456
 		>;
479
457
 	};
480
458
 
481
459
 	mmc3_pins: pinmux_mmc3_pins {
482
460
 		pinctrl-single,pins = <
483
-			AM33XX_IOPAD(0x830, PIN_INPUT | MUX_MODE3)
484
-			AM33XX_IOPAD(0x834, PIN_INPUT | MUX_MODE3)
485
-			AM33XX_IOPAD(0x838, PIN_INPUT | MUX_MODE3)
486
-			AM33XX_IOPAD(0x83c, PIN_INPUT | MUX_MODE3)
487
-			AM33XX_IOPAD(0x888, PIN_INPUT | MUX_MODE3)
488
-			AM33XX_IOPAD(0x88c, PIN_INPUT | MUX_MODE3)
461
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE3)
462
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE3)
463
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT, MUX_MODE3)
464
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE3)
465
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT, MUX_MODE3)
466
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT, MUX_MODE3)
489
467
 		>;
490
468
 	};
491
469
 
492
470
 	uart0_pins: pinmux_uart0_pins {
493
471
 		pinctrl-single,pins = <
494
-			AM33XX_IOPAD(0x968, PIN_INPUT_PULLDOWN | MUX_MODE0)
495
-			AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE0)
496
-			AM33XX_IOPAD(0x970, PIN_INPUT_PULLDOWN | MUX_MODE0)
497
-			AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0)
472
+			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
473
+			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE0)
474
+			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLDOWN, MUX_MODE0)
475
+			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT, MUX_MODE0)
498
476
 		>;
499
477
 	};
500
478
 
501
479
 	uart1_pins: pinmux_uart1 {
502
480
 		pinctrl-single,pins = <
503
-			AM33XX_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE0)
504
-			AM33XX_IOPAD(0x97C, PIN_OUTPUT | MUX_MODE0)
505
-			AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE0)
506
-			AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0)
481
+			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
482
+			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT, MUX_MODE0)
483
+			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
484
+			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
507
485
 		>;
508
486
 	};
509
487
 
510
488
 	uart2_pins: pinmux_uart2_pins {
511
489
 		pinctrl-single,pins = <
512
-			AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1)
513
-			AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1)
490
+			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)
491
+			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)
514
492
 		>;
515
493
 	};
516
494
 
517
495
 	uart4_pins: pinmux_uart4_pins {
518
496
 		pinctrl-single,pins = <
519
-			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6)
520
-			AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE6)
497
+			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)
498
+			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE6)
521
499
 		>;
522
500
 	};
523
501
 
524
502
 	user_leds_s0: user_leds_s0 {
525
503
 		pinctrl-single,pins = <
526
-			AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE7)
527
-			AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE7)
528
-			AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7)
529
-			AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE7)
530
-			AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE7)
531
-			AM33XX_IOPAD(0x844, PIN_OUTPUT | MUX_MODE7)
532
-			AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
533
-			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
534
-			AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7)
535
-			AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7)
536
-			AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLUP | MUX_MODE7)
537
-			AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE7)
538
-			AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE7)
539
-			AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE7)
540
-			AM33XX_IOPAD(0x86c, PIN_INPUT | MUX_MODE7)
541
-			AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLUP | MUX_MODE7)
542
-			AM33XX_IOPAD(0x87c, PIN_INPUT | MUX_MODE7)
543
-			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE7)
544
-			AM33XX_IOPAD(0x894, PIN_INPUT | MUX_MODE7)
545
-			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE7)
546
-			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE7)
547
-			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE7)
548
-			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE7)
549
-			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE7)
550
-			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE7)
551
-			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE7)
552
-			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE7)
553
-			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE7)
554
-			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE7)
555
-			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE7)
556
-			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7)
557
-			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE7)
558
-			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE7)
559
-			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE7)
560
-			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE7)
561
-			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE7)
562
-			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE7)
563
-			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE7)
564
-			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE7)
565
-			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE7)
566
-			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE7)
567
-			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
568
-			AM33XX_IOPAD(0x958, PIN_OUTPUT | MUX_MODE7)
569
-			AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7)
570
-			AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLUP | MUX_MODE7)
571
-			AM33XX_IOPAD(0x9a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
572
-			AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
573
-			AM33XX_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
574
-			AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE7)
504
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE7)
505
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE7)
506
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7)
507
+			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7)
508
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7)
509
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_OUTPUT, MUX_MODE7)
510
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE7)
511
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
512
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7)
513
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7)
514
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLUP, MUX_MODE7)
515
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT, MUX_MODE7)
516
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7)
517
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7)
518
+			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT, MUX_MODE7)
519
+			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7)
520
+			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT, MUX_MODE7)
521
+			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7)
522
+			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT, MUX_MODE7)
523
+			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7)
524
+			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE7)
525
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE7)
526
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE7)
527
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE7)
528
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE7)
529
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE7)
530
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE7)
531
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE7)
532
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE7)
533
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE7)
534
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE7)
535
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE7)
536
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7)
537
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE7)
538
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7)
539
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE7)
540
+			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7)
541
+			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE7)
542
+			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE7)
543
+			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE7)
544
+			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE7)
545
+			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
546
+			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_OUTPUT, MUX_MODE7)
547
+			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE7)
548
+			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLUP, MUX_MODE7)
549
+			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
550
+			AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
551
+			AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
552
+			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7)
575
553
 		>;
576
554
 	};
577
555
 };