.. | .. |
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1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
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2 | 2 | /* |
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3 | | - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
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| 3 | + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
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4 | 4 | * |
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5 | 5 | * Author: Robert Nelson <robertcnelson@gmail.com> |
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6 | 6 | */ |
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.. | .. |
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59 | 59 | }; |
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60 | 60 | }; |
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61 | 61 | |
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| 62 | +&gpio0 { |
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| 63 | + gpio-line-names = |
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| 64 | + "[NC]", |
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| 65 | + "[NC]", |
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| 66 | + "P1.08 [SPI0_CLK]", |
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| 67 | + "P1.10 [SPI0_MISO]", |
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| 68 | + "P1.12 [SPI0_MOSI]", |
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| 69 | + "P1.06 [SPI0_CS]", |
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| 70 | + "[MMC0_CD]", |
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| 71 | + "P2.29 [SPI1_CLK]", |
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| 72 | + "[SYSBOOT]", |
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| 73 | + "[SYSBOOT]", |
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| 74 | + "[SYSBOOT]", |
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| 75 | + "[SYSBOOT]", |
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| 76 | + "P1.26 [I2C2_SDA]", |
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| 77 | + "P1.28 [I2C2_SCL]", |
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| 78 | + "P2.11 [I2C1_SDA]", |
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| 79 | + "P2.09 [I2C1_SCL]", |
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| 80 | + "[NC]", |
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| 81 | + "[NC]", |
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| 82 | + "[NC]", |
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| 83 | + "P2.31 [SPI1_CS]", |
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| 84 | + "P1.20 [PRU0.16]", |
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| 85 | + "[NC]", |
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| 86 | + "[NC]", |
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| 87 | + "P2.03", |
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| 88 | + "[NC]", |
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| 89 | + "[NC]", |
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| 90 | + "P1.34", |
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| 91 | + "P2.19", |
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| 92 | + "[NC]", |
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| 93 | + "[NC]", |
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| 94 | + "P2.05 [UART4_RX]", |
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| 95 | + "P2.07 [UART4_TX]"; |
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| 96 | +}; |
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| 97 | + |
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| 98 | +&gpio1 { |
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| 99 | + gpio-line-names = |
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| 100 | + "[NC]", |
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| 101 | + "[NC]", |
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| 102 | + "[NC]", |
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| 103 | + "[NC]", |
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| 104 | + "[NC]", |
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| 105 | + "[NC]", |
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| 106 | + "[NC]", |
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| 107 | + "[NC]", |
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| 108 | + "[NC]", |
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| 109 | + "P2.25 [SPI1_MOSI]", |
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| 110 | + "P1.32 [UART0_RX]", |
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| 111 | + "P1.30 [UART0_TX]", |
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| 112 | + "P2.24", |
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| 113 | + "P2.33", |
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| 114 | + "P2.22", |
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| 115 | + "P2.18", |
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| 116 | + "[NC]", |
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| 117 | + "[NC]", |
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| 118 | + "P2.01 [PWM1A]", |
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| 119 | + "[NC]", |
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| 120 | + "P2.10", |
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| 121 | + "[USR LED 0]", |
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| 122 | + "[USR LED 1]", |
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| 123 | + "[USR LED 2]", |
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| 124 | + "[USR LED 3]", |
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| 125 | + "P2.06", |
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| 126 | + "P2.04", |
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| 127 | + "P2.02", |
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| 128 | + "P2.08", |
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| 129 | + "[NC]", |
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| 130 | + "[NC]", |
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| 131 | + "[NC]"; |
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| 132 | +}; |
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| 133 | + |
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| 134 | +&gpio2 { |
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| 135 | + gpio-line-names = |
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| 136 | + "P2.20", |
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| 137 | + "P2.17", |
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| 138 | + "[NC]", |
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| 139 | + "[NC]", |
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| 140 | + "[NC]", |
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| 141 | + "[EEPROM_WP]", |
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| 142 | + "[SYSBOOT]", |
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| 143 | + "[SYSBOOT]", |
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| 144 | + "[SYSBOOT]", |
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| 145 | + "[SYSBOOT]", |
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| 146 | + "[SYSBOOT]", |
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| 147 | + "[SYSBOOT]", |
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| 148 | + "[SYSBOOT]", |
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| 149 | + "[SYSBOOT]", |
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| 150 | + "[SYSBOOT]", |
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| 151 | + "[SYSBOOT]", |
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| 152 | + "[SYSBOOT]", |
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| 153 | + "[SYSBOOT]", |
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| 154 | + "[NC]", |
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| 155 | + "[NC]", |
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| 156 | + "[NC]", |
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| 157 | + "[NC]", |
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| 158 | + "P2.35 [AIN5]", |
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| 159 | + "P1.02 [AIN6]", |
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| 160 | + "P1.35 [PRU1.10]", |
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| 161 | + "P1.04 [PRU1.11]", |
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| 162 | + "[MMC0_DAT3]", |
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| 163 | + "[MMC0_DAT2]", |
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| 164 | + "[MMC0_DAT1]", |
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| 165 | + "[MMC0_DAT0]", |
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| 166 | + "[MMC0_CLK]", |
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| 167 | + "[MMC0_CMD]"; |
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| 168 | +}; |
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| 169 | + |
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| 170 | +&gpio3 { |
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| 171 | + gpio-line-names = |
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| 172 | + "[NC]", |
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| 173 | + "[NC]", |
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| 174 | + "[NC]", |
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| 175 | + "[NC]", |
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| 176 | + "[NC]", |
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| 177 | + "[I2C0_SDA]", |
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| 178 | + "[I2C0_SCL]", |
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| 179 | + "[JTAG]", |
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| 180 | + "[JTAG]", |
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| 181 | + "[NC]", |
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| 182 | + "[NC]", |
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| 183 | + "[NC]", |
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| 184 | + "[NC]", |
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| 185 | + "P1.03 [USB1]", |
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| 186 | + "P1.36 [PWM0A]", |
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| 187 | + "P1.33 [PRU0.1]", |
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| 188 | + "P2.32 [PRU0.2]", |
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| 189 | + "P2.30 [PRU0.3]", |
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| 190 | + "P1.31 [PRU0.4]", |
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| 191 | + "P2.34 [PRU0.5]", |
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| 192 | + "P2.28 [PRU0.6]", |
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| 193 | + "P1.29 [PRU0.7]", |
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| 194 | + "[NC]", |
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| 195 | + "[NC]", |
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| 196 | + "[NC]", |
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| 197 | + "[NC]", |
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| 198 | + "[NC]", |
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| 199 | + "[NC]", |
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| 200 | + "[NC]", |
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| 201 | + "[NC]", |
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| 202 | + "[NC]", |
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| 203 | + "[NC]"; |
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| 204 | +}; |
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| 205 | + |
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62 | 206 | &am33xx_pinmux { |
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| 207 | + |
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| 208 | + pinctrl-names = "default"; |
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| 209 | + |
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| 210 | + pinctrl-0 = < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio |
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| 211 | + &P2_33_gpio &P2_22_gpio &P2_18_gpio &P2_10_gpio |
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| 212 | + &P2_06_gpio &P2_04_gpio &P2_02_gpio &P2_08_gpio |
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| 213 | + &P2_17_gpio >; |
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| 214 | + |
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| 215 | + /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */ |
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| 216 | + P2_03_gpio: pinmux_P2_03_gpio { |
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| 217 | + pinctrl-single,pins = < |
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| 218 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 219 | + >; |
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| 220 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 221 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 222 | + }; |
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| 223 | + |
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| 224 | + /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */ |
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| 225 | + P1_34_gpio: pinmux_P1_34_gpio { |
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| 226 | + pinctrl-single,pins = < |
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| 227 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 228 | + >; |
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| 229 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 230 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 231 | + }; |
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| 232 | + |
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| 233 | + /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */ |
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| 234 | + P2_19_gpio: pinmux_P2_19_gpio { |
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| 235 | + pinctrl-single,pins = < |
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| 236 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 237 | + >; |
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| 238 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 239 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 240 | + }; |
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| 241 | + |
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| 242 | + /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */ |
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| 243 | + P2_24_gpio: pinmux_P2_24_gpio { |
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| 244 | + pinctrl-single,pins = < |
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| 245 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 246 | + >; |
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| 247 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 248 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 249 | + }; |
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| 250 | + |
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| 251 | + /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */ |
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| 252 | + P2_33_gpio: pinmux_P2_33_gpio { |
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| 253 | + pinctrl-single,pins = < |
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| 254 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 255 | + >; |
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| 256 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 257 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 258 | + }; |
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| 259 | + |
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| 260 | + /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */ |
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| 261 | + P2_22_gpio: pinmux_P2_22_gpio { |
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| 262 | + pinctrl-single,pins = < |
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| 263 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 264 | + >; |
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| 265 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 266 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 267 | + }; |
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| 268 | + |
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| 269 | + /* P2_18 (ZCZ ball U13) gpio1_15 0x83c PIN 15 */ |
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| 270 | + P2_18_gpio: pinmux_P2_18_gpio { |
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| 271 | + pinctrl-single,pins = < |
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| 272 | + AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 273 | + >; |
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| 274 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 275 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 276 | + }; |
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| 277 | + |
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| 278 | + /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */ |
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| 279 | + P2_10_gpio: pinmux_P2_10_gpio { |
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| 280 | + pinctrl-single,pins = < |
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| 281 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 282 | + >; |
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| 283 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 284 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 285 | + }; |
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| 286 | + |
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| 287 | + /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */ |
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| 288 | + P2_06_gpio: pinmux_P2_06_gpio { |
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| 289 | + pinctrl-single,pins = < |
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| 290 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 291 | + >; |
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| 292 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 293 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 294 | + }; |
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| 295 | + |
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| 296 | + /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */ |
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| 297 | + P2_04_gpio: pinmux_P2_04_gpio { |
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| 298 | + pinctrl-single,pins = < |
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| 299 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 300 | + >; |
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| 301 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 302 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 303 | + }; |
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| 304 | + |
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| 305 | + /* P2_02 (ZCZ ball V17) gpio1_27 0x86c PIN 27 */ |
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| 306 | + P2_02_gpio: pinmux_P2_02_gpio { |
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| 307 | + pinctrl-single,pins = < |
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| 308 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 309 | + >; |
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| 310 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 311 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 312 | + }; |
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| 313 | + |
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| 314 | + /* P2_08 (ZCZ ball U18) gpio1_28 0x878 PIN 30 */ |
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| 315 | + P2_08_gpio: pinmux_P2_08_gpio { |
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| 316 | + pinctrl-single,pins = < |
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| 317 | + AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
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| 318 | + >; |
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| 319 | + pinctrl-single,bias-pullup = < 0x00 0x10 0x00 0x18>; |
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| 320 | + pinctrl-single,bias-pulldown = < 0x00 0x00 0x10 0x18>; |
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| 321 | + }; |
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| 322 | + |
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| 323 | + /* P2_17 (ZCZ ball V12) gpio2_1 0x88c PIN 35 */ |
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| 324 | + P2_17_gpio: pinmux_P2_17_gpio { |
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| 325 | + pinctrl-single,pins = < |
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| 326 | + AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7) |
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| 327 | + >; |
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| 328 | + pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
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| 329 | + pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
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| 330 | + }; |
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| 331 | + |
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63 | 332 | i2c2_pins: pinmux-i2c2-pins { |
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64 | 333 | pinctrl-single,pins = < |
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65 | | - AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */ |
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66 | | - AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */ |
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| 334 | + AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */ |
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| 335 | + AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */ |
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67 | 336 | >; |
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68 | 337 | }; |
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69 | 338 | |
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70 | 339 | ehrpwm0_pins: pinmux-ehrpwm0-pins { |
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71 | 340 | pinctrl-single,pins = < |
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72 | | - AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */ |
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| 341 | + AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */ |
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73 | 342 | >; |
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74 | 343 | }; |
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75 | 344 | |
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76 | 345 | ehrpwm1_pins: pinmux-ehrpwm1-pins { |
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77 | 346 | pinctrl-single,pins = < |
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78 | | - AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */ |
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| 347 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */ |
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79 | 348 | >; |
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80 | 349 | }; |
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81 | 350 | |
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82 | 351 | mmc0_pins: pinmux-mmc0-pins { |
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83 | 352 | pinctrl-single,pins = < |
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84 | | - AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ |
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85 | | - AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */ |
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86 | | - AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */ |
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87 | | - AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */ |
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88 | | - AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */ |
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89 | | - AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */ |
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90 | | - AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */ |
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91 | | - AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */ |
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| 353 | + AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ |
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| 354 | + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 355 | + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 356 | + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 357 | + AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 358 | + AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 359 | + AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
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92 | 360 | >; |
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93 | 361 | }; |
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94 | 362 | |
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95 | 363 | spi0_pins: pinmux-spi0-pins { |
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96 | 364 | pinctrl-single,pins = < |
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97 | | - AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */ |
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98 | | - AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */ |
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99 | | - AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */ |
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100 | | - AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */ |
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| 365 | + AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 366 | + AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 367 | + AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) |
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| 368 | + AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) |
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101 | 369 | >; |
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102 | 370 | }; |
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103 | 371 | |
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104 | 372 | spi1_pins: pinmux-spi1-pins { |
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105 | 373 | pinctrl-single,pins = < |
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106 | | - AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */ |
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107 | | - AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */ |
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108 | | - AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */ |
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109 | | - AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */ |
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| 374 | + AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */ |
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| 375 | + AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */ |
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| 376 | + AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */ |
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| 377 | + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */ |
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110 | 378 | >; |
---|
111 | 379 | }; |
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112 | 380 | |
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113 | 381 | usr_leds_pins: pinmux-usr-leds-pins { |
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114 | 382 | pinctrl-single,pins = < |
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115 | | - AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */ |
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116 | | - AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */ |
---|
117 | | - AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */ |
---|
118 | | - AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */ |
---|
| 383 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */ |
---|
| 384 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */ |
---|
| 385 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */ |
---|
| 386 | + AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */ |
---|
119 | 387 | >; |
---|
120 | 388 | }; |
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121 | 389 | |
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122 | 390 | uart0_pins: pinmux-uart0-pins { |
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123 | 391 | pinctrl-single,pins = < |
---|
124 | | - AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */ |
---|
125 | | - AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */ |
---|
| 392 | + AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
---|
| 393 | + AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
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126 | 394 | >; |
---|
127 | 395 | }; |
---|
128 | 396 | |
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129 | 397 | uart4_pins: pinmux-uart4-pins { |
---|
130 | 398 | pinctrl-single,pins = < |
---|
131 | | - AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */ |
---|
132 | | - AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */ |
---|
| 399 | + AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */ |
---|
| 400 | + AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */ |
---|
133 | 401 | >; |
---|
134 | 402 | }; |
---|
135 | 403 | }; |
---|
.. | .. |
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206 | 474 | status = "okay"; |
---|
207 | 475 | }; |
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208 | 476 | |
---|
209 | | -&usb { |
---|
210 | | - status = "okay"; |
---|
211 | | -}; |
---|
212 | | - |
---|
213 | | -&usb_ctrl_mod { |
---|
214 | | - status = "okay"; |
---|
215 | | -}; |
---|
216 | | - |
---|
217 | | -&usb0_phy { |
---|
218 | | - status = "okay"; |
---|
219 | | -}; |
---|
220 | | - |
---|
221 | 477 | &usb0 { |
---|
222 | | - status = "okay"; |
---|
223 | 478 | dr_mode = "otg"; |
---|
224 | 479 | }; |
---|
225 | 480 | |
---|
226 | | -&usb1_phy { |
---|
227 | | - status = "okay"; |
---|
228 | | -}; |
---|
229 | | - |
---|
230 | 481 | &usb1 { |
---|
231 | | - status = "okay"; |
---|
232 | 482 | dr_mode = "host"; |
---|
233 | | -}; |
---|
234 | | - |
---|
235 | | -&cppi41dma { |
---|
236 | | - status = "okay"; |
---|
237 | 483 | }; |
---|