hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arc/boot/dts/nsim_700.dts
....@@ -1,9 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
74 */
85 /dts-v1/;
96
....@@ -17,11 +14,11 @@
1714 interrupt-parent = <&core_intc>;
1815
1916 chosen {
20
- bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
17
+ bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1";
2118 };
2219
2320 aliases {
24
- serial0 = &arcuart0;
21
+ serial0 = &uart0;
2522 };
2623
2724 fpga {
....@@ -44,29 +41,15 @@
4441 #interrupt-cells = <1>;
4542 };
4643
47
- arcuart0: serial@c0fc1000 {
48
- compatible = "snps,arc-uart";
49
- reg = <0xc0fc1000 0x100>;
50
- interrupts = <5>;
51
- clock-frequency = <80000000>;
52
- current-speed = <115200>;
53
- status = "okay";
54
- };
55
-
56
- ethernet@c0fc2000 {
57
- compatible = "snps,arc-emac";
58
- reg = <0xc0fc2000 0x3c>;
59
- interrupts = <6>;
60
- mac-address = [ 00 11 22 33 44 55 ];
61
- clock-frequency = <80000000>;
62
- max-speed = <100>;
63
- phy = <&phy0>;
64
-
65
- #address-cells = <1>;
66
- #size-cells = <0>;
67
- phy0: ethernet-phy@0 {
68
- reg = <1>;
69
- };
44
+ uart0: serial@f0000000 {
45
+ compatible = "ns16550a";
46
+ reg = <0xf0000000 0x2000>;
47
+ interrupts = <24>;
48
+ clock-frequency = <50000000>;
49
+ baud = <115200>;
50
+ reg-shift = <2>;
51
+ reg-io-width = <4>;
52
+ no-loopback-test = <1>;
7053 };
7154
7255 arcpct0: pct {