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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License version 2 as |
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6 | | - * published by the Free Software Foundation. |
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7 | 4 | */ |
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8 | 5 | |
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9 | 6 | /* |
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.. | .. |
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31 | 28 | clock-frequency = <750000000>; |
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32 | 29 | }; |
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33 | 30 | |
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| 31 | + input_clk: input-clk { |
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| 32 | + #clock-cells = <0>; |
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| 33 | + compatible = "fixed-clock"; |
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| 34 | + clock-frequency = <33333333>; |
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| 35 | + }; |
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| 36 | + |
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34 | 37 | core_intc: arc700-intc@cpu { |
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35 | 38 | compatible = "snps,arc700-intc"; |
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36 | 39 | interrupt-controller; |
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.. | .. |
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41 | 44 | * this GPIO block ORs all interrupts on CPU card (creg,..) |
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42 | 45 | * to uplink only 1 IRQ to ARC core intc |
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43 | 46 | */ |
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44 | | - dw-apb-gpio@0x2000 { |
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| 47 | + dw-apb-gpio@2000 { |
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45 | 48 | compatible = "snps,dw-apb-gpio"; |
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46 | 49 | reg = < 0x2000 0x80 >; |
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47 | 50 | #address-cells = <1>; |
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.. | .. |
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60 | 63 | }; |
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61 | 64 | }; |
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62 | 65 | |
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63 | | - debug_uart: dw-apb-uart@0x5000 { |
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| 66 | + debug_uart: dw-apb-uart@5000 { |
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64 | 67 | compatible = "snps,dw-apb-uart"; |
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65 | 68 | reg = <0x5000 0x100>; |
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66 | 69 | clock-frequency = <33333000>; |
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.. | .. |
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88 | 91 | * avoid duplicating the MB dtsi file given that IRQ from |
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89 | 92 | * this intc to cpu intc are different for axs101 and axs103 |
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90 | 93 | */ |
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91 | | - mb_intc: dw-apb-ictl@0xe0012000 { |
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| 94 | + mb_intc: interrupt-controller@e0012000 { |
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92 | 95 | #interrupt-cells = <1>; |
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93 | 96 | compatible = "snps,dw-apb-ictl"; |
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94 | 97 | reg = < 0x0 0xe0012000 0x0 0x200 >; |
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