hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/arc/boot/dts/abilis_tb10x.dtsi
....@@ -1,22 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Abilis Systems TB10X SOC device tree
34 *
45 * Copyright (C) Abilis Systems 2013
56 *
67 * Author: Christian Ruppert <christian.ruppert@abilis.com>
7
- *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License version 2 as
10
- * published by the Free Software Foundation.
11
- *
12
- * This program is distributed in the hope that it will be useful,
13
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
- * GNU General Public License for more details.
16
- *
17
- * You should have received a copy of the GNU General Public License
18
- * along with this program; if not, write to the Free Software
19
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
208 */
219
2210
....@@ -54,7 +42,7 @@
5442 #size-cells = <1>;
5543 device_type = "soc";
5644 ranges = <0xfe000000 0xfe000000 0x02000000
57
- 0x000F0000 0x000F0000 0x00010000>;
45
+ 0x000f0000 0x000f0000 0x00010000>;
5846 compatible = "abilis,tb10x", "simple-bus";
5947
6048 pll0: oscillator {
....@@ -75,10 +63,10 @@
7563 clock-output-names = "ahb_clk";
7664 };
7765
78
- iomux: iomux@FF10601c {
66
+ iomux: iomux@ff10601c {
7967 compatible = "abilis,tb10x-iomux";
8068 #gpio-range-cells = <3>;
81
- reg = <0xFF10601c 0x4>;
69
+ reg = <0xff10601c 0x4>;
8270 };
8371
8472 intc: interrupt-controller {
....@@ -88,7 +76,7 @@
8876 };
8977 tb10x_ictl: pic@fe002000 {
9078 compatible = "abilis,tb10x-ictl";
91
- reg = <0xFE002000 0x20>;
79
+ reg = <0xfe002000 0x20>;
9280 interrupt-controller;
9381 #interrupt-cells = <2>;
9482 interrupt-parent = <&intc>;
....@@ -96,27 +84,27 @@
9684 20 21 22 23 24 25 26 27 28 29 30 31>;
9785 };
9886
99
- uart@FF100000 {
87
+ uart@ff100000 {
10088 compatible = "snps,dw-apb-uart";
101
- reg = <0xFF100000 0x100>;
89
+ reg = <0xff100000 0x100>;
10290 clock-frequency = <166666666>;
10391 interrupts = <25 8>;
10492 reg-shift = <2>;
10593 reg-io-width = <4>;
10694 interrupt-parent = <&tb10x_ictl>;
10795 };
108
- ethernet@FE100000 {
96
+ ethernet@fe100000 {
10997 compatible = "snps,dwmac-3.70a","snps,dwmac";
110
- reg = <0xFE100000 0x1058>;
98
+ reg = <0xfe100000 0x1058>;
11199 interrupt-parent = <&tb10x_ictl>;
112100 interrupts = <6 8>;
113101 interrupt-names = "macirq";
114102 clocks = <&ahb_clk>;
115103 clock-names = "stmmaceth";
116104 };
117
- dma@FE000000 {
105
+ dma@fe000000 {
118106 compatible = "snps,dma-spear1340";
119
- reg = <0xFE000000 0x400>;
107
+ reg = <0xfe000000 0x400>;
120108 interrupt-parent = <&tb10x_ictl>;
121109 interrupts = <14 8>;
122110 dma-channels = <6>;
....@@ -132,70 +120,70 @@
132120 multi-block = <1 1 1 1 1 1>;
133121 };
134122
135
- i2c0: i2c@FF120000 {
123
+ i2c0: i2c@ff120000 {
136124 #address-cells = <1>;
137125 #size-cells = <0>;
138126 compatible = "snps,designware-i2c";
139
- reg = <0xFF120000 0x1000>;
127
+ reg = <0xff120000 0x1000>;
140128 interrupt-parent = <&tb10x_ictl>;
141129 interrupts = <12 8>;
142130 clocks = <&ahb_clk>;
143131 };
144
- i2c1: i2c@FF121000 {
132
+ i2c1: i2c@ff121000 {
145133 #address-cells = <1>;
146134 #size-cells = <0>;
147135 compatible = "snps,designware-i2c";
148
- reg = <0xFF121000 0x1000>;
136
+ reg = <0xff121000 0x1000>;
149137 interrupt-parent = <&tb10x_ictl>;
150138 interrupts = <12 8>;
151139 clocks = <&ahb_clk>;
152140 };
153
- i2c2: i2c@FF122000 {
141
+ i2c2: i2c@ff122000 {
154142 #address-cells = <1>;
155143 #size-cells = <0>;
156144 compatible = "snps,designware-i2c";
157
- reg = <0xFF122000 0x1000>;
145
+ reg = <0xff122000 0x1000>;
158146 interrupt-parent = <&tb10x_ictl>;
159147 interrupts = <12 8>;
160148 clocks = <&ahb_clk>;
161149 };
162
- i2c3: i2c@FF123000 {
150
+ i2c3: i2c@ff123000 {
163151 #address-cells = <1>;
164152 #size-cells = <0>;
165153 compatible = "snps,designware-i2c";
166
- reg = <0xFF123000 0x1000>;
154
+ reg = <0xff123000 0x1000>;
167155 interrupt-parent = <&tb10x_ictl>;
168156 interrupts = <12 8>;
169157 clocks = <&ahb_clk>;
170158 };
171
- i2c4: i2c@FF124000 {
159
+ i2c4: i2c@ff124000 {
172160 #address-cells = <1>;
173161 #size-cells = <0>;
174162 compatible = "snps,designware-i2c";
175
- reg = <0xFF124000 0x1000>;
163
+ reg = <0xff124000 0x1000>;
176164 interrupt-parent = <&tb10x_ictl>;
177165 interrupts = <12 8>;
178166 clocks = <&ahb_clk>;
179167 };
180168
181
- spi0: spi@0xFE010000 {
169
+ spi0: spi@fe010000 {
182170 #address-cells = <1>;
183171 #size-cells = <0>;
184172 cell-index = <0>;
185173 compatible = "abilis,tb100-spi";
186174 num-cs = <1>;
187
- reg = <0xFE010000 0x20>;
175
+ reg = <0xfe010000 0x20>;
188176 interrupt-parent = <&tb10x_ictl>;
189177 interrupts = <26 8>;
190178 clocks = <&ahb_clk>;
191179 };
192
- spi1: spi@0xFE011000 {
180
+ spi1: spi@fe011000 {
193181 #address-cells = <1>;
194182 #size-cells = <0>;
195183 cell-index = <1>;
196184 compatible = "abilis,tb100-spi";
197185 num-cs = <2>;
198
- reg = <0xFE011000 0x20>;
186
+ reg = <0xfe011000 0x20>;
199187 interrupt-parent = <&tb10x_ictl>;
200188 interrupts = <10 8>;
201189 clocks = <&ahb_clk>;
....@@ -226,23 +214,23 @@
226214 interrupts = <20 2>, <19 2>;
227215 interrupt-names = "cmd_irq", "event_irq";
228216 };
229
- tb10x_mdsc0: tb10x-mdscr@FF300000 {
217
+ tb10x_mdsc0: tb10x-mdscr@ff300000 {
230218 compatible = "abilis,tb100-mdscr";
231
- reg = <0xFF300000 0x7000>;
219
+ reg = <0xff300000 0x7000>;
232220 tb100-mdscr-manage-tsin;
233221 };
234
- tb10x_mscr0: tb10x-mdscr@FF307000 {
222
+ tb10x_mscr0: tb10x-mdscr@ff307000 {
235223 compatible = "abilis,tb100-mdscr";
236
- reg = <0xFF307000 0x7000>;
224
+ reg = <0xff307000 0x7000>;
237225 };
238226 tb10x_scr0: tb10x-mdscr@ff30e000 {
239227 compatible = "abilis,tb100-mdscr";
240
- reg = <0xFF30e000 0x4000>;
228
+ reg = <0xff30e000 0x4000>;
241229 tb100-mdscr-manage-tsin;
242230 };
243231 tb10x_scr1: tb10x-mdscr@ff312000 {
244232 compatible = "abilis,tb100-mdscr";
245
- reg = <0xFF312000 0x4000>;
233
+ reg = <0xff312000 0x4000>;
246234 tb100-mdscr-manage-tsin;
247235 };
248236 tb10x_wfb: tb10x-wfb@ff319000 {