hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/alpha/kernel/perf_event.c
....@@ -630,12 +630,6 @@
630630 return ev;
631631 }
632632
633
- /* The EV67 does not support mode exclusion */
634
- if (attr->exclude_kernel || attr->exclude_user
635
- || attr->exclude_hv || attr->exclude_idle) {
636
- return -EPERM;
637
- }
638
-
639633 /*
640634 * We place the event type in event_base here and leave calculation
641635 * of the codes to programme the PMU for alpha_pmu_enable() because
....@@ -771,6 +765,7 @@
771765 .start = alpha_pmu_start,
772766 .stop = alpha_pmu_stop,
773767 .read = alpha_pmu_read,
768
+ .capabilities = PERF_PMU_CAP_NO_EXCLUDE,
774769 };
775770
776771
....@@ -829,7 +824,7 @@
829824 if (unlikely(la_ptr >= alpha_pmu->num_pmcs)) {
830825 /* This should never occur! */
831826 irq_err_count++;
832
- pr_warning("PMI: silly index %ld\n", la_ptr);
827
+ pr_warn("PMI: silly index %ld\n", la_ptr);
833828 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
834829 return;
835830 }
....@@ -852,7 +847,7 @@
852847 if (unlikely(!event)) {
853848 /* This should never occur! */
854849 irq_err_count++;
855
- pr_warning("PMI: No event at index %d!\n", idx);
850
+ pr_warn("PMI: No event at index %d!\n", idx);
856851 wrperfmon(PERFMON_CMD_ENABLE, cpuc->idx_mask);
857852 return;
858853 }