.. | .. |
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17 | 17 | #include <linux/pci.h> |
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18 | 18 | #include <linux/sched.h> |
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19 | 19 | #include <linux/init.h> |
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20 | | -#include <linux/bootmem.h> |
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| 20 | +#include <linux/memblock.h> |
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21 | 21 | |
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22 | 22 | #include <asm/ptrace.h> |
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23 | 23 | #include <asm/smp.h> |
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.. | .. |
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319 | 319 | * NOTE: we need the align_entry settings for Acer devices on ES40, |
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320 | 320 | * specifically floppy and IDE when memory is larger than 2GB. |
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321 | 321 | */ |
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322 | | - hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); |
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| 322 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, |
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| 323 | + SMP_CACHE_BYTES); |
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323 | 324 | /* Initially set for 4 PTEs, but will be overridden to 64K for ISA. */ |
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324 | 325 | hose->sg_isa->align_entry = 4; |
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325 | 326 | |
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326 | 327 | hose->sg_pci = iommu_arena_new(hose, 0x40000000, |
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327 | | - size_for_memory(0x40000000), 0); |
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| 328 | + size_for_memory(0x40000000), |
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| 329 | + SMP_CACHE_BYTES); |
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328 | 330 | hose->sg_pci->align_entry = 4; /* Tsunami caches 4 PTEs at a time */ |
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329 | 331 | |
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330 | 332 | __direct_map_base = 0x80000000; |
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