hc
2023-12-11 d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d
kernel/arch/alpha/kernel/core_tsunami.c
....@@ -17,7 +17,7 @@
1717 #include <linux/pci.h>
1818 #include <linux/sched.h>
1919 #include <linux/init.h>
20
-#include <linux/bootmem.h>
20
+#include <linux/memblock.h>
2121
2222 #include <asm/ptrace.h>
2323 #include <asm/smp.h>
....@@ -319,12 +319,14 @@
319319 * NOTE: we need the align_entry settings for Acer devices on ES40,
320320 * specifically floppy and IDE when memory is larger than 2GB.
321321 */
322
- hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0);
322
+ hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
323
+ SMP_CACHE_BYTES);
323324 /* Initially set for 4 PTEs, but will be overridden to 64K for ISA. */
324325 hose->sg_isa->align_entry = 4;
325326
326327 hose->sg_pci = iommu_arena_new(hose, 0x40000000,
327
- size_for_memory(0x40000000), 0);
328
+ size_for_memory(0x40000000),
329
+ SMP_CACHE_BYTES);
328330 hose->sg_pci->align_entry = 4; /* Tsunami caches 4 PTEs at a time */
329331
330332 __direct_map_base = 0x80000000;