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hc
2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad 
 kernel/sound/pci/hda/hda_intel.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  *
34  *  hda_intel.c - Implementation of primary alsa driver code base
....@@ -8,20 +9,6 @@
89  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
910  *                     PeiSen Hou <pshou@realtek.com.tw>
1011  *
11
- *  This program is free software; you can redistribute it and/or modify it
12
- *  under the terms of the GNU General Public License as published by the Free
13
- *  Software Foundation; either version 2 of the License, or (at your option)
14
- *  any later version.
15
- *
16
- *  This program is distributed in the hope that it will be useful, but WITHOUT
17
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19
- *  more details.
20
- *
21
- *  You should have received a copy of the GNU General Public License along with
22
- *  this program; if not, write to the Free Software Foundation, Inc., 59
23
- *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
24
- *
2512  *  CONTACTS:
2613  *
2714  *  Matt Jared		matt.jared@intel.com
....@@ -31,7 +18,6 @@
3118  *  CHANGES:
3219  *
3320  *  2004.12.01	Major rewrite by tiwai, merged the work of pshou
34
- * 
3521  */
3622 
3723 #include <linux/delay.h>
....@@ -49,10 +35,11 @@
4935 #include <linux/clocksource.h>
5036 #include <linux/time.h>
5137 #include <linux/completion.h>
38
+#include <linux/acpi.h>
39
+#include <linux/pgtable.h>
5240 
5341 #ifdef CONFIG_X86
5442 /* for snoop control */
55
-#include <asm/pgtable.h>
5643 #include <asm/set_memory.h>
5744 #include <asm/cpufeature.h>
5845 #endif
....@@ -60,10 +47,11 @@
6047 #include <sound/initval.h>
6148 #include <sound/hdaudio.h>
6249 #include <sound/hda_i915.h>
50
+#include <sound/intel-dsp-config.h>
6351 #include <linux/vgaarb.h>
6452 #include <linux/vga_switcheroo.h>
6553 #include <linux/firmware.h>
66
-#include "hda_codec.h"
54
+#include <sound/hda_codec.h>
6755 #include "hda_controller.h"
6856 #include "hda_intel.h"
6957 
....@@ -98,8 +86,6 @@
9886 #define INTEL_SCH_HDA_DEVC      0x78
9987 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
10088 
101
-/* Define IN stream 0 FIFO size offset in VIA controller */
102
-#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET	0x90
10389 /* Define VIA HD Audio Device ID*/
10490 #define VIA_HDAC_DEVICE_ID		0x3288
10591 
....@@ -139,6 +125,7 @@
139125 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
140126 					CONFIG_SND_HDA_INPUT_BEEP_MODE};
141127 #endif
128
+static bool dmic_detect = 1;
142129 
143130 module_param_array(index, int, NULL, 0444);
144131 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
....@@ -173,6 +160,10 @@
173160 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
174161 			    "(0=off, 1=on) (default=1).");
175162 #endif
163
+module_param(dmic_detect, bool, 0444);
164
+MODULE_PARM_DESC(dmic_detect, "Allow DSP driver selection (bypass this driver) "
165
+			     "(0=off, 1=on) (default=1); "
166
+		 "deprecated, use snd-intel-dspcfg.dsp_driver option instead");
176167 
177168 #ifdef CONFIG_PM
178169 static int param_set_xint(const char *val, const struct kernel_param *kp);
....@@ -189,7 +180,7 @@
189180 
190181 static bool pm_blacklist = true;
191182 module_param(pm_blacklist, bool, 0644);
192
-MODULE_PARM_DESC(pm_blacklist, "Enable power-management blacklist");
183
+MODULE_PARM_DESC(pm_blacklist, "Enable power-management denylist");
193184 
194185 /* reset the HD-audio controller in power save mode.
195186  * this may give more power-saving, but will take longer time to
....@@ -273,6 +264,7 @@
273264 	AZX_DRIVER_ATI,
274265 	AZX_DRIVER_ATIHDMI,
275266 	AZX_DRIVER_ATIHDMI_NS,
267
+	AZX_DRIVER_GFHDMI,
276268 	AZX_DRIVER_VIA,
277269 	AZX_DRIVER_SIS,
278270 	AZX_DRIVER_ULI,
....@@ -281,6 +273,7 @@
281273 	AZX_DRIVER_CTX,
282274 	AZX_DRIVER_CTHDA,
283275 	AZX_DRIVER_CMEDIA,
276
+	AZX_DRIVER_ZHAOXIN,
284277 	AZX_DRIVER_GENERIC,
285278 	AZX_NUM_DRIVERS, /* keep this as last entry */
286279 };
....@@ -311,38 +304,35 @@
311304 #define AZX_DCAPS_INTEL_HASWELL \
312305 	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
313306 	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
314
-	 AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
307
+	 AZX_DCAPS_SNOOP_TYPE(SCH))
315308 
316309 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
317310 #define AZX_DCAPS_INTEL_BROADWELL \
318311 	(/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
319312 	 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_COMPONENT |\
320
-	 AZX_DCAPS_I915_POWERWELL | AZX_DCAPS_SNOOP_TYPE(SCH))
313
+	 AZX_DCAPS_SNOOP_TYPE(SCH))
321314 
322315 #define AZX_DCAPS_INTEL_BAYTRAIL \
323
-	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT |\
324
-	 AZX_DCAPS_I915_POWERWELL)
316
+	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_I915_COMPONENT)
325317 
326318 #define AZX_DCAPS_INTEL_BRASWELL \
327319 	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
328
-	 AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL)
320
+	 AZX_DCAPS_I915_COMPONENT)
329321 
330322 #define AZX_DCAPS_INTEL_SKYLAKE \
331323 	(AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
332
-	 AZX_DCAPS_SYNC_WRITE |\
333
-	 AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT |\
334
-	 AZX_DCAPS_I915_POWERWELL)
324
+	 AZX_DCAPS_SEPARATE_STREAM_TAG | AZX_DCAPS_I915_COMPONENT)
335325 
336
-#define AZX_DCAPS_INTEL_BROXTON			AZX_DCAPS_INTEL_SKYLAKE
326
+#define AZX_DCAPS_INTEL_BROXTON		AZX_DCAPS_INTEL_SKYLAKE
337327 
338328 /* quirks for ATI SB / AMD Hudson */
339329 #define AZX_DCAPS_PRESET_ATI_SB \
340
-	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
330
+	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_POSFIX_LPIB |\
341331 	 AZX_DCAPS_SNOOP_TYPE(ATI))
342332 
343333 /* quirks for ATI/AMD HDMI */
344334 #define AZX_DCAPS_PRESET_ATI_HDMI \
345
-	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
335
+	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_POSFIX_LPIB|\
346336 	 AZX_DCAPS_NO_MSI64)
347337 
348338 /* quirks for ATI HDMI with snoop off */
....@@ -351,8 +341,9 @@
351341 
352342 /* quirks for AMD SB */
353343 #define AZX_DCAPS_PRESET_AMD_SB \
354
-	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_AMD_WORKAROUND |\
355
-	 AZX_DCAPS_SNOOP_TYPE(ATI) | AZX_DCAPS_PM_RUNTIME)
344
+	(AZX_DCAPS_NO_TCSEL | AZX_DCAPS_AMD_WORKAROUND |\
345
+	 AZX_DCAPS_SNOOP_TYPE(ATI) | AZX_DCAPS_PM_RUNTIME |\
346
+	 AZX_DCAPS_RETRY_PROBE)
356347 
357348 /* quirks for Nvidia */
358349 #define AZX_DCAPS_PRESET_NVIDIA \
....@@ -369,22 +360,25 @@
369360  */
370361 #ifdef SUPPORT_VGA_SWITCHEROO
371362 #define use_vga_switcheroo(chip)	((chip)->use_vga_switcheroo)
372
-#define needs_eld_notify_link(chip)	((chip)->need_eld_notify_link)
363
+#define needs_eld_notify_link(chip)	((chip)->bus.keep_power)
373364 #else
374365 #define use_vga_switcheroo(chip)	0
375366 #define needs_eld_notify_link(chip)	false
376367 #endif
377368 
378
-#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
369
+#define CONTROLLER_IN_GPU(pci) (((pci)->vendor == 0x8086) &&         \
370
+				       (((pci)->device == 0x0a0c) || \
379371 					((pci)->device == 0x0c0c) || \
380372 					((pci)->device == 0x0d0c) || \
381
-					((pci)->device == 0x160c))
373
+					((pci)->device == 0x160c) || \
374
+					((pci)->device == 0x490d) || \
375
+					((pci)->device == 0x4f90) || \
376
+					((pci)->device == 0x4f91) || \
377
+					((pci)->device == 0x4f92)))
382378 
383379 #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
384
-#define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
385
-#define IS_CNL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9dc8)
386380 
387
-static char *driver_short_names[] = {
381
+static const char * const driver_short_names[] = {
388382 	[AZX_DRIVER_ICH] = "HDA Intel",
389383 	[AZX_DRIVER_PCH] = "HDA Intel PCH",
390384 	[AZX_DRIVER_SCH] = "HDA Intel MID",
....@@ -393,6 +387,7 @@
393387 	[AZX_DRIVER_ATI] = "HDA ATI SB",
394388 	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
395389 	[AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
390
+	[AZX_DRIVER_GFHDMI] = "HDA GF HDMI",
396391 	[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
397392 	[AZX_DRIVER_SIS] = "HDA SIS966",
398393 	[AZX_DRIVER_ULI] = "HDA ULI M5461",
....@@ -401,63 +396,9 @@
401396 	[AZX_DRIVER_CTX] = "HDA Creative", 
402397 	[AZX_DRIVER_CTHDA] = "HDA Creative",
403398 	[AZX_DRIVER_CMEDIA] = "HDA C-Media",
399
+	[AZX_DRIVER_ZHAOXIN] = "HDA Zhaoxin",
404400 	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
405401 };
406
-
407
-#ifdef CONFIG_X86
408
-static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
409
-{
410
-	int pages;
411
-
412
-	if (azx_snoop(chip))
413
-		return;
414
-	if (!dmab || !dmab->area || !dmab->bytes)
415
-		return;
416
-
417
-#ifdef CONFIG_SND_DMA_SGBUF
418
-	if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
419
-		struct snd_sg_buf *sgbuf = dmab->private_data;
420
-		if (!chip->uc_buffer)
421
-			return; /* deal with only CORB/RIRB buffers */
422
-		if (on)
423
-			set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
424
-		else
425
-			set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
426
-		return;
427
-	}
428
-#endif
429
-
430
-	pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
431
-	if (on)
432
-		set_memory_wc((unsigned long)dmab->area, pages);
433
-	else
434
-		set_memory_wb((unsigned long)dmab->area, pages);
435
-}
436
-
437
-static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
438
-				 bool on)
439
-{
440
-	__mark_pages_wc(chip, buf, on);
441
-}
442
-static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
443
-				   struct snd_pcm_substream *substream, bool on)
444
-{
445
-	if (azx_dev->wc_marked != on) {
446
-		__mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
447
-		azx_dev->wc_marked = on;
448
-	}
449
-}
450
-#else
451
-/* NOP for other archs */
452
-static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
453
-				 bool on)
454
-{
455
-}
456
-static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
457
-				   struct snd_pcm_substream *substream, bool on)
458
-{
459
-}
460
-#endif
461402 
462403 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
463404 static void set_default_power_save(struct azx *chip);
....@@ -565,7 +506,7 @@
565506 static int intel_get_lctl_scf(struct azx *chip)
566507 {
567508 	struct hdac_bus *bus = azx_bus(chip);
568
-	static int preferred_bits[] = { 2, 3, 1, 4, 5 };
509
+	static const int preferred_bits[] = { 2, 3, 1, 4, 5 };
569510 	u32 val, t;
570511 	int i;
571512 
....@@ -651,8 +592,7 @@
651592 	struct pci_dev *pci = chip->pci;
652593 	u32 val;
653594 
654
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
655
-		snd_hdac_set_codec_wakeup(bus, true);
595
+	snd_hdac_set_codec_wakeup(bus, true);
656596 	if (chip->driver_type == AZX_DRIVER_SKL) {
657597 		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
658598 		val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
....@@ -664,8 +604,8 @@
664604 		val = val | INTEL_HDA_CGCTL_MISCBDCGE;
665605 		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
666606 	}
667
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
668
-		snd_hdac_set_codec_wakeup(bus, false);
607
+
608
+	snd_hdac_set_codec_wakeup(bus, false);
669609 
670610 	/* reduce dma latency to avoid noise */
671611 	if (IS_BXT(pci))
....@@ -727,13 +667,8 @@
727667 	return 0;
728668 }
729669 
730
-/* Enable/disable i915 display power for the link */
731
-static int azx_intel_link_power(struct azx *chip, bool enable)
732
-{
733
-	struct hdac_bus *bus = azx_bus(chip);
734
-
735
-	return snd_hdac_display_power(bus, enable);
736
-}
670
+#define display_power(chip, enable) \
671
+	snd_hdac_display_power(azx_bus(chip), HDA_CODEC_IDX_CONTROLLER, enable)
737672 
738673 /*
739674  * Check whether the current DMA position is acceptable for updating
....@@ -885,6 +820,7 @@
885820 		return -1;
886821 	}
887822 	bus->irq = chip->pci->irq;
823
+	chip->card->sync_irq = bus->irq;
888824 	pci_intx(chip->pci, !chip->msi);
889825 	return 0;
890826 }
....@@ -910,11 +846,7 @@
910846 	mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
911847 	mod_dma_pos %= azx_dev->core.period_bytes;
912848 
913
-	/* azx_dev->fifo_size can't get FIFO size of in stream.
914
-	 * Get from base address + offset.
915
-	 */
916
-	fifo_size = readw(azx_bus(chip)->remap_addr +
917
-			  VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
849
+	fifo_size = azx_stream(azx_dev)->fifo_size - 1;
918850 
919851 	if (azx_dev->insufficient) {
920852 		/* Link position never gather than FIFO size */
....@@ -989,30 +921,23 @@
989921 	return substream->runtime->delay;
990922 }
991923 
992
-static unsigned int azx_skl_get_dpib_pos(struct azx *chip,
993
-					 struct azx_dev *azx_dev)
924
+static void __azx_shutdown_chip(struct azx *chip, bool skip_link_reset)
994925 {
995
-	return _snd_hdac_chip_readl(azx_bus(chip),
996
-				    AZX_REG_VS_SDXDPIB_XBASE +
997
-				    (AZX_REG_VS_SDXDPIB_XINTERVAL *
998
-				     azx_dev->core.index));
999
-}
1000
-
1001
-/* get the current DMA position with correction on SKL+ chips */
1002
-static unsigned int azx_get_pos_skl(struct azx *chip, struct azx_dev *azx_dev)
1003
-{
1004
-	/* DPIB register gives a more accurate position for playback */
1005
-	if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1006
-		return azx_skl_get_dpib_pos(chip, azx_dev);
1007
-
1008
-	/* read of DPIB fetches the actual posbuf */
1009
-	azx_skl_get_dpib_pos(chip, azx_dev);
1010
-	return azx_get_pos_posbuf(chip, azx_dev);
926
+	azx_stop_chip(chip);
927
+	if (!skip_link_reset)
928
+		azx_enter_link_reset(chip);
929
+	azx_clear_irq_pending(chip);
930
+	display_power(chip, false);
1011931 }
1012932 
1013933 #ifdef CONFIG_PM
1014934 static DEFINE_MUTEX(card_list_lock);
1015935 static LIST_HEAD(card_list);
936
+
937
+static void azx_shutdown_chip(struct azx *chip)
938
+{
939
+	__azx_shutdown_chip(chip, false);
940
+}
1016941 
1017942 static void azx_add_card_list(struct azx *chip)
1018943 {
....@@ -1051,45 +976,111 @@
1051976 	mutex_unlock(&card_list_lock);
1052977 	return 0;
1053978 }
1054
-#else
1055
-#define azx_add_card_list(chip) /* NOP */
1056
-#define azx_del_card_list(chip) /* NOP */
1057
-#endif /* CONFIG_PM */
1058979 
1059
-#ifdef CONFIG_PM_SLEEP
1060980 /*
1061981  * power management
1062982  */
983
+static bool azx_is_pm_ready(struct snd_card *card)
984
+{
985
+	struct azx *chip;
986
+	struct hda_intel *hda;
987
+
988
+	if (!card)
989
+		return false;
990
+	chip = card->private_data;
991
+	hda = container_of(chip, struct hda_intel, chip);
992
+	if (chip->disabled || hda->init_failed || !chip->running)
993
+		return false;
994
+	return true;
995
+}
996
+
997
+static void __azx_runtime_resume(struct azx *chip)
998
+{
999
+	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1000
+	struct hdac_bus *bus = azx_bus(chip);
1001
+	struct hda_codec *codec;
1002
+	int status;
1003
+
1004
+	display_power(chip, true);
1005
+	if (hda->need_i915_power)
1006
+		snd_hdac_i915_set_bclk(bus);
1007
+
1008
+	/* Read STATESTS before controller reset */
1009
+	status = azx_readw(chip, STATESTS);
1010
+
1011
+	azx_init_pci(chip);
1012
+	hda_intel_init_chip(chip, true);
1013
+
1014
+	/* Avoid codec resume if runtime resume is for system suspend */
1015
+	if (!chip->pm_prepared) {
1016
+		list_for_each_codec(codec, &chip->bus) {
1017
+			if (codec->relaxed_resume)
1018
+				continue;
1019
+
1020
+			if (codec->forced_resume || (status & (1 << codec->addr)))
1021
+				pm_request_resume(hda_codec_dev(codec));
1022
+		}
1023
+	}
1024
+
1025
+	/* power down again for link-controlled chips */
1026
+	if (!hda->need_i915_power)
1027
+		display_power(chip, false);
1028
+}
1029
+
1030
+#ifdef CONFIG_PM_SLEEP
1031
+static int azx_prepare(struct device *dev)
1032
+{
1033
+	struct snd_card *card = dev_get_drvdata(dev);
1034
+	struct azx *chip;
1035
+
1036
+	if (!azx_is_pm_ready(card))
1037
+		return 0;
1038
+
1039
+	chip = card->private_data;
1040
+	chip->pm_prepared = 1;
1041
+	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1042
+
1043
+	flush_work(&azx_bus(chip)->unsol_work);
1044
+
1045
+	/* HDA controller always requires different WAKEEN for runtime suspend
1046
+	 * and system suspend, so don't use direct-complete here.
1047
+	 */
1048
+	return 0;
1049
+}
1050
+
1051
+static void azx_complete(struct device *dev)
1052
+{
1053
+	struct snd_card *card = dev_get_drvdata(dev);
1054
+	struct azx *chip;
1055
+
1056
+	if (!azx_is_pm_ready(card))
1057
+		return;
1058
+
1059
+	chip = card->private_data;
1060
+	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1061
+	chip->pm_prepared = 0;
1062
+}
1063
+
10631064 static int azx_suspend(struct device *dev)
10641065 {
10651066 	struct snd_card *card = dev_get_drvdata(dev);
10661067 	struct azx *chip;
1067
-	struct hda_intel *hda;
10681068 	struct hdac_bus *bus;
10691069 
1070
-	if (!card)
1070
+	if (!azx_is_pm_ready(card))
10711071 		return 0;
10721072 
10731073 	chip = card->private_data;
1074
-	hda = container_of(chip, struct hda_intel, chip);
1075
-	if (chip->disabled || hda->init_failed || !chip->running)
1076
-		return 0;
1077
-
10781074 	bus = azx_bus(chip);
1079
-	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1080
-	azx_clear_irq_pending(chip);
1081
-	azx_stop_chip(chip);
1082
-	azx_enter_link_reset(chip);
1075
+	azx_shutdown_chip(chip);
10831076 	if (bus->irq >= 0) {
10841077 		free_irq(bus->irq, chip);
10851078 		bus->irq = -1;
1079
+		chip->card->sync_irq = -1;
10861080 	}
10871081 
10881082 	if (chip->msi)
10891083 		pci_disable_msi(chip->pci);
1090
-	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1091
-		&& hda->need_i915_power)
1092
-		snd_hdac_display_power(bus, false);
10931084 
10941085 	trace_azx_suspend(chip);
10951086 	return 0;
....@@ -1097,42 +1088,20 @@
10971088 
10981089 static int azx_resume(struct device *dev)
10991090 {
1100
-	struct pci_dev *pci = to_pci_dev(dev);
11011091 	struct snd_card *card = dev_get_drvdata(dev);
11021092 	struct azx *chip;
1103
-	struct hda_intel *hda;
1104
-	struct hdac_bus *bus;
11051093 
1106
-	if (!card)
1094
+	if (!azx_is_pm_ready(card))
11071095 		return 0;
11081096 
11091097 	chip = card->private_data;
1110
-	hda = container_of(chip, struct hda_intel, chip);
1111
-	bus = azx_bus(chip);
1112
-	if (chip->disabled || hda->init_failed || !chip->running)
1113
-		return 0;
1114
-
1115
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1116
-		snd_hdac_display_power(bus, true);
1117
-		if (hda->need_i915_power)
1118
-			snd_hdac_i915_set_bclk(bus);
1119
-	}
1120
-
11211098 	if (chip->msi)
1122
-		if (pci_enable_msi(pci) < 0)
1099
+		if (pci_enable_msi(chip->pci) < 0)
11231100 			chip->msi = 0;
11241101 	if (azx_acquire_irq(chip, 1) < 0)
11251102 		return -EIO;
1126
-	azx_init_pci(chip);
11271103 
1128
-	hda_intel_init_chip(chip, true);
1129
-
1130
-	/* power down again for link-controlled chips */
1131
-	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
1132
-	    !hda->need_i915_power)
1133
-		snd_hdac_display_power(bus, false);
1134
-
1135
-	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1104
+	__azx_runtime_resume(chip);
11361105 
11371106 	trace_azx_resume(chip);
11381107 	return 0;
....@@ -1147,6 +1116,8 @@
11471116 	struct azx *chip = card->private_data;
11481117 	struct pci_dev *pci = to_pci_dev(dev);
11491118 
1119
+	if (!azx_is_pm_ready(card))
1120
+		return 0;
11501121 	if (chip->driver_type == AZX_DRIVER_SKL)
11511122 		pci_set_power_state(pci, PCI_D3hot);
11521123 
....@@ -1159,6 +1130,8 @@
11591130 	struct azx *chip = card->private_data;
11601131 	struct pci_dev *pci = to_pci_dev(dev);
11611132 
1133
+	if (!azx_is_pm_ready(card))
1134
+		return 0;
11621135 	if (chip->driver_type == AZX_DRIVER_SKL)
11631136 		pci_set_power_state(pci, PCI_D0);
11641137 
....@@ -1166,35 +1139,19 @@
11661139 }
11671140 #endif /* CONFIG_PM_SLEEP */
11681141 
1169
-#ifdef CONFIG_PM
11701142 static int azx_runtime_suspend(struct device *dev)
11711143 {
11721144 	struct snd_card *card = dev_get_drvdata(dev);
11731145 	struct azx *chip;
1174
-	struct hda_intel *hda;
11751146 
1176
-	if (!card)
1147
+	if (!azx_is_pm_ready(card))
11771148 		return 0;
1178
-
11791149 	chip = card->private_data;
1180
-	hda = container_of(chip, struct hda_intel, chip);
1181
-	if (chip->disabled || hda->init_failed)
1182
-		return 0;
1183
-
1184
-	if (!azx_has_pm_runtime(chip))
1185
-		return 0;
11861150 
11871151 	/* enable controller wake up event */
1188
-	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
1189
-		  STATESTS_INT_MASK);
1152
+	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) | STATESTS_INT_MASK);
11901153 
1191
-	azx_stop_chip(chip);
1192
-	azx_enter_link_reset(chip);
1193
-	azx_clear_irq_pending(chip);
1194
-	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1195
-		&& hda->need_i915_power)
1196
-		snd_hdac_display_power(azx_bus(chip), false);
1197
-
1154
+	azx_shutdown_chip(chip);
11981155 	trace_azx_runtime_suspend(chip);
11991156 	return 0;
12001157 }
....@@ -1203,50 +1160,14 @@
12031160 {
12041161 	struct snd_card *card = dev_get_drvdata(dev);
12051162 	struct azx *chip;
1206
-	struct hda_intel *hda;
1207
-	struct hdac_bus *bus;
1208
-	struct hda_codec *codec;
1209
-	int status;
12101163 
1211
-	if (!card)
1164
+	if (!azx_is_pm_ready(card))
12121165 		return 0;
1213
-
12141166 	chip = card->private_data;
1215
-	hda = container_of(chip, struct hda_intel, chip);
1216
-	bus = azx_bus(chip);
1217
-	if (chip->disabled || hda->init_failed)
1218
-		return 0;
1219
-
1220
-	if (!azx_has_pm_runtime(chip))
1221
-		return 0;
1222
-
1223
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1224
-		snd_hdac_display_power(bus, true);
1225
-		if (hda->need_i915_power)
1226
-			snd_hdac_i915_set_bclk(bus);
1227
-	}
1228
-
1229
-	/* Read STATESTS before controller reset */
1230
-	status = azx_readw(chip, STATESTS);
1231
-
1232
-	azx_init_pci(chip);
1233
-	hda_intel_init_chip(chip, true);
1234
-
1235
-	if (status) {
1236
-		list_for_each_codec(codec, &chip->bus)
1237
-			if (status & (1 << codec->addr))
1238
-				schedule_delayed_work(&codec->jackpoll_work,
1239
-						      codec->jackpoll_interval);
1240
-	}
1167
+	__azx_runtime_resume(chip);
12411168 
12421169 	/* disable controller Wake Up event*/
1243
-	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
1244
-			~STATESTS_INT_MASK);
1245
-
1246
-	/* power down again for link-controlled chips */
1247
-	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
1248
-	    !hda->need_i915_power)
1249
-		snd_hdac_display_power(bus, false);
1170
+	azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) & ~STATESTS_INT_MASK);
12501171 
12511172 	trace_azx_runtime_resume(chip);
12521173 	return 0;
....@@ -1271,7 +1192,7 @@
12711192 		return -EBUSY;
12721193 
12731194 	/* ELD notification gets broken when HD-audio bus is off */
1274
-	if (needs_eld_notify_link(hda))
1195
+	if (needs_eld_notify_link(chip))
12751196 		return -EBUSY;
12761197 
12771198 	return 0;
....@@ -1280,6 +1201,8 @@
12801201 static const struct dev_pm_ops azx_pm = {
12811202 	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
12821203 #ifdef CONFIG_PM_SLEEP
1204
+	.prepare = azx_prepare,
1205
+	.complete = azx_complete,
12831206 	.freeze_noirq = azx_freeze_noirq,
12841207 	.thaw_noirq = azx_thaw_noirq,
12851208 #endif
....@@ -1288,6 +1211,8 @@
12881211 
12891212 #define AZX_PM_OPS	&azx_pm
12901213 #else
1214
+#define azx_add_card_list(chip) /* NOP */
1215
+#define azx_del_card_list(chip) /* NOP */
12911216 #define AZX_PM_OPS	NULL
12921217 #endif /* CONFIG_PM */
12931218 
....@@ -1319,10 +1244,8 @@
13191244 		if (!disabled) {
13201245 			dev_info(chip->card->dev,
13211246 				 "Start delayed initialization\n");
1322
-			if (azx_probe_continue(chip) < 0) {
1247
+			if (azx_probe_continue(chip) < 0)
13231248 				dev_err(chip->card->dev, "initialization error\n");
1324
-				hda->init_failed = true;
1325
-			}
13261249 		}
13271250 	} else {
13281251 		dev_info(chip->card->dev, "%s via vga_switcheroo\n",
....@@ -1380,7 +1303,7 @@
13801303 	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
13811304 	struct hda_codec *codec;
13821305 
1383
-	if (hda->use_vga_switcheroo && !hda->need_eld_notify_link) {
1306
+	if (hda->use_vga_switcheroo && !needs_eld_notify_link(chip)) {
13841307 		list_for_each_codec(codec, &chip->bus)
13851308 			codec->auto_runtime_pm = 1;
13861309 		/* reset the power save setup */
....@@ -1394,10 +1317,9 @@
13941317 {
13951318 	struct snd_card *card = pci_get_drvdata(pci);
13961319 	struct azx *chip = card->private_data;
1397
-	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
13981320 
13991321 	if (client_id == VGA_SWITCHEROO_DIS)
1400
-		hda->need_eld_notify_link = 0;
1322
+		chip->bus.keep_power = 0;
14011323 	setup_vga_switcheroo_runtime_pm(chip);
14021324 }
14031325 
....@@ -1405,11 +1327,17 @@
14051327 {
14061328 	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
14071329 	struct pci_dev *p = get_bound_vga(chip->pci);
1330
+	struct pci_dev *parent;
14081331 	if (p) {
14091332 		dev_info(chip->card->dev,
14101333 			 "Handle vga_switcheroo audio client\n");
14111334 		hda->use_vga_switcheroo = 1;
1412
-		hda->need_eld_notify_link = 1; /* cleared in gpu_bound op */
1335
+
1336
+		/* cleared in either gpu_bound op or codec probe, or when its
1337
+		 * upstream port has _PR3 (i.e. dGPU).
1338
+		 */
1339
+		parent = pci_upstream_bridge(p);
1340
+		chip->bus.keep_power = parent ? !pci_pr3_present(parent) : 1;
14131341 		chip->driver_caps |= AZX_DCAPS_PM_RUNTIME;
14141342 		pci_dev_put(p);
14151343 	}
....@@ -1450,11 +1378,14 @@
14501378 /*
14511379  * destructor
14521380  */
1453
-static int azx_free(struct azx *chip)
1381
+static void azx_free(struct azx *chip)
14541382 {
14551383 	struct pci_dev *pci = chip->pci;
14561384 	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
14571385 	struct hdac_bus *bus = azx_bus(chip);
1386
+
1387
+	if (hda->freed)
1388
+		return;
14581389 
14591390 	if (azx_has_pm_runtime(chip) && chip->running)
14601391 		pm_runtime_get_noresume(&pci->dev);
....@@ -1495,16 +1426,12 @@
14951426 #ifdef CONFIG_SND_HDA_PATCH_LOADER
14961427 	release_firmware(chip->fw);
14971428 #endif
1429
+	display_power(chip, false);
14981430 
1499
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1500
-		if (hda->need_i915_power)
1501
-			snd_hdac_display_power(bus, false);
1502
-	}
15031431 	if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT)
15041432 		snd_hdac_i915_exit(bus);
1505
-	kfree(hda);
15061433 
1507
-	return 0;
1434
+	hda->freed = 1;
15081435 }
15091436 
15101437 static int azx_dev_disconnect(struct snd_device *device)
....@@ -1520,10 +1447,48 @@
15201447 
15211448 static int azx_dev_free(struct snd_device *device)
15221449 {
1523
-	return azx_free(device->device_data);
1450
+	azx_free(device->device_data);
1451
+	return 0;
15241452 }
15251453 
15261454 #ifdef SUPPORT_VGA_SWITCHEROO
1455
+#ifdef CONFIG_ACPI
1456
+/* ATPX is in the integrated GPU's namespace */
1457
+static bool atpx_present(void)
1458
+{
1459
+	struct pci_dev *pdev = NULL;
1460
+	acpi_handle dhandle, atpx_handle;
1461
+	acpi_status status;
1462
+
1463
+	while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
1464
+		dhandle = ACPI_HANDLE(&pdev->dev);
1465
+		if (dhandle) {
1466
+			status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
1467
+			if (!ACPI_FAILURE(status)) {
1468
+				pci_dev_put(pdev);
1469
+				return true;
1470
+			}
1471
+		}
1472
+	}
1473
+	while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
1474
+		dhandle = ACPI_HANDLE(&pdev->dev);
1475
+		if (dhandle) {
1476
+			status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
1477
+			if (!ACPI_FAILURE(status)) {
1478
+				pci_dev_put(pdev);
1479
+				return true;
1480
+			}
1481
+		}
1482
+	}
1483
+	return false;
1484
+}
1485
+#else
1486
+static bool atpx_present(void)
1487
+{
1488
+	return false;
1489
+}
1490
+#endif
1491
+
15271492 /*
15281493  * Check of disabled HDMI controller by vga_switcheroo
15291494  */
....@@ -1535,6 +1500,22 @@
15351500 	switch (pci->vendor) {
15361501 	case PCI_VENDOR_ID_ATI:
15371502 	case PCI_VENDOR_ID_AMD:
1503
+		if (pci->devfn == 1) {
1504
+			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1505
+							pci->bus->number, 0);
1506
+			if (p) {
1507
+				/* ATPX is in the integrated GPU's ACPI namespace
1508
+				 * rather than the dGPU's namespace. However,
1509
+				 * the dGPU is the one who is involved in
1510
+				 * vgaswitcheroo.
1511
+				 */
1512
+				if (((p->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
1513
+				    atpx_present())
1514
+					return p;
1515
+				pci_dev_put(p);
1516
+			}
1517
+		}
1518
+		break;
15381519 	case PCI_VENDOR_ID_NVIDIA:
15391520 		if (pci->devfn == 1) {
15401521 			p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
....@@ -1565,9 +1546,9 @@
15651546 #endif /* SUPPORT_VGA_SWITCHEROO */
15661547 
15671548 /*
1568
- * white/black-listing for position_fix
1549
+ * allow/deny-listing for position_fix
15691550  */
1570
-static struct snd_pci_quirk position_fix_list[] = {
1551
+static const struct snd_pci_quirk position_fix_list[] = {
15711552 	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
15721553 	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
15731554 	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
....@@ -1630,13 +1611,13 @@
16301611 
16311612 static void assign_position_fix(struct azx *chip, int fix)
16321613 {
1633
-	static azx_get_pos_callback_t callbacks[] = {
1614
+	static const azx_get_pos_callback_t callbacks[] = {
16341615 		[POS_FIX_AUTO] = NULL,
16351616 		[POS_FIX_LPIB] = azx_get_pos_lpib,
16361617 		[POS_FIX_POSBUF] = azx_get_pos_posbuf,
16371618 		[POS_FIX_VIACOMBO] = azx_via_get_position,
16381619 		[POS_FIX_COMBO] = azx_get_pos_lpib,
1639
-		[POS_FIX_SKL] = azx_get_pos_skl,
1620
+		[POS_FIX_SKL] = azx_get_pos_posbuf,
16401621 		[POS_FIX_FIFO] = azx_get_pos_fifo,
16411622 	};
16421623 
....@@ -1658,9 +1639,9 @@
16581639 }
16591640 
16601641 /*
1661
- * black-lists for probe_mask
1642
+ * deny-lists for probe_mask
16621643  */
1663
-static struct snd_pci_quirk probe_mask_list[] = {
1644
+static const struct snd_pci_quirk probe_mask_list[] = {
16641645 	/* Thinkpad often breaks the controller communication when accessing
16651646 	 * to the non-working (or non-existing) modem codec slot.
16661647 	 */
....@@ -1707,9 +1688,9 @@
17071688 }
17081689 
17091690 /*
1710
- * white/black-list for enable_msi
1691
+ * allow/deny-list for enable_msi
17111692  */
1712
-static struct snd_pci_quirk msi_black_list[] = {
1693
+static const struct snd_pci_quirk msi_deny_list[] = {
17131694 	SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
17141695 	SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
17151696 	SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
....@@ -1732,7 +1713,7 @@
17321713 		return;
17331714 	}
17341715 	chip->msi = 1;	/* enable MSI as default */
1735
-	q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1716
+	q = snd_pci_quirk_lookup(chip->pci, msi_deny_list);
17361717 	if (q) {
17371718 		dev_info(chip->card->dev,
17381719 			 "msi for device %04x:%04x set to %d\n",
....@@ -1788,7 +1769,7 @@
17881769 
17891770 static void azx_probe_work(struct work_struct *work)
17901771 {
1791
-	struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1772
+	struct hda_intel *hda = container_of(work, struct hda_intel, probe_work.work);
17921773 	azx_probe_continue(&hda->chip);
17931774 }
17941775 
....@@ -1804,6 +1785,12 @@
18041785 	}
18051786 
18061787 	switch (chip->driver_type) {
1788
+	/*
1789
+	 * increase the bdl size for Glenfly Gpus for hardware
1790
+	 * limitation on hdac interrupt interval
1791
+	 */
1792
+	case AZX_DRIVER_GFHDMI:
1793
+		return 128;
18071794 	case AZX_DRIVER_ICH:
18081795 	case AZX_DRIVER_PCH:
18091796 		return 1;
....@@ -1815,14 +1802,13 @@
18151802 /*
18161803  * constructor
18171804  */
1818
-static const struct hdac_io_ops pci_hda_io_ops;
18191805 static const struct hda_controller_ops pci_hda_ops;
18201806 
18211807 static int azx_create(struct snd_card *card, struct pci_dev *pci,
18221808 		      int dev, unsigned int driver_caps,
18231809 		      struct azx **rchip)
18241810 {
1825
-	static struct snd_device_ops ops = {
1811
+	static const struct snd_device_ops ops = {
18261812 		.dev_disconnect = azx_dev_disconnect,
18271813 		.dev_free = azx_dev_free,
18281814 	};
....@@ -1836,7 +1822,7 @@
18361822 	if (err < 0)
18371823 		return err;
18381824 
1839
-	hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1825
+	hda = devm_kzalloc(&pci->dev, sizeof(*hda), GFP_KERNEL);
18401826 	if (!hda) {
18411827 		pci_disable_device(pci);
18421828 		return -ENOMEM;
....@@ -1851,7 +1837,8 @@
18511837 	chip->driver_type = driver_caps & 0xff;
18521838 	check_msi(chip);
18531839 	chip->dev_index = dev;
1854
-	chip->jackpoll_ms = jackpoll_ms;
1840
+	if (jackpoll_ms[dev] >= 50 && jackpoll_ms[dev] <= 60000)
1841
+		chip->jackpoll_interval = msecs_to_jiffies(jackpoll_ms[dev]);
18551842 	INIT_LIST_HEAD(&chip->pcm_list);
18561843 	INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
18571844 	INIT_LIST_HEAD(&hda->list);
....@@ -1872,20 +1859,19 @@
18721859 	else
18731860 		chip->bdl_pos_adj = bdl_pos_adj[dev];
18741861 
1875
-	/* Workaround for a communication error on CFL (bko#199007) and CNL */
1876
-	if (IS_CFL(pci) || IS_CNL(pci))
1877
-		chip->polling_mode = 1;
1878
-
1879
-	err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
1862
+	err = azx_bus_init(chip, model[dev]);
18801863 	if (err < 0) {
1881
-		kfree(hda);
18821864 		pci_disable_device(pci);
18831865 		return err;
18841866 	}
18851867 
1868
+	/* use the non-cached pages in non-snoop mode */
1869
+	if (!azx_snoop(chip))
1870
+		azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_UC;
1871
+
18861872 	if (chip->driver_type == AZX_DRIVER_NVIDIA) {
18871873 		dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
1888
-		chip->bus.needs_damn_long_delay = 1;
1874
+		chip->bus.core.needs_damn_long_delay = 1;
18891875 	}
18901876 
18911877 	check_probe_mask(chip, dev);
....@@ -1898,7 +1884,7 @@
18981884 	}
18991885 
19001886 	/* continue probing in work context as may trigger request module */
1901
-	INIT_WORK(&hda->probe_work, azx_probe_work);
1887
+	INIT_DELAYED_WORK(&hda->probe_work, azx_probe_work);
19021888 
19031889 	*rchip = chip;
19041890 
....@@ -1924,6 +1910,12 @@
19241910 		pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
19251911 	}
19261912 #endif
1913
+	/*
1914
+	 * Fix response write request not synced to memory when handle
1915
+	 * hdac interrupt on Glenfly Gpus
1916
+	 */
1917
+	if (chip->driver_type == AZX_DRIVER_GFHDMI)
1918
+		bus->polling_mode = 1;
19271919 
19281920 	err = pci_request_regions(pci, "ICH HD audio");
19291921 	if (err < 0)
....@@ -1963,7 +1955,6 @@
19631955 	}
19641956 
19651957 	pci_set_master(pci);
1966
-	synchronize_irq(bus->irq);
19671958 
19681959 	gcap = azx_readw(chip, GCAP);
19691960 	dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
....@@ -2034,6 +2025,7 @@
20342025 			chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
20352026 			chip->capture_streams = ATIHDMI_NUM_CAPTURE;
20362027 			break;
2028
+		case AZX_DRIVER_GFHDMI:
20372029 		case AZX_DRIVER_GENERIC:
20382030 		default:
20392031 			chip->playback_streams = ICH6_NUM_PLAYBACK;
....@@ -2065,8 +2057,7 @@
20652057 	/* initialize chip */
20662058 	azx_init_pci(chip);
20672059 
2068
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
2069
-		snd_hdac_i915_set_bclk(bus);
2060
+	snd_hdac_i915_set_bclk(bus);
20702061 
20712062 	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
20722063 
....@@ -2107,41 +2098,6 @@
21072098 }
21082099 #endif
21092100 
2110
-/*
2111
- * HDA controller ops.
2112
- */
2113
-
2114
-/* PCI register access. */
2115
-static void pci_azx_writel(u32 value, u32 __iomem *addr)
2116
-{
2117
-	writel(value, addr);
2118
-}
2119
-
2120
-static u32 pci_azx_readl(u32 __iomem *addr)
2121
-{
2122
-	return readl(addr);
2123
-}
2124
-
2125
-static void pci_azx_writew(u16 value, u16 __iomem *addr)
2126
-{
2127
-	writew(value, addr);
2128
-}
2129
-
2130
-static u16 pci_azx_readw(u16 __iomem *addr)
2131
-{
2132
-	return readw(addr);
2133
-}
2134
-
2135
-static void pci_azx_writeb(u8 value, u8 __iomem *addr)
2136
-{
2137
-	writeb(value, addr);
2138
-}
2139
-
2140
-static u8 pci_azx_readb(u8 __iomem *addr)
2141
-{
2142
-	return readb(addr);
2143
-}
2144
-
21452101 static int disable_msi_reset_irq(struct azx *chip)
21462102 {
21472103 	struct hdac_bus *bus = azx_bus(chip);
....@@ -2149,6 +2105,7 @@
21492105 
21502106 	free_irq(bus->irq, chip);
21512107 	bus->irq = -1;
2108
+	chip->card->sync_irq = -1;
21522109 	pci_disable_msi(chip->pci);
21532110 	chip->msi = 0;
21542111 	err = azx_acquire_irq(chip, 1);
....@@ -2156,55 +2113,6 @@
21562113 		return err;
21572114 
21582115 	return 0;
2159
-}
2160
-
2161
-/* DMA page allocation helpers.  */
2162
-static int dma_alloc_pages(struct hdac_bus *bus,
2163
-			   int type,
2164
-			   size_t size,
2165
-			   struct snd_dma_buffer *buf)
2166
-{
2167
-	struct azx *chip = bus_to_azx(bus);
2168
-	int err;
2169
-
2170
-	err = snd_dma_alloc_pages(type,
2171
-				  bus->dev,
2172
-				  size, buf);
2173
-	if (err < 0)
2174
-		return err;
2175
-	mark_pages_wc(chip, buf, true);
2176
-	return 0;
2177
-}
2178
-
2179
-static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
2180
-{
2181
-	struct azx *chip = bus_to_azx(bus);
2182
-
2183
-	mark_pages_wc(chip, buf, false);
2184
-	snd_dma_free_pages(buf);
2185
-}
2186
-
2187
-static int substream_alloc_pages(struct azx *chip,
2188
-				 struct snd_pcm_substream *substream,
2189
-				 size_t size)
2190
-{
2191
-	struct azx_dev *azx_dev = get_azx_dev(substream);
2192
-	int ret;
2193
-
2194
-	mark_runtime_wc(chip, azx_dev, substream, false);
2195
-	ret = snd_pcm_lib_malloc_pages(substream, size);
2196
-	if (ret < 0)
2197
-		return ret;
2198
-	mark_runtime_wc(chip, azx_dev, substream, true);
2199
-	return 0;
2200
-}
2201
-
2202
-static int substream_free_pages(struct azx *chip,
2203
-				struct snd_pcm_substream *substream)
2204
-{
2205
-	struct azx_dev *azx_dev = get_azx_dev(substream);
2206
-	mark_runtime_wc(chip, azx_dev, substream, false);
2207
-	return snd_pcm_lib_free_pages(substream);
22082116 }
22092117 
22102118 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
....@@ -2218,22 +2126,11 @@
22182126 #endif
22192127 }
22202128 
2221
-static const struct hdac_io_ops pci_hda_io_ops = {
2222
-	.reg_writel = pci_azx_writel,
2223
-	.reg_readl = pci_azx_readl,
2224
-	.reg_writew = pci_azx_writew,
2225
-	.reg_readw = pci_azx_readw,
2226
-	.reg_writeb = pci_azx_writeb,
2227
-	.reg_readb = pci_azx_readb,
2228
-	.dma_alloc_pages = dma_alloc_pages,
2229
-	.dma_free_pages = dma_free_pages,
2230
-};
2231
-
2232
-/* Blacklist for skipping the whole probe:
2129
+/* Denylist for skipping the whole probe:
22332130  * some HD-audio PCI entries are exposed without any codecs, and such devices
22342131  * should be ignored from the beginning.
22352132  */
2236
-static const struct pci_device_id driver_blacklist[] = {
2133
+static const struct pci_device_id driver_denylist[] = {
22372134 	{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1043, 0x874f) }, /* ASUS ROG Zenith II / Strix */
22382135 	{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1462, 0xcb59) }, /* MSI TRX40 Creator */
22392136 	{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1462, 0xcb60) }, /* MSI TRX40 */
....@@ -2242,11 +2139,8 @@
22422139 
22432140 static const struct hda_controller_ops pci_hda_ops = {
22442141 	.disable_msi_reset_irq = disable_msi_reset_irq,
2245
-	.substream_alloc_pages = substream_alloc_pages,
2246
-	.substream_free_pages = substream_free_pages,
22472142 	.pcm_mmap_prepare = pcm_mmap_prepare,
22482143 	.position_check = azx_position_check,
2249
-	.link_power = azx_intel_link_power,
22502144 };
22512145 
22522146 static int azx_probe(struct pci_dev *pci,
....@@ -2259,8 +2153,8 @@
22592153 	bool schedule_probe;
22602154 	int err;
22612155 
2262
-	if (pci_match_id(driver_blacklist, pci)) {
2263
-		dev_info(&pci->dev, "Skipping the blacklisted device\n");
2156
+	if (pci_match_id(driver_denylist, pci)) {
2157
+		dev_info(&pci->dev, "Skipping the device on the denylist\n");
22642158 		return -ENODEV;
22652159 	}
22662160 
....@@ -2269,6 +2163,19 @@
22692163 	if (!enable[dev]) {
22702164 		dev++;
22712165 		return -ENOENT;
2166
+	}
2167
+
2168
+	/*
2169
+	 * stop probe if another Intel's DSP driver should be activated
2170
+	 */
2171
+	if (dmic_detect) {
2172
+		err = snd_intel_dsp_driver_probe(pci);
2173
+		if (err != SND_INTEL_DSP_DRIVER_ANY && err != SND_INTEL_DSP_DRIVER_LEGACY) {
2174
+			dev_dbg(&pci->dev, "HDAudio driver not selected, aborting probe\n");
2175
+			return -ENODEV;
2176
+		}
2177
+	} else {
2178
+		dev_warn(&pci->dev, "dmic_detect option is deprecated, pass snd-intel-dspcfg.dsp_driver=1 option instead\n");
22722179 	}
22732180 
22742181 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
....@@ -2319,7 +2226,7 @@
23192226 #endif
23202227 
23212228 	if (schedule_probe)
2322
-		schedule_work(&hda->probe_work);
2229
+		schedule_delayed_work(&hda->probe_work, 0);
23232230 
23242231 	dev++;
23252232 	if (chip->disabled)
....@@ -2338,7 +2245,7 @@
23382245  * So we keep a list of devices where we disable powersaving as its known
23392246  * to causes problems on these devices.
23402247  */
2341
-static struct snd_pci_quirk power_save_blacklist[] = {
2248
+static const struct snd_pci_quirk power_save_denylist[] = {
23422249 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
23432250 	SND_PCI_QUIRK(0x1849, 0xc892, "Asrock B85M-ITX", 0),
23442251 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
....@@ -2364,6 +2271,7 @@
23642271 	SND_PCI_QUIRK(0x8086, 0x2068, "Intel NUC7i3BNB", 0),
23652272 	/* https://bugzilla.kernel.org/show_bug.cgi?id=198611 */
23662273 	SND_PCI_QUIRK(0x17aa, 0x2227, "Lenovo X1 Carbon 3rd Gen", 0),
2274
+	SND_PCI_QUIRK(0x17aa, 0x316e, "Lenovo ThinkCentre M70q", 0),
23672275 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1689623 */
23682276 	SND_PCI_QUIRK(0x17aa, 0x367b, "Lenovo IdeaCentre B550", 0),
23692277 	/* https://bugzilla.redhat.com/show_bug.cgi?id=1572975 */
....@@ -2382,9 +2290,9 @@
23822290 	if (pm_blacklist) {
23832291 		const struct snd_pci_quirk *q;
23842292 
2385
-		q = snd_pci_quirk_lookup(chip->pci, power_save_blacklist);
2293
+		q = snd_pci_quirk_lookup(chip->pci, power_save_denylist);
23862294 		if (q && val) {
2387
-			dev_info(chip->card->dev, "device %04x:%04x is on the power_save blacklist, forcing power_save to 0\n",
2295
+			dev_info(chip->card->dev, "device %04x:%04x is on the power_save denylist, forcing power_save to 0\n",
23882296 				 q->subvendor, q->subdevice);
23892297 			val = 0;
23902298 		}
....@@ -2394,7 +2302,7 @@
23942302 }
23952303 
23962304 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
2397
-static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
2305
+static const unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
23982306 	[AZX_DRIVER_NVIDIA] = 8,
23992307 	[AZX_DRIVER_TERA] = 1,
24002308 };
....@@ -2406,6 +2314,11 @@
24062314 	struct pci_dev *pci = chip->pci;
24072315 	int dev = chip->dev_index;
24082316 	int err;
2317
+
2318
+	if (chip->disabled || hda->init_failed)
2319
+		return -EIO;
2320
+	if (hda->probe_retry)
2321
+		goto probe_retry;
24092322 
24102323 	to_hda_bus(bus)->bus_probing = 1;
24112324 	hda->probe_continued = 1;
....@@ -2425,10 +2338,13 @@
24252338 				goto out_free;
24262339 			} else {
24272340 				/* don't bother any longer */
2428
-				chip->driver_caps &=
2429
-					~(AZX_DCAPS_I915_COMPONENT | AZX_DCAPS_I915_POWERWELL);
2341
+				chip->driver_caps &= ~AZX_DCAPS_I915_COMPONENT;
24302342 			}
24312343 		}
2344
+
2345
+		/* HSW/BDW controllers need this power */
2346
+		if (CONTROLLER_IN_GPU(pci))
2347
+			hda->need_i915_power = 1;
24322348 	}
24332349 
24342350 	/* Request display power well for the HDA controller or codec. For
....@@ -2436,18 +2352,7 @@
24362352 	 * this power. For other platforms, like Baytrail/Braswell, only the
24372353 	 * display codec needs the power and it can be released after probe.
24382354 	 */
2439
-	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
2440
-		/* HSW/BDW controllers need this power */
2441
-		if (CONTROLLER_IN_GPU(pci))
2442
-			hda->need_i915_power = 1;
2443
-
2444
-		err = snd_hdac_display_power(bus, true);
2445
-		if (err < 0) {
2446
-			dev_err(chip->card->dev,
2447
-				"Cannot turn on display power on i915\n");
2448
-			goto i915_power_fail;
2449
-		}
2450
-	}
2355
+	display_power(chip, true);
24512356 
24522357 	err = azx_first_init(chip);
24532358 	if (err < 0)
....@@ -2476,10 +2381,20 @@
24762381 #endif
24772382 	}
24782383 #endif
2384
+
2385
+ probe_retry:
24792386 	if (bus->codec_mask && !(probe_only[dev] & 1)) {
24802387 		err = azx_codec_configure(chip);
2481
-		if (err < 0)
2388
+		if (err) {
2389
+			if ((chip->driver_caps & AZX_DCAPS_RETRY_PROBE) &&
2390
+			    ++hda->probe_retry < 60) {
2391
+				schedule_delayed_work(&hda->probe_work,
2392
+						      msecs_to_jiffies(1000));
2393
+				return 0; /* keep things up */
2394
+			}
2395
+			dev_err(chip->card->dev, "Cannot probe codecs, giving up\n");
24822396 			goto out_free;
2397
+		}
24832398 	}
24842399 
24852400 	err = snd_card_register(chip->card);
....@@ -2495,20 +2410,23 @@
24952410 
24962411 	if (azx_has_pm_runtime(chip)) {
24972412 		pm_runtime_use_autosuspend(&pci->dev);
2413
+		pm_runtime_allow(&pci->dev);
24982414 		pm_runtime_put_autosuspend(&pci->dev);
24992415 	}
25002416 
25012417 out_free:
2502
-	if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
2503
-		&& !hda->need_i915_power)
2504
-		snd_hdac_display_power(bus, false);
2418
+	if (err < 0) {
2419
+		pci_set_drvdata(pci, NULL);
2420
+		snd_card_free(chip->card);
2421
+		return err;
2422
+	}
25052423 
2506
-i915_power_fail:
2507
-	if (err < 0)
2508
-		hda->init_failed = 1;
2424
+	if (!hda->need_i915_power)
2425
+		display_power(chip, false);
25092426 	complete_all(&hda->probe_wait);
25102427 	to_hda_bus(bus)->bus_probing = 0;
2511
-	return err;
2428
+	hda->probe_retry = 0;
2429
+	return 0;
25122430 }
25132431 
25142432 static void azx_remove(struct pci_dev *pci)
....@@ -2533,7 +2451,7 @@
25332451 		 * device during cancel_work_sync() call.
25342452 		 */
25352453 		device_unlock(&pci->dev);
2536
-		cancel_work_sync(&hda->probe_work);
2454
+		cancel_delayed_work_sync(&hda->probe_work);
25372455 		device_lock(&pci->dev);
25382456 
25392457 		snd_card_free(card);
....@@ -2549,7 +2467,7 @@
25492467 		return;
25502468 	chip = card->private_data;
25512469 	if (chip && chip->running)
2552
-		azx_stop_chip(chip);
2470
+		__azx_shutdown_chip(chip, true);
25532471 }
25542472 
25552473 /* PCI IDs */
....@@ -2609,8 +2527,57 @@
26092527 	/* Cannonlake */
26102528 	{ PCI_DEVICE(0x8086, 0x9dc8),
26112529 	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2530
+	/* CometLake-LP */
2531
+	{ PCI_DEVICE(0x8086, 0x02C8),
2532
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2533
+	/* CometLake-H */
2534
+	{ PCI_DEVICE(0x8086, 0x06C8),
2535
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2536
+	{ PCI_DEVICE(0x8086, 0xf1c8),
2537
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2538
+	/* CometLake-S */
2539
+	{ PCI_DEVICE(0x8086, 0xa3f0),
2540
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2541
+	/* CometLake-R */
2542
+	{ PCI_DEVICE(0x8086, 0xf0c8),
2543
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
26122544 	/* Icelake */
26132545 	{ PCI_DEVICE(0x8086, 0x34c8),
2546
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2547
+	/* Icelake-H */
2548
+	{ PCI_DEVICE(0x8086, 0x3dc8),
2549
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2550
+	/* Jasperlake */
2551
+	{ PCI_DEVICE(0x8086, 0x38c8),
2552
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2553
+	{ PCI_DEVICE(0x8086, 0x4dc8),
2554
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2555
+	/* Tigerlake */
2556
+	{ PCI_DEVICE(0x8086, 0xa0c8),
2557
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2558
+	/* Tigerlake-H */
2559
+	{ PCI_DEVICE(0x8086, 0x43c8),
2560
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2561
+	/* DG1 */
2562
+	{ PCI_DEVICE(0x8086, 0x490d),
2563
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2564
+	/* DG2 */
2565
+	{ PCI_DEVICE(0x8086, 0x4f90),
2566
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2567
+	{ PCI_DEVICE(0x8086, 0x4f91),
2568
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2569
+	{ PCI_DEVICE(0x8086, 0x4f92),
2570
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2571
+	/* Alderlake-S */
2572
+	{ PCI_DEVICE(0x8086, 0x7ad0),
2573
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2574
+	/* Alderlake-P */
2575
+	{ PCI_DEVICE(0x8086, 0x51c8),
2576
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2577
+	/* Elkhart Lake */
2578
+	{ PCI_DEVICE(0x8086, 0x4b55),
2579
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
2580
+	{ PCI_DEVICE(0x8086, 0x4b58),
26142581 	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
26152582 	/* Broxton-P(Apollolake) */
26162583 	{ PCI_DEVICE(0x8086, 0x5a98),
....@@ -2634,9 +2601,12 @@
26342601 	/* 5 Series/3400 */
26352602 	{ PCI_DEVICE(0x8086, 0x3b56),
26362603 	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2604
+	{ PCI_DEVICE(0x8086, 0x3b57),
2605
+	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
26372606 	/* Poulsbo */
26382607 	{ PCI_DEVICE(0x8086, 0x811b),
2639
-	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2608
+	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE |
2609
+	  AZX_DCAPS_POSFIX_LPIB },
26402610 	/* Oaktrail */
26412611 	{ PCI_DEVICE(0x8086, 0x080a),
26422612 	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
....@@ -2764,13 +2734,50 @@
27642734 	{ PCI_DEVICE(0x1002, 0xaac8),
27652735 	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
27662736 	{ PCI_DEVICE(0x1002, 0xaad8),
2767
-	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2768
-	{ PCI_DEVICE(0x1002, 0xaae8),
2769
-	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2737
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2738
+	  AZX_DCAPS_PM_RUNTIME },
27702739 	{ PCI_DEVICE(0x1002, 0xaae0),
2771
-	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2740
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2741
+	  AZX_DCAPS_PM_RUNTIME },
2742
+	{ PCI_DEVICE(0x1002, 0xaae8),
2743
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2744
+	  AZX_DCAPS_PM_RUNTIME },
27722745 	{ PCI_DEVICE(0x1002, 0xaaf0),
2773
-	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2746
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2747
+	  AZX_DCAPS_PM_RUNTIME },
2748
+	{ PCI_DEVICE(0x1002, 0xaaf8),
2749
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2750
+	  AZX_DCAPS_PM_RUNTIME },
2751
+	{ PCI_DEVICE(0x1002, 0xab00),
2752
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2753
+	  AZX_DCAPS_PM_RUNTIME },
2754
+	{ PCI_DEVICE(0x1002, 0xab08),
2755
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2756
+	  AZX_DCAPS_PM_RUNTIME },
2757
+	{ PCI_DEVICE(0x1002, 0xab10),
2758
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2759
+	  AZX_DCAPS_PM_RUNTIME },
2760
+	{ PCI_DEVICE(0x1002, 0xab18),
2761
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2762
+	  AZX_DCAPS_PM_RUNTIME },
2763
+	{ PCI_DEVICE(0x1002, 0xab20),
2764
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2765
+	  AZX_DCAPS_PM_RUNTIME },
2766
+	{ PCI_DEVICE(0x1002, 0xab28),
2767
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2768
+	  AZX_DCAPS_PM_RUNTIME },
2769
+	{ PCI_DEVICE(0x1002, 0xab30),
2770
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2771
+	  AZX_DCAPS_PM_RUNTIME },
2772
+	{ PCI_DEVICE(0x1002, 0xab38),
2773
+	  .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
2774
+	  AZX_DCAPS_PM_RUNTIME },
2775
+	/* GLENFLY */
2776
+	{ PCI_DEVICE(0x6766, PCI_ANY_ID),
2777
+	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2778
+	  .class_mask = 0xffffff,
2779
+	  .driver_data = AZX_DRIVER_GFHDMI | AZX_DCAPS_POSFIX_LPIB |
2780
+	  AZX_DCAPS_NO_MSI | AZX_DCAPS_NO_64BIT },
27742781 	/* VIA VT8251/VT8237A */
27752782 	{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
27762783 	/* VIA GFX VT7122/VX900 */
....@@ -2830,6 +2837,8 @@
28302837 	  .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
28312838 	  .class_mask = 0xffffff,
28322839 	  .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2840
+	/* Zhaoxin */
2841
+	{ PCI_DEVICE(0x1d17, 0x3288), .driver_data = AZX_DRIVER_ZHAOXIN },
28332842 	{ 0, }
28342843 };
28352844 MODULE_DEVICE_TABLE(pci, azx_ids);