forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad 
 kernel/include/sound/hdaudio.h
....@@ -8,6 +8,7 @@
88 
99 #include <linux/device.h>
1010 #include <linux/interrupt.h>
11
+#include <linux/io.h>
1112 #include <linux/pm_runtime.h>
1213 #include <linux/timecounter.h>
1314 #include <sound/core.h>
....@@ -79,13 +80,14 @@
7980 
8081 	/* misc flags */
8182 	atomic_t in_pm;		/* suspend/resume being performed */
82
-	bool  link_power_control:1;
8383 
8484 	/* sysfs */
85
+	struct mutex widget_lock;
8586 	struct hdac_widget_tree *widgets;
8687 
8788 	/* regmap */
8889 	struct regmap *regmap;
90
+	struct mutex regmap_lock;
8991 	struct snd_array vendor_verbs;
9092 	bool lazy_cache:1;	/* don't wake up for writes */
9193 	bool caps_overwriting:1; /* caps overwrite being in process */
....@@ -97,6 +99,12 @@
9799 	HDA_DEV_CORE,
98100 	HDA_DEV_LEGACY,
99101 	HDA_DEV_ASOC,
102
+};
103
+
104
+enum {
105
+	SND_SKL_PCI_BIND_AUTO,	/* automatic selection based on pci class */
106
+	SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */
107
+	SND_SKL_PCI_BIND_ASOC	/* bind only with ASoC driver */
100108 };
101109 
102110 /* direction */
....@@ -114,12 +122,8 @@
114122 int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
115123 int snd_hdac_codec_modalias(struct hdac_device *hdac, char *buf, size_t size);
116124 
117
-int snd_hdac_refresh_widgets(struct hdac_device *codec, bool sysfs);
125
+int snd_hdac_refresh_widgets(struct hdac_device *codec);
118126 
119
-unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
120
-			       unsigned int verb, unsigned int parm);
121
-int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
122
-		       unsigned int flags, unsigned int *res);
123127 int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
124128 		  unsigned int verb, unsigned int parm, unsigned int *res);
125129 int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
....@@ -203,8 +207,8 @@
203207 static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
204208 static inline void snd_hdac_enter_pm(struct hdac_device *codec) {}
205209 static inline void snd_hdac_leave_pm(struct hdac_device *codec) {}
206
-static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return 0; }
207
-static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return 1; }
210
+static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; }
211
+static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; }
208212 #endif
209213 
210214 /*
....@@ -237,8 +241,6 @@
237241 	/* get a response from the last command */
238242 	int (*get_response)(struct hdac_bus *bus, unsigned int addr,
239243 			    unsigned int *res);
240
-	/* control the link power  */
241
-	int (*link_power)(struct hdac_bus *bus, bool enable);
242244 };
243245 
244246 /*
....@@ -247,24 +249,6 @@
247249 struct hdac_ext_bus_ops {
248250 	int (*hdev_attach)(struct hdac_device *hdev);
249251 	int (*hdev_detach)(struct hdac_device *hdev);
250
-};
251
-
252
-/*
253
- * Lowlevel I/O operators
254
- */
255
-struct hdac_io_ops {
256
-	/* mapped register accesses */
257
-	void (*reg_writel)(u32 value, u32 __iomem *addr);
258
-	u32 (*reg_readl)(u32 __iomem *addr);
259
-	void (*reg_writew)(u16 value, u16 __iomem *addr);
260
-	u16 (*reg_readw)(u16 __iomem *addr);
261
-	void (*reg_writeb)(u8 value, u8 __iomem *addr);
262
-	u8 (*reg_readb)(u8 __iomem *addr);
263
-	/* Allocation ops */
264
-	int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
265
-			       struct snd_dma_buffer *buf);
266
-	void (*dma_free_pages)(struct hdac_bus *bus,
267
-			       struct snd_dma_buffer *buf);
268252 };
269253 
270254 #define HDA_UNSOL_QUEUE_SIZE	64
....@@ -294,13 +278,12 @@
294278  * @num_streams: streams supported
295279  * @idx: HDA link index
296280  * @hlink_list: link list of HDA links
297
- * @lock: lock for link mgmt
281
+ * @lock: lock for link and display power mgmt
298282  * @cmd_dma_state: state of cmd DMAs: CORB and RIRB
299283  */
300284 struct hdac_bus {
301285 	struct device *dev;
302286 	const struct hdac_bus_ops *ops;
303
-	const struct hdac_io_ops *io_ops;
304287 	const struct hdac_ext_bus_ops *ext_ops;
305288 
306289 	/* h/w resources */
....@@ -336,10 +319,12 @@
336319 	struct hdac_rb corb;
337320 	struct hdac_rb rirb;
338321 	unsigned int last_cmd[HDA_MAX_CODECS];	/* last sent command */
322
+	wait_queue_head_t rirb_wq;
339323 
340324 	/* CORB/RIRB and position buffers */
341325 	struct snd_dma_buffer rb;
342326 	struct snd_dma_buffer posbuf;
327
+	int dma_type;			/* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
343328 
344329 	/* hdac_stream linked list */
345330 	struct list_head stream_list;
....@@ -348,47 +333,50 @@
348333 	bool chip_init:1;		/* h/w initialized */
349334 
350335 	/* behavior flags */
336
+	bool aligned_mmio:1;		/* aligned MMIO access */
351337 	bool sync_write:1;		/* sync after verb write */
352338 	bool use_posbuf:1;		/* use position buffer */
353339 	bool snoop:1;			/* enable snooping */
354340 	bool align_bdle_4k:1;		/* BDLE align 4K boundary */
355341 	bool reverse_assign:1;		/* assign devices in reverse order */
356342 	bool corbrp_self_clear:1;	/* CORBRP clears itself after reset */
343
+	bool polling_mode:1;
344
+	bool needs_damn_long_delay:1;
345
+
346
+	int poll_count;
357347 
358348 	int bdl_pos_adj;		/* BDL position adjustment */
349
+
350
+	/* delay time in us for dma stop */
351
+	unsigned int dma_stop_delay;
359352 
360353 	/* locks */
361354 	spinlock_t reg_lock;
362355 	struct mutex cmd_mutex;
356
+	struct mutex lock;
363357 
364358 	/* DRM component interface */
365359 	struct drm_audio_component *audio_component;
366
-	int drm_power_refcount;
360
+	long display_power_status;
361
+	unsigned long display_power_active;
367362 
368363 	/* parameters required for enhanced capabilities */
369364 	int num_streams;
370365 	int idx;
371366 
367
+	/* link management */
372368 	struct list_head hlink_list;
373
-
374
-	struct mutex lock;
375369 	bool cmd_dma_state;
376370 
371
+	/* factor used to derive STRIPE control value */
372
+	unsigned int sdo_limit;
377373 };
378374 
379375 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
380
-		      const struct hdac_bus_ops *ops,
381
-		      const struct hdac_io_ops *io_ops);
376
+		      const struct hdac_bus_ops *ops);
382377 void snd_hdac_bus_exit(struct hdac_bus *bus);
383
-int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
384
-			   unsigned int cmd, unsigned int *res);
385378 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
386379 				    unsigned int cmd, unsigned int *res);
387
-void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
388
-
389
-int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
390
-void snd_hdac_bus_remove_device(struct hdac_bus *bus,
391
-				struct hdac_device *codec);
392380 
393381 static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
394382 {
....@@ -404,7 +392,6 @@
404392 int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
405393 			      unsigned int *res);
406394 int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
407
-int snd_hdac_link_power(struct hdac_device *codec, bool enable);
408395 
409396 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
410397 void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
....@@ -422,21 +409,65 @@
422409 int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
423410 void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
424411 
412
+#ifdef CONFIG_SND_HDA_ALIGNED_MMIO
413
+unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask);
414
+void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
415
+			    unsigned int mask);
416
+#define snd_hdac_aligned_mmio(bus)	(bus)->aligned_mmio
417
+#else
418
+#define snd_hdac_aligned_mmio(bus)	false
419
+#define snd_hdac_aligned_read(addr, mask)	0
420
+#define snd_hdac_aligned_write(val, addr, mask) do {} while (0)
421
+#endif
422
+
423
+static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr,
424
+				       u8 val)
425
+{
426
+	if (snd_hdac_aligned_mmio(bus))
427
+		snd_hdac_aligned_write(val, addr, 0xff);
428
+	else
429
+		writeb(val, addr);
430
+}
431
+
432
+static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr,
433
+				       u16 val)
434
+{
435
+	if (snd_hdac_aligned_mmio(bus))
436
+		snd_hdac_aligned_write(val, addr, 0xffff);
437
+	else
438
+		writew(val, addr);
439
+}
440
+
441
+static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr)
442
+{
443
+	return snd_hdac_aligned_mmio(bus) ?
444
+		snd_hdac_aligned_read(addr, 0xff) : readb(addr);
445
+}
446
+
447
+static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr)
448
+{
449
+	return snd_hdac_aligned_mmio(bus) ?
450
+		snd_hdac_aligned_read(addr, 0xffff) : readw(addr);
451
+}
452
+
453
+#define snd_hdac_reg_writel(bus, addr, val)	writel(val, addr)
454
+#define snd_hdac_reg_readl(bus, addr)	readl(addr)
455
+
425456 /*
426457  * macros for easy use
427458  */
428459 #define _snd_hdac_chip_writeb(chip, reg, value) \
429
-	((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg)))
460
+	snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value)
430461 #define _snd_hdac_chip_readb(chip, reg) \
431
-	((chip)->io_ops->reg_readb((chip)->remap_addr + (reg)))
462
+	snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg))
432463 #define _snd_hdac_chip_writew(chip, reg, value) \
433
-	((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg)))
464
+	snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value)
434465 #define _snd_hdac_chip_readw(chip, reg) \
435
-	((chip)->io_ops->reg_readw((chip)->remap_addr + (reg)))
466
+	snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg))
436467 #define _snd_hdac_chip_writel(chip, reg, value) \
437
-	((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg)))
468
+	snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value)
438469 #define _snd_hdac_chip_readl(chip, reg) \
439
-	((chip)->io_ops->reg_readl((chip)->remap_addr + (reg)))
470
+	snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg))
440471 
441472 /* read/write a register, pass without AZX_REG_ prefix */
442473 #define snd_hdac_chip_writel(chip, reg, value) \
....@@ -485,6 +516,7 @@
485516 	struct snd_pcm_substream *substream;	/* assigned substream,
486517 						 * set in PCM open
487518 						 */
519
+	struct snd_compr_stream *cstream;
488520 	unsigned int format_val;	/* format value to be set in the
489521 					 * controller and the codec
490522 					 */
....@@ -497,7 +529,9 @@
497529 	bool prepared:1;
498530 	bool no_period_wakeup:1;
499531 	bool locked:1;
532
+	bool stripe:1;			/* apply stripe control */
500533 
534
+	u64 curr_pos;
501535 	/* timestamp */
502536 	unsigned long start_wallclk;	/* start + minimum wallclk */
503537 	unsigned long period_wallclk;	/* wallclk for period */
....@@ -528,6 +562,8 @@
528562 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
529563 void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
530564 void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
565
+void snd_hdac_stop_streams(struct hdac_bus *bus);
566
+void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
531567 void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
532568 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
533569 				  unsigned int streams, unsigned int reg);
....@@ -535,27 +571,25 @@
535571 			  unsigned int streams);
536572 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
537573 				      unsigned int streams);
574
+int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
575
+				struct snd_pcm_substream *substream);
576
+
538577 /*
539578  * macros for easy use
540579  */
541
-#define _snd_hdac_stream_write(type, dev, reg, value)			\
542
-	((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
543
-#define _snd_hdac_stream_read(type, dev, reg)				\
544
-	((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
545
-
546580 /* read/write a register, pass without AZX_REG_ prefix */
547581 #define snd_hdac_stream_writel(dev, reg, value) \
548
-	_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
582
+	snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
549583 #define snd_hdac_stream_writew(dev, reg, value) \
550
-	_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
584
+	snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
551585 #define snd_hdac_stream_writeb(dev, reg, value) \
552
-	_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
586
+	snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
553587 #define snd_hdac_stream_readl(dev, reg) \
554
-	_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
588
+	snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
555589 #define snd_hdac_stream_readw(dev, reg) \
556
-	_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
590
+	snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
557591 #define snd_hdac_stream_readb(dev, reg) \
558
-	_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
592
+	snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
559593 
560594 /* update a register, pass without AZX_REG_ prefix */
561595 #define snd_hdac_stream_updatel(dev, reg, mask, val) \