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| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
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| 3 | 4 | * Author: Andrzej Hajda <a.hajda@samsung.com> |
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| 4 | 5 | * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify |
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| 6 | | - * it under the terms of the GNU General Public License version 2 as |
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| 7 | | - * published by the Free Software Foundation. |
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| 8 | | - * |
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| 9 | 6 | * Device Tree binding constants for Exynos5250 clock controller. |
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| 10 | | -*/ |
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| 7 | + */ |
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| 11 | 8 | |
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| 12 | 9 | #ifndef _DT_BINDINGS_CLOCK_EXYNOS_5250_H |
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| 13 | 10 | #define _DT_BINDINGS_CLOCK_EXYNOS_5250_H |
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| .. | .. |
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| 175 | 172 | #define CLK_MOUT_GPLL 1025 |
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| 176 | 173 | #define CLK_MOUT_ACLK200_DISP1_SUB 1026 |
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| 177 | 174 | #define CLK_MOUT_ACLK300_DISP1_SUB 1027 |
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| 175 | +#define CLK_MOUT_APLL 1028 |
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| 176 | +#define CLK_MOUT_MPLL 1029 |
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| 178 | 177 | |
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| 179 | 178 | /* must be greater than maximal clock id */ |
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| 180 | | -#define CLK_NR_CLKS 1028 |
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| 179 | +#define CLK_NR_CLKS 1030 |
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| 181 | 180 | |
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| 182 | 181 | #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */ |
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