rtl88x2CE_WiFi_linux add concurrent mode

hc

2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad

 kernel/drivers/net/dsa/mv88e6xxx/serdes.h
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@@ -1,14 +1,10 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /*
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  * Marvell 88E6xxx SERDES manipulation, via SMI bus
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  *
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  * Copyright (c) 2008 Marvell Semiconductor
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  *
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  * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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  */
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 #ifndef _MV88E6XXX_SERDES_H
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@@ -18,8 +14,21 @@
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14
 
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 #define MV88E6352_ADDR_SERDES		0x0f
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 #define MV88E6352_SERDES_PAGE_FIBER	0x01
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+#define MV88E6352_SERDES_IRQ		0x0b
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+#define MV88E6352_SERDES_INT_ENABLE	0x12
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+#define MV88E6352_SERDES_INT_SPEED_CHANGE	BIT(14)
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+#define MV88E6352_SERDES_INT_DUPLEX_CHANGE	BIT(13)
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+#define MV88E6352_SERDES_INT_PAGE_RX		BIT(12)
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+#define MV88E6352_SERDES_INT_AN_COMPLETE	BIT(11)
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+#define MV88E6352_SERDES_INT_LINK_CHANGE	BIT(10)
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+#define MV88E6352_SERDES_INT_SYMBOL_ERROR	BIT(9)
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+#define MV88E6352_SERDES_INT_FALSE_CARRIER	BIT(8)
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+#define MV88E6352_SERDES_INT_FIFO_OVER_UNDER	BIT(7)
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+#define MV88E6352_SERDES_INT_FIBRE_ENERGY	BIT(4)
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+#define MV88E6352_SERDES_INT_STATUS	0x13
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29
 
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-#define MV88E6341_ADDR_SERDES		0x15
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+
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+#define MV88E6341_PORT5_LANE		0x15
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 #define MV88E6390_PORT9_LANE0		0x09
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 #define MV88E6390_PORT9_LANE1		0x12
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@@ -31,21 +40,14 @@
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 #define MV88E6390_PORT10_LANE3		0x17
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 /* 10GBASE-R and 10GBASE-X4/X2 */
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-#define MV88E6390_PCS_CONTROL_1		0x1000
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-#define MV88E6390_PCS_CONTROL_1_RESET		BIT(15)
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-#define MV88E6390_PCS_CONTROL_1_LOOPBACK	BIT(14)
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-#define MV88E6390_PCS_CONTROL_1_SPEED		BIT(13)
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-#define MV88E6390_PCS_CONTROL_1_PDOWN		BIT(11)
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+#define MV88E6390_10G_CTRL1		(0x1000 + MDIO_CTRL1)
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+#define MV88E6390_10G_STAT1		(0x1000 + MDIO_STAT1)
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45
 
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 /* 1000BASE-X and SGMII */
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-#define MV88E6390_SGMII_CONTROL		0x2000
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-#define MV88E6390_SGMII_CONTROL_RESET		BIT(15)
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-#define MV88E6390_SGMII_CONTROL_LOOPBACK	BIT(14)
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-#define MV88E6390_SGMII_CONTROL_PDOWN		BIT(11)
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-#define MV88E6390_SGMII_STATUS		0x2001
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-#define MV88E6390_SGMII_STATUS_AN_DONE		BIT(5)
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-#define MV88E6390_SGMII_STATUS_REMOTE_FAULT	BIT(4)
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-#define MV88E6390_SGMII_STATUS_LINK		BIT(2)
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+#define MV88E6390_SGMII_BMCR		(0x2000 + MII_BMCR)
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+#define MV88E6390_SGMII_BMSR		(0x2000 + MII_BMSR)
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+#define MV88E6390_SGMII_ADVERTISE	(0x2000 + MII_ADVERTISE)
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+#define MV88E6390_SGMII_LPA		(0x2000 + MII_LPA)
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 #define MV88E6390_SGMII_INT_ENABLE	0xa001
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 #define MV88E6390_SGMII_INT_SPEED_CHANGE	BIT(14)
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 #define MV88E6390_SGMII_INT_DUPLEX_CHANGE	BIT(13)
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@@ -56,22 +58,139 @@
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 #define MV88E6390_SGMII_INT_SYMBOL_ERROR	BIT(8)
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 #define MV88E6390_SGMII_INT_FALSE_CARRIER	BIT(7)
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 #define MV88E6390_SGMII_INT_STATUS	0xa002
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+#define MV88E6390_SGMII_PHY_STATUS	0xa003
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+#define MV88E6390_SGMII_PHY_STATUS_SPEED_MASK	GENMASK(15, 14)
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+#define MV88E6390_SGMII_PHY_STATUS_SPEED_1000	0x8000
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+#define MV88E6390_SGMII_PHY_STATUS_SPEED_100	0x4000
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+#define MV88E6390_SGMII_PHY_STATUS_SPEED_10	0x0000
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+#define MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL	BIT(13)
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+#define MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID BIT(11)
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+#define MV88E6390_SGMII_PHY_STATUS_LINK		BIT(10)
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+#define MV88E6390_SGMII_PHY_STATUS_TX_PAUSE	BIT(3)
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+#define MV88E6390_SGMII_PHY_STATUS_RX_PAUSE	BIT(2)
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71
 
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-int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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-int mv88e6341_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
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-int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
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-int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
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-int mv88e6390x_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
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-int mv88e6390_serdes_irq_setup(struct mv88e6xxx_chip *chip, int port);
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-void mv88e6390_serdes_irq_free(struct mv88e6xxx_chip *chip, int port);
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+/* Packet generator pad packet checker */
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+#define MV88E6390_PG_CONTROL		0xf010
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+#define MV88E6390_PG_CONTROL_ENABLE_PC		BIT(0)
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+
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+u8 mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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+u8 mv88e6352_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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+u8 mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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+u8 mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);
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+int mv88e6352_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,
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+				u8 lane, unsigned int mode,
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+				phy_interface_t interface,
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+				const unsigned long *advertise);
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+int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *chip, int port,
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+				u8 lane, unsigned int mode,
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+				phy_interface_t interface,
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+				const unsigned long *advertise);
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+int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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+				   u8 lane, struct phylink_link_state *state);
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+int mv88e6390_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port,
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+				   u8 lane, struct phylink_link_state *state);
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+int mv88e6352_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
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+				    u8 lane);
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+int mv88e6390_serdes_pcs_an_restart(struct mv88e6xxx_chip *chip, int port,
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+				    u8 lane);
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+int mv88e6352_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port,
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+				 u8 lane, int speed, int duplex);
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+int mv88e6390_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port,
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+				 u8 lane, int speed, int duplex);
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+unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip,
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+					  int port);
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+unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip,
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+					  int port);
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+int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
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+			   bool on);
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+int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, u8 lane,
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+			   bool on);
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+int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, u8 lane,
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+				bool enable);
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+int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port, u8 lane,
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+				bool enable);
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+irqreturn_t mv88e6352_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
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+					u8 lane);
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+irqreturn_t mv88e6390_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
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+					u8 lane);
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 int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port);
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 int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip,
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 				 int port, uint8_t *data);
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 int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
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 			       uint64_t *data);
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-int mv88e6390_serdes_irq_enable(struct mv88e6xxx_chip *chip, int port,
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-				int lane);
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-int mv88e6390_serdes_irq_disable(struct mv88e6xxx_chip *chip, int port,
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-				 int lane);
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+int mv88e6390_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port);
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+int mv88e6390_serdes_get_strings(struct mv88e6xxx_chip *chip,
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+				 int port, uint8_t *data);
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+int mv88e6390_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
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+			       uint64_t *data);
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+
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+int mv88e6352_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port);
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+void mv88e6352_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p);
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+int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port);
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+void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p);
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+
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+/* Return the (first) SERDES lane address a port is using, 0 otherwise. */
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+static inline u8 mv88e6xxx_serdes_get_lane(struct mv88e6xxx_chip *chip,
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+					   int port)
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+{
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+	if (!chip->info->ops->serdes_get_lane)
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+		return 0;
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+
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+	return chip->info->ops->serdes_get_lane(chip, port);
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+}
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+
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+static inline int mv88e6xxx_serdes_power_up(struct mv88e6xxx_chip *chip,
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+					    int port, u8 lane)
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+{
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+	if (!chip->info->ops->serdes_power)
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+		return -EOPNOTSUPP;
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+
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+	return chip->info->ops->serdes_power(chip, port, lane, true);
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+}
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+
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+static inline int mv88e6xxx_serdes_power_down(struct mv88e6xxx_chip *chip,
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+					      int port, u8 lane)
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+{
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+	if (!chip->info->ops->serdes_power)
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+		return -EOPNOTSUPP;
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+
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+	return chip->info->ops->serdes_power(chip, port, lane, false);
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+}
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+
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+static inline unsigned int
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+mv88e6xxx_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)
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+{
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+	if (!chip->info->ops->serdes_irq_mapping)
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+		return 0;
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+
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+	return chip->info->ops->serdes_irq_mapping(chip, port);
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+}
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+
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+static inline int mv88e6xxx_serdes_irq_enable(struct mv88e6xxx_chip *chip,
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+					      int port, u8 lane)
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+{
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+	if (!chip->info->ops->serdes_irq_enable)
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+		return -EOPNOTSUPP;
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+
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+	return chip->info->ops->serdes_irq_enable(chip, port, lane, true);
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+}
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+
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+static inline int mv88e6xxx_serdes_irq_disable(struct mv88e6xxx_chip *chip,
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+					       int port, u8 lane)
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+{
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+	if (!chip->info->ops->serdes_irq_enable)
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+		return -EOPNOTSUPP;
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+
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+	return chip->info->ops->serdes_irq_enable(chip, port, lane, false);
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+}
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+
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+static inline irqreturn_t
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+mv88e6xxx_serdes_irq_status(struct mv88e6xxx_chip *chip, int port, u8 lane)
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+{
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+	if (!chip->info->ops->serdes_irq_status)
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+		return IRQ_NONE;
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+
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+	return chip->info->ops->serdes_irq_status(chip, port, lane);
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+}
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 #endif