hc
2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad
kernel/drivers/net/dsa/mv88e6xxx/global1_atu.c
....@@ -1,14 +1,12 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * Marvell 88E6xxx Address Translation Unit (ATU) support
34 *
45 * Copyright (c) 2008 Marvell Semiconductor
56 * Copyright (c) 2017 Savoir-faire Linux, Inc.
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License as published by
9
- * the Free Software Foundation; either version 2 of the License, or
10
- * (at your option) any later version.
117 */
8
+
9
+#include <linux/bitfield.h>
1210 #include <linux/interrupt.h>
1311 #include <linux/irqdomain.h>
1412
....@@ -75,12 +73,45 @@
7573 return 0;
7674 }
7775
76
+int mv88e6165_g1_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash)
77
+{
78
+ int err;
79
+ u16 val;
80
+
81
+ err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
82
+ if (err)
83
+ return err;
84
+
85
+ *hash = val & MV88E6161_G1_ATU_CTL_HASH_MASK;
86
+
87
+ return 0;
88
+}
89
+
90
+int mv88e6165_g1_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash)
91
+{
92
+ int err;
93
+ u16 val;
94
+
95
+ if (hash & ~MV88E6161_G1_ATU_CTL_HASH_MASK)
96
+ return -EINVAL;
97
+
98
+ err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &val);
99
+ if (err)
100
+ return err;
101
+
102
+ val &= ~MV88E6161_G1_ATU_CTL_HASH_MASK;
103
+ val |= hash;
104
+
105
+ return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);
106
+}
107
+
78108 /* Offset 0x0B: ATU Operation Register */
79109
80110 static int mv88e6xxx_g1_atu_op_wait(struct mv88e6xxx_chip *chip)
81111 {
82
- return mv88e6xxx_g1_wait(chip, MV88E6XXX_G1_ATU_OP,
83
- MV88E6XXX_G1_ATU_OP_BUSY);
112
+ int bit = __bf_shf(MV88E6XXX_G1_ATU_OP_BUSY);
113
+
114
+ return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_ATU_OP, bit, 0);
84115 }
85116
86117 static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
....@@ -94,7 +125,7 @@
94125 if (err)
95126 return err;
96127 } else {
97
- if (mv88e6xxx_num_databases(chip) > 16) {
128
+ if (mv88e6xxx_num_databases(chip) > 64) {
98129 /* ATU DBNum[7:4] are located in ATU Control 15:12 */
99130 err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
100131 &val);
....@@ -106,6 +137,9 @@
106137 val);
107138 if (err)
108139 return err;
140
+ } else if (mv88e6xxx_num_databases(chip) > 16) {
141
+ /* ATU DBNum[5:4] are located in ATU Operation 9:8 */
142
+ op |= (fid & 0x30) << 4;
109143 }
110144
111145 /* ATU DBNum[3:0] are located in ATU Operation 3:0 */
....@@ -118,6 +152,11 @@
118152 return err;
119153
120154 return mv88e6xxx_g1_atu_op_wait(chip);
155
+}
156
+
157
+int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid)
158
+{
159
+ return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB);
121160 }
122161
123162 /* Offset 0x0C: ATU Data Register */
....@@ -133,7 +172,7 @@
133172 return err;
134173
135174 entry->state = val & 0xf;
136
- if (entry->state != MV88E6XXX_G1_ATU_DATA_STATE_UNUSED) {
175
+ if (entry->state) {
137176 entry->trunk = !!(val & MV88E6XXX_G1_ATU_DATA_TRUNK);
138177 entry->portvec = (val >> 4) & mv88e6xxx_port_mask(chip);
139178 }
....@@ -146,7 +185,7 @@
146185 {
147186 u16 data = entry->state & 0xf;
148187
149
- if (entry->state != MV88E6XXX_G1_ATU_DATA_STATE_UNUSED) {
188
+ if (entry->state) {
150189 if (entry->trunk)
151190 data |= MV88E6XXX_G1_ATU_DATA_TRUNK;
152191
....@@ -207,7 +246,7 @@
207246 return err;
208247
209248 /* Write the MAC address to iterate from only once */
210
- if (entry->state == MV88E6XXX_G1_ATU_DATA_STATE_UNUSED) {
249
+ if (!entry->state) {
211250 err = mv88e6xxx_g1_atu_mac_write(chip, entry);
212251 if (err)
213252 return err;
....@@ -318,7 +357,7 @@
318357 int err;
319358 u16 val;
320359
321
- mutex_lock(&chip->reg_lock);
360
+ mv88e6xxx_reg_lock(chip);
322361
323362 err = mv88e6xxx_g1_atu_op(chip, 0,
324363 MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION);
....@@ -365,12 +404,12 @@
365404 entry.mac, entry.portvec, spid);
366405 chip->ports[spid].atu_full_violation++;
367406 }
368
- mutex_unlock(&chip->reg_lock);
407
+ mv88e6xxx_reg_unlock(chip);
369408
370409 return IRQ_HANDLED;
371410
372411 out:
373
- mutex_unlock(&chip->reg_lock);
412
+ mv88e6xxx_reg_unlock(chip);
374413
375414 dev_err(chip->dev, "ATU problem: error %d while handling interrupt\n",
376415 err);
....@@ -386,9 +425,12 @@
386425 if (chip->atu_prob_irq < 0)
387426 return chip->atu_prob_irq;
388427
428
+ snprintf(chip->atu_prob_irq_name, sizeof(chip->atu_prob_irq_name),
429
+ "mv88e6xxx-%s-g1-atu-prob", dev_name(chip->dev));
430
+
389431 err = request_threaded_irq(chip->atu_prob_irq, NULL,
390432 mv88e6xxx_g1_atu_prob_irq_thread_fn,
391
- IRQF_ONESHOT, "mv88e6xxx-g1-atu-prob",
433
+ IRQF_ONESHOT, chip->atu_prob_irq_name,
392434 chip);
393435 if (err)
394436 irq_dispose_mapping(chip->atu_prob_irq);