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hc
2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad 
 kernel/arch/powerpc/kernel/fsl_booke_entry_mapping.S
....@@ -153,35 +153,24 @@
153153 	tlbivax 0,r9
154154 	TLBSYNC
155155 
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-/*
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- * The mapping only needs to be cache-coherent on SMP, except on
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- * Freescale e500mc derivatives where it's also needed for coherent DMA.
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- */
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-#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
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-#define M_IF_NEEDED	MAS2_M
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-#else
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-#define M_IF_NEEDED	0
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-#endif
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-
166156 #if defined(ENTRY_MAPPING_BOOT_SETUP)
167157 
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-/* 6. Setup KERNELBASE mapping in TLB1[0] */
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+/* 6. Setup kernstart_virt_addr mapping in TLB1[0] */
169159 	lis	r6,0x1000		/* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
170160 	mtspr	SPRN_MAS0,r6
171161 	lis	r6,(MAS1_VALID|MAS1_IPROT)@h
172162 	ori	r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
173163 	mtspr	SPRN_MAS1,r6
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-	lis	r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@h
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-	ori	r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@l
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+	lis	r6,MAS2_EPN_MASK(BOOK3E_PAGESZ_64M)@h
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+	ori	r6,r6,MAS2_EPN_MASK(BOOK3E_PAGESZ_64M)@l
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+	and	r6,r6,r20
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+	ori	r6,r6,MAS2_M_IF_NEEDED@l
176168 	mtspr	SPRN_MAS2,r6
177169 	mtspr	SPRN_MAS3,r8
178170 	tlbwe
179171 
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-/* 7. Jump to KERNELBASE mapping */
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-	lis	r6,(KERNELBASE & ~0xfff)@h
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-	ori	r6,r6,(KERNELBASE & ~0xfff)@l
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-	rlwinm	r7,r25,0,0x03ffffff
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-	add	r6,r7,r6
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+/* 7. Jump to kernstart_virt_addr mapping */
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+	mr	r6,r20
185174 
186175 #elif defined(ENTRY_MAPPING_KEXEC_SETUP)
187176 /*