rtl88x2CE_WiFi_linux add concurrent mode

hc

2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad

 kernel/arch/powerpc/include/asm/pnv-ocxl.h
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@@ -1,4 +1,4 @@
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-// SPDX-License-Identifier: GPL-2.0+
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+/* SPDX-License-Identifier: GPL-2.0+ */
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 // Copyright 2017 IBM Corp.
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 #ifndef _ASM_PNV_OCXL_H
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 #define _ASM_PNV_OCXL_H
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@@ -9,28 +9,23 @@
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 #define PNV_OCXL_TL_BITS_PER_RATE       4
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 #define PNV_OCXL_TL_RATE_BUF_SIZE       ((PNV_OCXL_TL_MAX_TEMPLATE+1) * PNV_OCXL_TL_BITS_PER_RATE / 8)
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-extern int pnv_ocxl_get_actag(struct pci_dev *dev, u16 *base, u16 *enabled,
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-			u16 *supported);
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-extern int pnv_ocxl_get_pasid_count(struct pci_dev *dev, int *count);
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+int pnv_ocxl_get_actag(struct pci_dev *dev, u16 *base, u16 *enabled, u16 *supported);
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+int pnv_ocxl_get_pasid_count(struct pci_dev *dev, int *count);
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-extern int pnv_ocxl_get_tl_cap(struct pci_dev *dev, long *cap,
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+int pnv_ocxl_get_tl_cap(struct pci_dev *dev, long *cap,
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 			char *rate_buf, int rate_buf_size);
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-extern int pnv_ocxl_set_tl_conf(struct pci_dev *dev, long cap,
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-			uint64_t rate_buf_phys, int rate_buf_size);
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+int pnv_ocxl_set_tl_conf(struct pci_dev *dev, long cap,
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+			 uint64_t rate_buf_phys, int rate_buf_size);
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-extern int pnv_ocxl_get_xsl_irq(struct pci_dev *dev, int *hwirq);
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-extern void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar,
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-				void __iomem *tfc, void __iomem *pe_handle);
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-extern int pnv_ocxl_map_xsl_regs(struct pci_dev *dev, void __iomem **dsisr,
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-				void __iomem **dar, void __iomem **tfc,
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-				void __iomem **pe_handle);
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+int pnv_ocxl_get_xsl_irq(struct pci_dev *dev, int *hwirq);
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+void pnv_ocxl_unmap_xsl_regs(void __iomem *dsisr, void __iomem *dar,
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+			     void __iomem *tfc, void __iomem *pe_handle);
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+int pnv_ocxl_map_xsl_regs(struct pci_dev *dev, void __iomem **dsisr,
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+			  void __iomem **dar, void __iomem **tfc,
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+			  void __iomem **pe_handle);
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-extern int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask,
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-			void **platform_data);
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-extern void pnv_ocxl_spa_release(void *platform_data);
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-extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle);
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-
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-extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr);
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-extern void pnv_ocxl_free_xive_irq(u32 irq);
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+int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask, void **platform_data);
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+void pnv_ocxl_spa_release(void *platform_data);
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+int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle);
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 #endif /* _ASM_PNV_OCXL_H */