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2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad 
 kernel/arch/mips/boot/dts/ingenic/jz4770.dtsi
....@@ -1,11 +1,25 @@
11 // SPDX-License-Identifier: GPL-2.0
2
-
32 #include <dt-bindings/clock/jz4770-cgu.h>
3
+#include <dt-bindings/clock/ingenic,tcu.h>
44 
55 / {
66 	#address-cells = <1>;
77 	#size-cells = <1>;
88 	compatible = "ingenic,jz4770";
9
+
10
+	cpus {
11
+		#address-cells = <1>;
12
+		#size-cells = <0>;
13
+
14
+		cpu0: cpu@0 {
15
+			device_type = "cpu";
16
+			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
17
+			reg = <0>;
18
+
19
+			clocks = <&cgu JZ4770_CLK_CCLK>;
20
+			clock-names = "cpu";
21
+		};
22
+	};
923 
1024 	cpuintc: interrupt-controller {
1125 		#address-cells = <0>;
....@@ -37,13 +51,87 @@
3751 	};
3852 
3953 	cgu: jz4770-cgu@10000000 {
40
-		compatible = "ingenic,jz4770-cgu";
54
+		compatible = "ingenic,jz4770-cgu", "simple-mfd";
4155 		reg = <0x10000000 0x100>;
56
+		#address-cells = <1>;
57
+		#size-cells = <1>;
58
+		ranges = <0x0 0x10000000 0x100>;
4259 
4360 		clocks = <&ext>, <&osc32k>;
4461 		clock-names = "ext", "osc32k";
4562 
4663 		#clock-cells = <1>;
64
+
65
+		otg_phy: usb-phy@3c {
66
+			compatible = "ingenic,jz4770-phy";
67
+			reg = <0x3c 0x10>;
68
+
69
+			clocks = <&cgu JZ4770_CLK_OTG_PHY>;
70
+
71
+			#phy-cells = <0>;
72
+		};
73
+	};
74
+
75
+	tcu: timer@10002000 {
76
+		compatible = "ingenic,jz4770-tcu", "simple-mfd";
77
+		reg = <0x10002000 0x1000>;
78
+		#address-cells = <1>;
79
+		#size-cells = <1>;
80
+		ranges = <0x0 0x10002000 0x1000>;
81
+
82
+		#clock-cells = <1>;
83
+
84
+		clocks = <&cgu JZ4770_CLK_RTC>,
85
+			 <&cgu JZ4770_CLK_EXT>,
86
+			 <&cgu JZ4770_CLK_PCLK>;
87
+		clock-names = "rtc", "ext", "pclk";
88
+
89
+		interrupt-controller;
90
+		#interrupt-cells = <1>;
91
+
92
+		interrupt-parent = <&intc>;
93
+		interrupts = <27 26 25>;
94
+
95
+		watchdog: watchdog@0 {
96
+			compatible = "ingenic,jz4770-watchdog",
97
+				     "ingenic,jz4740-watchdog";
98
+			reg = <0x0 0xc>;
99
+
100
+			clocks = <&tcu TCU_CLK_WDT>;
101
+			clock-names = "wdt";
102
+		};
103
+
104
+		pwm: pwm@40 {
105
+			compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
106
+			reg = <0x40 0x80>;
107
+
108
+			#pwm-cells = <3>;
109
+
110
+			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
111
+				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
112
+				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
113
+				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
114
+			clock-names = "timer0", "timer1", "timer2", "timer3",
115
+				      "timer4", "timer5", "timer6", "timer7";
116
+		};
117
+
118
+		ost: timer@e0 {
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+			compatible = "ingenic,jz4770-ost";
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+			reg = <0xe0 0x20>;
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+
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+			clocks = <&tcu TCU_CLK_OST>;
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+			clock-names = "ost";
124
+
125
+			interrupts = <15>;
126
+		};
127
+	};
128
+
129
+	rtc: rtc@10003000 {
130
+		compatible = "ingenic,jz4770-rtc", "ingenic,jz4760-rtc";
131
+		reg = <0x10003000 0x40>;
132
+
133
+		interrupt-parent = <&intc>;
134
+		interrupts = <32>;
47135 	};
48136 
49137 	pinctrl: pin-controller@10010000 {
....@@ -144,6 +232,93 @@
144232 		};
145233 	};
146234 
235
+	aic: audio-controller@10020000 {
236
+		compatible = "ingenic,jz4770-i2s";
237
+		reg = <0x10020000 0x94>;
238
+
239
+		#sound-dai-cells = <0>;
240
+
241
+		clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
242
+			 <&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
243
+		clock-names = "aic", "i2s", "ext", "pll half";
244
+
245
+		interrupt-parent = <&intc>;
246
+		interrupts = <34>;
247
+
248
+		dmas = <&dmac0 25 0xffffffff>, <&dmac0 24 0xffffffff>;
249
+		dma-names = "rx", "tx";
250
+	};
251
+
252
+	codec: audio-codec@100200a0 {
253
+		compatible = "ingenic,jz4770-codec";
254
+		reg = <0x100200a4 0x8>;
255
+
256
+		#sound-dai-cells = <0>;
257
+
258
+		clocks = <&cgu JZ4770_CLK_AIC>;
259
+		clock-names = "aic";
260
+	};
261
+
262
+	mmc0: mmc@10021000 {
263
+		compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
264
+		reg = <0x10021000 0x1000>;
265
+
266
+		clocks = <&cgu JZ4770_CLK_MMC0>;
267
+		clock-names = "mmc";
268
+
269
+		interrupt-parent = <&intc>;
270
+		interrupts = <37>;
271
+
272
+		dmas = <&dmac1 27 0xffffffff>, <&dmac1 26 0xffffffff>;
273
+		dma-names = "rx", "tx";
274
+
275
+		cap-sd-highspeed;
276
+		cap-mmc-highspeed;
277
+		cap-sdio-irq;
278
+
279
+		status = "disabled";
280
+	};
281
+
282
+	mmc1: mmc@10022000 {
283
+		compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
284
+		reg = <0x10022000 0x1000>;
285
+
286
+		clocks = <&cgu JZ4770_CLK_MMC1>;
287
+		clock-names = "mmc";
288
+
289
+		interrupt-parent = <&intc>;
290
+		interrupts = <36>;
291
+
292
+		dmas = <&dmac1 31 0xffffffff>, <&dmac1 30 0xffffffff>;
293
+		dma-names = "rx", "tx";
294
+
295
+		cap-sd-highspeed;
296
+		cap-mmc-highspeed;
297
+		cap-sdio-irq;
298
+
299
+		status = "disabled";
300
+	};
301
+
302
+	mmc2: mmc@10023000 {
303
+		compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
304
+		reg = <0x10023000 0x1000>;
305
+
306
+		clocks = <&cgu JZ4770_CLK_MMC2>;
307
+		clock-names = "mmc";
308
+
309
+		interrupt-parent = <&intc>;
310
+		interrupts = <35>;
311
+
312
+		dmas = <&dmac1 37 0xffffffff>, <&dmac1 36 0xffffffff>;
313
+		dma-names = "rx", "tx";
314
+
315
+		cap-sd-highspeed;
316
+		cap-mmc-highspeed;
317
+		cap-sdio-irq;
318
+
319
+		status = "disabled";
320
+	};
321
+
147322 	uart0: serial@10030000 {
148323 		compatible = "ingenic,jz4770-uart";
149324 		reg = <0x10030000 0x100>;
....@@ -196,6 +371,65 @@
196371 		status = "disabled";
197372 	};
198373 
374
+	adc: adc@10070000 {
375
+		compatible = "ingenic,jz4770-adc";
376
+		reg = <0x10070000 0x30>;
377
+
378
+		#io-channel-cells = <1>;
379
+
380
+		clocks = <&cgu JZ4770_CLK_ADC>;
381
+		clock-names = "adc";
382
+
383
+		interrupt-parent = <&intc>;
384
+		interrupts = <18>;
385
+	};
386
+
387
+	gpu: gpu@13040000 {
388
+		compatible = "vivante,gc";
389
+		reg = <0x13040000 0x10000>;
390
+
391
+		clocks = <&cgu JZ4770_CLK_GPU>,
392
+			 <&cgu JZ4770_CLK_GPU>,
393
+			 <&cgu JZ4770_CLK_GPU>;
394
+		clock-names = "bus", "core", "shader";
395
+
396
+		interrupt-parent = <&intc>;
397
+		interrupts = <6>;
398
+	};
399
+
400
+	lcd: lcd-controller@13050000 {
401
+		compatible = "ingenic,jz4770-lcd";
402
+		reg = <0x13050000 0x300>;
403
+
404
+		interrupt-parent = <&intc>;
405
+		interrupts = <31>;
406
+
407
+		clocks = <&cgu JZ4770_CLK_LPCLK_MUX>;
408
+		clock-names = "lcd_pclk";
409
+	};
410
+
411
+	dmac0: dma-controller@13420000 {
412
+		compatible = "ingenic,jz4770-dma";
413
+		reg = <0x13420000 0xC0>, <0x13420300 0x20>;
414
+
415
+		#dma-cells = <2>;
416
+
417
+		clocks = <&cgu JZ4770_CLK_DMA>;
418
+		interrupt-parent = <&intc>;
419
+		interrupts = <24>;
420
+	};
421
+
422
+	dmac1: dma-controller@13420100 {
423
+		compatible = "ingenic,jz4770-dma";
424
+		reg = <0x13420100 0xC0>, <0x13420400 0x20>;
425
+
426
+		#dma-cells = <2>;
427
+
428
+		clocks = <&cgu JZ4770_CLK_DMA>;
429
+		interrupt-parent = <&intc>;
430
+		interrupts = <23>;
431
+	};
432
+
199433 	uhc: uhc@13430000 {
200434 		compatible = "generic-ohci";
201435 		reg = <0x13430000 0x1000>;
....@@ -209,4 +443,29 @@
209443 
210444 		status = "disabled";
211445 	};
446
+
447
+	usb_otg: usb@13440000 {
448
+		compatible = "ingenic,jz4770-musb";
449
+		reg = <0x13440000 0x10000>;
450
+
451
+		clocks = <&cgu JZ4770_CLK_OTG>;
452
+		clock-names = "udc";
453
+
454
+		interrupt-parent = <&intc>;
455
+		interrupts = <21>;
456
+		interrupt-names = "mc";
457
+
458
+		phys = <&otg_phy>;
459
+
460
+		usb-role-switch;
461
+	};
462
+
463
+	rom: memory@1fc00000 {
464
+		compatible = "mtd-rom";
465
+		probe-type = "map_rom";
466
+		reg = <0x1fc00000 0x2000>;
467
+
468
+		bank-width = <4>;
469
+		device-width = <1>;
470
+	};
212471 };