rtl88x2CE_WiFi_linux add concurrent mode

hc

2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad

 kernel/arch/mips/alchemy/common/setup.c
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@@ -27,6 +27,7 @@
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 #include <linux/init.h>
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 #include <linux/ioport.h>
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+#include <linux/mm.h>
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 #include <asm/dma-coherence.h>
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 #include <asm/mipsregs.h>
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@@ -72,9 +73,9 @@
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 	iomem_resource.end = IOMEM_RESOURCE_END;
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 }
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-#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_PCI)
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+#ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
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 /* This routine should be valid for all Au1x based boards */
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-phys_addr_t __fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
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+phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
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 {
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 	unsigned long start = ALCHEMY_PCI_MEMWIN_START;
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 	unsigned long end = ALCHEMY_PCI_MEMWIN_END;
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@@ -90,5 +91,13 @@
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 	/* default nop */
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 	return phys_addr;
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 }
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-EXPORT_SYMBOL(__fixup_bigphys_addr);
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-#endif
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+
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+int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
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+		unsigned long pfn, unsigned long size, pgprot_t prot)
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+{
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+	phys_addr_t phys_addr = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
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+
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+	return remap_pfn_range(vma, vaddr, phys_addr >> PAGE_SHIFT, size, prot);
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+}
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+EXPORT_SYMBOL(io_remap_pfn_range);
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+#endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */