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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (C) 2012 ARM Ltd. |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms of the GNU General Public License version 2 as |
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| 6 | | - * published by the Free Software Foundation. |
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| 7 | | - * |
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| 8 | | - * This program is distributed in the hope that it will be useful, |
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| 9 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 10 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 11 | | - * GNU General Public License for more details. |
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| 12 | | - * |
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| 13 | | - * You should have received a copy of the GNU General Public License |
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| 14 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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| 15 | 4 | */ |
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| 16 | 5 | #ifndef __ASM_HARDIRQ_H |
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| 17 | 6 | #define __ASM_HARDIRQ_H |
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| .. | .. |
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| 24 | 13 | #include <asm/kvm_arm.h> |
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| 25 | 14 | #include <asm/sysreg.h> |
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| 26 | 15 | |
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| 27 | | -#define NR_IPI 7 |
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| 28 | | - |
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| 29 | 16 | typedef struct { |
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| 30 | 17 | unsigned int __softirq_pending; |
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| 31 | | - unsigned int ipi_irqs[NR_IPI]; |
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| 32 | 18 | } ____cacheline_aligned irq_cpustat_t; |
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| 33 | 19 | |
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| 34 | 20 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ |
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| 35 | | - |
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| 36 | | -#define __inc_irq_stat(cpu, member) __IRQ_STAT(cpu, member)++ |
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| 37 | | -#define __get_irq_stat(cpu, member) __IRQ_STAT(cpu, member) |
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| 38 | | - |
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| 39 | | -u64 smp_irq_stat_cpu(unsigned int cpu); |
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| 40 | | -#define arch_irq_stat_cpu smp_irq_stat_cpu |
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| 41 | 21 | |
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| 42 | 22 | #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 |
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| 43 | 23 | |
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| 44 | 24 | struct nmi_ctx { |
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| 45 | 25 | u64 hcr; |
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| 26 | + unsigned int cnt; |
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| 46 | 27 | }; |
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| 47 | 28 | |
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| 48 | 29 | DECLARE_PER_CPU(struct nmi_ctx, nmi_contexts); |
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| 49 | 30 | |
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| 50 | | -#define arch_nmi_enter() \ |
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| 51 | | - do { \ |
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| 52 | | - if (is_kernel_in_hyp_mode()) { \ |
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| 53 | | - struct nmi_ctx *nmi_ctx = this_cpu_ptr(&nmi_contexts); \ |
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| 54 | | - nmi_ctx->hcr = read_sysreg(hcr_el2); \ |
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| 55 | | - if (!(nmi_ctx->hcr & HCR_TGE)) { \ |
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| 56 | | - write_sysreg(nmi_ctx->hcr | HCR_TGE, hcr_el2); \ |
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| 57 | | - isb(); \ |
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| 58 | | - } \ |
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| 59 | | - } \ |
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| 60 | | - } while (0) |
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| 31 | +#define arch_nmi_enter() \ |
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| 32 | +do { \ |
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| 33 | + struct nmi_ctx *___ctx; \ |
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| 34 | + u64 ___hcr; \ |
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| 35 | + \ |
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| 36 | + if (!is_kernel_in_hyp_mode()) \ |
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| 37 | + break; \ |
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| 38 | + \ |
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| 39 | + ___ctx = this_cpu_ptr(&nmi_contexts); \ |
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| 40 | + if (___ctx->cnt) { \ |
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| 41 | + ___ctx->cnt++; \ |
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| 42 | + break; \ |
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| 43 | + } \ |
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| 44 | + \ |
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| 45 | + ___hcr = read_sysreg(hcr_el2); \ |
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| 46 | + if (!(___hcr & HCR_TGE)) { \ |
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| 47 | + write_sysreg(___hcr | HCR_TGE, hcr_el2); \ |
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| 48 | + isb(); \ |
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| 49 | + } \ |
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| 50 | + /* \ |
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| 51 | + * Make sure the sysreg write is performed before ___ctx->cnt \ |
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| 52 | + * is set to 1. NMIs that see cnt == 1 will rely on us. \ |
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| 53 | + */ \ |
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| 54 | + barrier(); \ |
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| 55 | + ___ctx->cnt = 1; \ |
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| 56 | + /* \ |
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| 57 | + * Make sure ___ctx->cnt is set before we save ___hcr. We \ |
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| 58 | + * don't want ___ctx->hcr to be overwritten. \ |
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| 59 | + */ \ |
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| 60 | + barrier(); \ |
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| 61 | + ___ctx->hcr = ___hcr; \ |
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| 62 | +} while (0) |
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| 61 | 63 | |
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| 62 | | -#define arch_nmi_exit() \ |
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| 63 | | - do { \ |
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| 64 | | - if (is_kernel_in_hyp_mode()) { \ |
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| 65 | | - struct nmi_ctx *nmi_ctx = this_cpu_ptr(&nmi_contexts); \ |
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| 66 | | - if (!(nmi_ctx->hcr & HCR_TGE)) \ |
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| 67 | | - write_sysreg(nmi_ctx->hcr, hcr_el2); \ |
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| 68 | | - } \ |
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| 69 | | - } while (0) |
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| 64 | +#define arch_nmi_exit() \ |
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| 65 | +do { \ |
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| 66 | + struct nmi_ctx *___ctx; \ |
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| 67 | + u64 ___hcr; \ |
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| 68 | + \ |
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| 69 | + if (!is_kernel_in_hyp_mode()) \ |
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| 70 | + break; \ |
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| 71 | + \ |
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| 72 | + ___ctx = this_cpu_ptr(&nmi_contexts); \ |
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| 73 | + ___hcr = ___ctx->hcr; \ |
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| 74 | + /* \ |
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| 75 | + * Make sure we read ___ctx->hcr before we release \ |
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| 76 | + * ___ctx->cnt as it makes ___ctx->hcr updatable again. \ |
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| 77 | + */ \ |
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| 78 | + barrier(); \ |
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| 79 | + ___ctx->cnt--; \ |
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| 80 | + /* \ |
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| 81 | + * Make sure ___ctx->cnt release is visible before we \ |
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| 82 | + * restore the sysreg. Otherwise a new NMI occurring \ |
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| 83 | + * right after write_sysreg() can be fooled and think \ |
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| 84 | + * we secured things for it. \ |
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| 85 | + */ \ |
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| 86 | + barrier(); \ |
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| 87 | + if (!___ctx->cnt && !(___hcr & HCR_TGE)) \ |
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| 88 | + write_sysreg(___hcr, hcr_el2); \ |
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| 89 | +} while (0) |
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| 70 | 90 | |
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| 71 | 91 | static inline void ack_bad_irq(unsigned int irq) |
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| 72 | 92 | { |
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