forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-09-20 cf4ce59b3b70238352c7f1729f0f7223214828ad 
 kernel/arch/arm/boot/dts/stm32f429.dtsi
....@@ -45,12 +45,14 @@
4545  *     OTHER DEALINGS IN THE SOFTWARE.
4646  */
4747 
48
-#include "skeleton.dtsi"
4948 #include "armv7-m.dtsi"
5049 #include <dt-bindings/clock/stm32fx-clock.h>
5150 #include <dt-bindings/mfd/stm32f4-rcc.h>
5251 
5352 / {
53
+	#address-cells = <1>;
54
+	#size-cells = <1>;
55
+
5456 	clocks {
5557 		clk_hse: clk-hse {
5658 			#clock-cells = <0>;
....@@ -58,7 +60,7 @@
5860 			clock-frequency = <0>;
5961 		};
6062 
61
-		clk-lse {
63
+		clk_lse: clk-lse {
6264 			#clock-cells = <0>;
6365 			compatible = "fixed-clock";
6466 			clock-frequency = <32768>;
....@@ -78,6 +80,19 @@
7880 	};
7981 
8082 	soc {
83
+		romem: efuse@1fff7800 {
84
+			compatible = "st,stm32f4-otp";
85
+			reg = <0x1fff7800 0x400>;
86
+			#address-cells = <1>;
87
+			#size-cells = <1>;
88
+			ts_cal1: calib@22c {
89
+				reg = <0x22c 0x2>;
90
+			};
91
+			ts_cal2: calib@22e {
92
+				reg = <0x22e 0x2>;
93
+			};
94
+		};
95
+
8196 		timer2: timer@40000000 {
8297 			compatible = "st,stm32-timer";
8398 			reg = <0x40000000 0x400>;
....@@ -97,6 +112,7 @@
97112 
98113 			pwm {
99114 				compatible = "st,stm32-pwm";
115
+				#pwm-cells = <3>;
100116 				status = "disabled";
101117 			};
102118 
....@@ -126,6 +142,7 @@
126142 
127143 			pwm {
128144 				compatible = "st,stm32-pwm";
145
+				#pwm-cells = <3>;
129146 				status = "disabled";
130147 			};
131148 
....@@ -155,6 +172,7 @@
155172 
156173 			pwm {
157174 				compatible = "st,stm32-pwm";
175
+				#pwm-cells = <3>;
158176 				status = "disabled";
159177 			};
160178 
....@@ -183,6 +201,7 @@
183201 
184202 			pwm {
185203 				compatible = "st,stm32-pwm";
204
+				#pwm-cells = <3>;
186205 				status = "disabled";
187206 			};
188207 
....@@ -252,6 +271,7 @@
252271 
253272 			pwm {
254273 				compatible = "st,stm32-pwm";
274
+				#pwm-cells = <3>;
255275 				status = "disabled";
256276 			};
257277 
....@@ -271,6 +291,7 @@
271291 
272292 			pwm {
273293 				compatible = "st,stm32-pwm";
294
+				#pwm-cells = <3>;
274295 				status = "disabled";
275296 			};
276297 		};
....@@ -284,6 +305,7 @@
284305 
285306 			pwm {
286307 				compatible = "st,stm32-pwm";
308
+				#pwm-cells = <3>;
287309 				status = "disabled";
288310 			};
289311 		};
....@@ -292,12 +314,10 @@
292314 			compatible = "st,stm32-rtc";
293315 			reg = <0x40002800 0x400>;
294316 			clocks = <&rcc 1 CLK_RTC>;
295
-			clock-names = "ck_rtc";
296317 			assigned-clocks = <&rcc 1 CLK_RTC>;
297318 			assigned-clock-parents = <&rcc 1 CLK_LSE>;
298319 			interrupt-parent = <&exti>;
299320 			interrupts = <17 1>;
300
-			interrupt-names = "alarm";
301321 			st,syscfg = <&pwrcfg 0x00 0x100>;
302322 			status = "disabled";
303323 		};
....@@ -307,6 +327,26 @@
307327 			reg = <0x40003000 0x400>;
308328 			clocks = <&clk_lsi>;
309329 			clock-names = "lsi";
330
+			status = "disabled";
331
+		};
332
+
333
+		spi2: spi@40003800 {
334
+			#address-cells = <1>;
335
+			#size-cells = <0>;
336
+			compatible = "st,stm32f4-spi";
337
+			reg = <0x40003800 0x400>;
338
+			interrupts = <36>;
339
+			clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI2)>;
340
+			status = "disabled";
341
+		};
342
+
343
+		spi3: spi@40003c00 {
344
+			#address-cells = <1>;
345
+			#size-cells = <0>;
346
+			compatible = "st,stm32f4-spi";
347
+			reg = <0x40003c00 0x400>;
348
+			interrupts = <51>;
349
+			clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI3)>;
310350 			status = "disabled";
311351 		};
312352 
....@@ -357,6 +397,18 @@
357397 			status = "disabled";
358398 		};
359399 
400
+		i2c3: i2c@40005c00 {
401
+			compatible = "st,stm32f4-i2c";
402
+			reg = <0x40005c00 0x400>;
403
+			interrupts = <72>,
404
+				     <73>;
405
+			resets = <&rcc STM32F4_APB1_RESET(I2C3)>;
406
+			clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>;
407
+			#address-cells = <1>;
408
+			#size-cells = <0>;
409
+			status = "disabled";
410
+		};
411
+
360412 		dac: dac@40007400 {
361413 			compatible = "st,stm32f4-dac-core";
362414 			reg = <0x40007400 0x400>;
....@@ -369,14 +421,14 @@
369421 
370422 			dac1: dac@1 {
371423 				compatible = "st,stm32-dac";
372
-				#io-channels-cells = <1>;
424
+				#io-channel-cells = <1>;
373425 				reg = <1>;
374426 				status = "disabled";
375427 			};
376428 
377429 			dac2: dac@2 {
378430 				compatible = "st,stm32-dac";
379
-				#io-channels-cells = <1>;
431
+				#io-channel-cells = <1>;
380432 				reg = <2>;
381433 				status = "disabled";
382434 			};
....@@ -409,6 +461,7 @@
409461 
410462 			pwm {
411463 				compatible = "st,stm32-pwm";
464
+				#pwm-cells = <3>;
412465 				status = "disabled";
413466 			};
414467 
....@@ -430,6 +483,7 @@
430483 
431484 			pwm {
432485 				compatible = "st,stm32-pwm";
486
+				#pwm-cells = <3>;
433487 				status = "disabled";
434488 			};
435489 
....@@ -519,8 +573,28 @@
519573 			status = "disabled";
520574 		};
521575 
522
-		syscfg: system-config@40013800 {
523
-			compatible = "syscon";
576
+		spi1: spi@40013000 {
577
+			#address-cells = <1>;
578
+			#size-cells = <0>;
579
+			compatible = "st,stm32f4-spi";
580
+			reg = <0x40013000 0x400>;
581
+			interrupts = <35>;
582
+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI1)>;
583
+			status = "disabled";
584
+		};
585
+
586
+		spi4: spi@40013400 {
587
+			#address-cells = <1>;
588
+			#size-cells = <0>;
589
+			compatible = "st,stm32f4-spi";
590
+			reg = <0x40013400 0x400>;
591
+			interrupts = <84>;
592
+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI4)>;
593
+			status = "disabled";
594
+		};
595
+
596
+		syscfg: syscon@40013800 {
597
+			compatible = "st,stm32-syscfg", "syscon";
524598 			reg = <0x40013800 0x400>;
525599 		};
526600 
....@@ -543,6 +617,7 @@
543617 
544618 			pwm {
545619 				compatible = "st,stm32-pwm";
620
+				#pwm-cells = <3>;
546621 				status = "disabled";
547622 			};
548623 
....@@ -562,6 +637,7 @@
562637 
563638 			pwm {
564639 				compatible = "st,stm32-pwm";
640
+				#pwm-cells = <3>;
565641 				status = "disabled";
566642 			};
567643 		};
....@@ -575,12 +651,36 @@
575651 
576652 			pwm {
577653 				compatible = "st,stm32-pwm";
654
+				#pwm-cells = <3>;
578655 				status = "disabled";
579656 			};
580657 		};
581658 
659
+		spi5: spi@40015000 {
660
+			#address-cells = <1>;
661
+			#size-cells = <0>;
662
+			compatible = "st,stm32f4-spi";
663
+			reg = <0x40015000 0x400>;
664
+			interrupts = <85>;
665
+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>;
666
+			dmas = <&dma2 3 2 0x400 0x0>,
667
+				<&dma2 4 2 0x400 0x0>;
668
+			dma-names = "rx", "tx";
669
+			status = "disabled";
670
+		};
671
+
672
+		spi6: spi@40015400 {
673
+			#address-cells = <1>;
674
+			#size-cells = <0>;
675
+			compatible = "st,stm32f4-spi";
676
+			reg = <0x40015400 0x400>;
677
+			interrupts = <86>;
678
+			clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI6)>;
679
+			status = "disabled";
680
+		};
681
+
582682 		pwrcfg: power-config@40007000 {
583
-			compatible = "syscon";
683
+			compatible = "st,stm32-power-config", "syscon";
584684 			reg = <0x40007000 0x400>;
585685 		};
586686 
....@@ -694,7 +794,6 @@
694794 		rng: rng@50060800 {
695795 			compatible = "st,stm32-rng";
696796 			reg = <0x50060800 0x400>;
697
-			interrupts = <80>;
698797 			clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
699798 
700799 		};