forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8 
 kernel/drivers/tty/serial/8250/8250_port.c
....@@ -11,15 +11,13 @@
1111  *  membase is an 'ioremapped' cookie.
1212  */
1313 
14
-#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15
-#define SUPPORT_SYSRQ
16
-#endif
17
-
1814 #include <linux/module.h>
1915 #include <linux/moduleparam.h>
2016 #include <linux/ioport.h>
2117 #include <linux/init.h>
18
+#include <linux/irq.h>
2219 #include <linux/console.h>
20
+#include <linux/gpio/consumer.h>
2321 #include <linux/sysrq.h>
2422 #include <linux/delay.h>
2523 #include <linux/platform_device.h>
....@@ -40,13 +38,6 @@
4038 
4139 #include "8250.h"
4240 
43
-/*
44
- * These are definitions for the Exar XR17V35X and XR17(C|D)15X
45
- */
46
-#define UART_EXAR_INT0		0x80
47
-#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
48
-#define UART_EXAR_DVID		0x8d	/* Device identification */
49
-
5041 /* Nuvoton NPCM timeout register */
5142 #define UART_NPCM_TOR          7
5243 #define UART_NPCM_TOIE         BIT(7)  /* Timeout Interrupt Enable */
....@@ -66,6 +57,7 @@
6657  * Here we define the default xmit fifo size used for each type of UART.
6758  */
6859 static const struct serial8250_config uart_config[] = {
60
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
6961 	[PORT_UNKNOWN] = {
7062 		.name		= "unknown",
7163 		.fifo_size	= 1,
....@@ -86,6 +78,7 @@
8678 		.fifo_size	= 1,
8779 		.tx_loadsz	= 1,
8880 	},
81
+#endif
8982 	[PORT_16550A] = {
9083 		.name		= "16550A",
9184 		.fifo_size	= 16,
....@@ -94,6 +87,7 @@
9487 		.rxtrig_bytes	= {1, 4, 8, 14},
9588 		.flags		= UART_CAP_FIFO,
9689 	},
90
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
9791 	[PORT_CIRRUS] = {
9892 		.name		= "Cirrus",
9993 		.fifo_size	= 1,
....@@ -309,6 +303,15 @@
309303 		.rxtrig_bytes	= {1, 4, 8, 14},
310304 		.flags		= UART_CAP_FIFO,
311305 	},
306
+	[PORT_SUNIX] = {
307
+		.name		= "Sunix",
308
+		.fifo_size	= 128,
309
+		.tx_loadsz	= 128,
310
+		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
311
+		.rxtrig_bytes	= {1, 32, 64, 112},
312
+		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP,
313
+	},
314
+#endif
312315 };
313316 
314317 /* Uart divisor latch read */
....@@ -386,6 +389,7 @@
386389 
387390 #endif
388391 
392
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
389393 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
390394 {
391395 	offset = offset << p->regshift;
....@@ -459,6 +463,7 @@
459463 	offset = offset << p->regshift;
460464 	outb(value, p->iobase + offset);
461465 }
466
+#endif
462467 
463468 static int serial8250_default_handle_irq(struct uart_port *port);
464469 
....@@ -469,6 +474,7 @@
469474 	up->dl_read = default_serial_dl_read;
470475 	up->dl_write = default_serial_dl_write;
471476 
477
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
472478 	switch (p->iotype) {
473479 	case UPIO_HUB6:
474480 		p->serial_in = hub6_serial_in;
....@@ -509,6 +515,7 @@
509515 		p->serial_out = io_serial_out;
510516 		break;
511517 	}
518
+#endif
512519 	/* Remember loaded iotype */
513520 	up->cur_iotype = p->iotype;
514521 	p->handle_irq = serial8250_default_handle_irq;
....@@ -532,27 +539,6 @@
532539 }
533540 
534541 /*
535
- * For the 16C950
536
- */
537
-static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
538
-{
539
-	serial_out(up, UART_SCR, offset);
540
-	serial_out(up, UART_ICR, value);
541
-}
542
-
543
-static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
544
-{
545
-	unsigned int value;
546
-
547
-	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
548
-	serial_out(up, UART_SCR, offset);
549
-	value = serial_in(up, UART_ICR);
550
-	serial_icr_write(up, UART_ACR, up->acr);
551
-
552
-	return value;
553
-}
554
-
555
-/*
556542  * FIFO support.
557543  */
558544 static void serial8250_clear_fifos(struct uart_8250_port *p)
....@@ -563,17 +549,6 @@
563549 			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
564550 		serial_out(p, UART_FCR, 0);
565551 	}
566
-}
567
-
568
-static inline void serial8250_em485_rts_after_send(struct uart_8250_port *p)
569
-{
570
-	unsigned char mcr = serial8250_in_MCR(p);
571
-
572
-	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
573
-		mcr |= UART_MCR_RTS;
574
-	else
575
-		mcr &= ~UART_MCR_RTS;
576
-	serial8250_out_MCR(p, mcr);
577552 }
578553 
579554 static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t);
....@@ -623,10 +598,10 @@
623598  *
624599  *	Return 0 - success, -errno - otherwise
625600  */
626
-int serial8250_em485_init(struct uart_8250_port *p)
601
+static int serial8250_em485_init(struct uart_8250_port *p)
627602 {
628603 	if (p->em485)
629
-		return 0;
604
+		goto deassert_rts;
630605 
631606 	p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC);
632607 	if (!p->em485)
....@@ -640,11 +615,14 @@
640615 	p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx;
641616 	p->em485->port = p;
642617 	p->em485->active_timer = NULL;
643
-	serial8250_em485_rts_after_send(p);
618
+	p->em485->tx_stopped = true;
619
+
620
+deassert_rts:
621
+	if (p->em485->tx_stopped)
622
+		p->rs485_stop_tx(p);
644623 
645624 	return 0;
646625 }
647
-EXPORT_SYMBOL_GPL(serial8250_em485_init);
648626 
649627 /**
650628  *	serial8250_em485_destroy() - put uart_8250_port into normal state
....@@ -671,6 +649,41 @@
671649 	p->em485 = NULL;
672650 }
673651 EXPORT_SYMBOL_GPL(serial8250_em485_destroy);
652
+
653
+/**
654
+ * serial8250_em485_config() - generic ->rs485_config() callback
655
+ * @port: uart port
656
+ * @rs485: rs485 settings
657
+ *
658
+ * Generic callback usable by 8250 uart drivers to activate rs485 settings
659
+ * if the uart is incapable of driving RTS as a Transmit Enable signal in
660
+ * hardware, relying on software emulation instead.
661
+ */
662
+int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485)
663
+{
664
+	struct uart_8250_port *up = up_to_u8250p(port);
665
+
666
+	/* pick sane settings if the user hasn't */
667
+	if (!!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
668
+	    !!(rs485->flags & SER_RS485_RTS_AFTER_SEND)) {
669
+		rs485->flags |= SER_RS485_RTS_ON_SEND;
670
+		rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
671
+	}
672
+
673
+	gpiod_set_value(port->rs485_term_gpio,
674
+			rs485->flags & SER_RS485_TERMINATE_BUS);
675
+
676
+	/*
677
+	 * Both serial8250_em485_init() and serial8250_em485_destroy()
678
+	 * are idempotent.
679
+	 */
680
+	if (rs485->flags & SER_RS485_ENABLED)
681
+		return serial8250_em485_init(up);
682
+
683
+	serial8250_em485_destroy(up);
684
+	return 0;
685
+}
686
+EXPORT_SYMBOL_GPL(serial8250_em485_config);
674687 
675688 /*
676689  * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
....@@ -714,19 +727,8 @@
714727 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
715728 {
716729 	unsigned char lcr = 0, efr = 0;
717
-	/*
718
-	 * Exar UARTs have a SLEEP register that enables or disables
719
-	 * each UART to enter sleep mode separately.  On the XR17V35x the
720
-	 * register is accessible to each UART at the UART_EXAR_SLEEP
721
-	 * offset but the UART channel may only write to the corresponding
722
-	 * bit.
723
-	 */
730
+
724731 	serial8250_rpm_get(p);
725
-	if ((p->port.type == PORT_XR17V35X) ||
726
-	   (p->port.type == PORT_XR17D15X)) {
727
-		serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
728
-		goto out;
729
-	}
730732 
731733 	if (p->capabilities & UART_CAP_SLEEP) {
732734 		if (p->capabilities & UART_CAP_EFR) {
....@@ -743,7 +745,7 @@
743745 			serial_out(p, UART_LCR, lcr);
744746 		}
745747 	}
746
-out:
748
+
747749 	serial8250_rpm_put(p);
748750 }
749751 
....@@ -1016,26 +1018,8 @@
10161018 	up->port.type = PORT_16550A;
10171019 	up->capabilities |= UART_CAP_FIFO;
10181020 
1019
-	/*
1020
-	 * XR17V35x UARTs have an extra divisor register, DLD
1021
-	 * that gets enabled with when DLAB is set which will
1022
-	 * cause the device to incorrectly match and assign
1023
-	 * port type to PORT_16650.  The EFR for this UART is
1024
-	 * found at offset 0x09. Instead check the Deice ID (DVID)
1025
-	 * register for a 2, 4 or 8 port UART.
1026
-	 */
1027
-	if (up->port.flags & UPF_EXAR_EFR) {
1028
-		status1 = serial_in(up, UART_EXAR_DVID);
1029
-		if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
1030
-			DEBUG_AUTOCONF("Exar XR17V35x ");
1031
-			up->port.type = PORT_XR17V35X;
1032
-			up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1033
-						UART_CAP_SLEEP;
1034
-
1035
-			return;
1036
-		}
1037
-
1038
-	}
1021
+	if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS))
1022
+		return;
10391023 
10401024 	/*
10411025 	 * Check for presence of the EFR when DLAB is set.
....@@ -1174,18 +1158,6 @@
11741158 		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
11751159 	}
11761160 	serial_out(up, UART_IER, iersave);
1177
-
1178
-	/*
1179
-	 * Exar uarts have EFR in a weird location
1180
-	 */
1181
-	if (up->port.flags & UPF_EXAR_EFR) {
1182
-		DEBUG_AUTOCONF("Exar XR17D15x ");
1183
-		up->port.type = PORT_XR17D15X;
1184
-		up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1185
-				    UART_CAP_SLEEP;
1186
-
1187
-		return;
1188
-	}
11891161 
11901162 	/*
11911163 	 * We distinguish between 16550A and U6 16550A by counting
....@@ -1369,8 +1341,8 @@
13691341 		fintek_8250_probe(up);
13701342 
13711343 	if (up->capabilities != old_capabilities) {
1372
-		pr_warn("%s: detected caps %08x should be %08x\n",
1373
-			port->name, old_capabilities, up->capabilities);
1344
+		dev_warn(port->dev, "detected caps %08x should be %08x\n",
1345
+			 old_capabilities, up->capabilities);
13741346 	}
13751347 out:
13761348 	DEBUG_AUTOCONF("iir=%d ", scratch);
....@@ -1445,9 +1417,21 @@
14451417 	serial8250_rpm_put(up);
14461418 }
14471419 
1448
-static void __do_stop_tx_rs485(struct uart_8250_port *p)
1420
+/**
1421
+ * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1422
+ * @p: uart 8250 port
1423
+ *
1424
+ * Generic callback usable by 8250 uart drivers to stop rs485 transmission.
1425
+ */
1426
+void serial8250_em485_stop_tx(struct uart_8250_port *p)
14491427 {
1450
-	serial8250_em485_rts_after_send(p);
1428
+	unsigned char mcr = serial8250_in_MCR(p);
1429
+
1430
+	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
1431
+		mcr |= UART_MCR_RTS;
1432
+	else
1433
+		mcr &= ~UART_MCR_RTS;
1434
+	serial8250_out_MCR(p, mcr);
14511435 
14521436 	/*
14531437 	 * Empty the RX FIFO, we are not interested in anything
....@@ -1461,6 +1445,8 @@
14611445 		serial_port_out(&p->port, UART_IER, p->ier);
14621446 	}
14631447 }
1448
+EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx);
1449
+
14641450 static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t)
14651451 {
14661452 	struct uart_8250_em485 *em485;
....@@ -1473,8 +1459,9 @@
14731459 	serial8250_rpm_get(p);
14741460 	spin_lock_irqsave(&p->port.lock, flags);
14751461 	if (em485->active_timer == &em485->stop_tx_timer) {
1476
-		__do_stop_tx_rs485(p);
1462
+		p->rs485_stop_tx(p);
14771463 		em485->active_timer = NULL;
1464
+		em485->tx_stopped = true;
14781465 	}
14791466 	spin_unlock_irqrestore(&p->port.lock, flags);
14801467 	serial8250_rpm_put(p);
....@@ -1495,7 +1482,7 @@
14951482 	struct uart_8250_em485 *em485 = p->em485;
14961483 
14971484 	/*
1498
-	 * __do_stop_tx_rs485 is going to set RTS according to config
1485
+	 * rs485_stop_tx() is going to set RTS according to config
14991486 	 * AND flush RX FIFO if required.
15001487 	 */
15011488 	if (p->port.rs485.delay_rts_after_send > 0) {
....@@ -1503,20 +1490,16 @@
15031490 		start_hrtimer_ms(&em485->stop_tx_timer,
15041491 				   p->port.rs485.delay_rts_after_send);
15051492 	} else {
1506
-		__do_stop_tx_rs485(p);
1493
+		p->rs485_stop_tx(p);
1494
+		em485->active_timer = NULL;
1495
+		em485->tx_stopped = true;
15071496 	}
15081497 }
15091498 
15101499 static inline void __do_stop_tx(struct uart_8250_port *p)
15111500 {
1512
-	if (p->ier & UART_IER_THRI) {
1513
-		p->ier &= ~UART_IER_THRI;
1514
-#ifdef CONFIG_ARCH_ROCKCHIP
1515
-		p->ier &= ~UART_IER_PTIME;
1516
-#endif
1517
-		serial_out(p, UART_IER, p->ier);
1501
+	if (serial8250_clear_THRI(p))
15181502 		serial8250_rpm_put_tx(p);
1519
-	}
15201503 }
15211504 
15221505 static inline void __stop_tx(struct uart_8250_port *p)
....@@ -1525,6 +1508,8 @@
15251508 
15261509 	if (em485) {
15271510 		unsigned char lsr = serial_in(p, UART_LSR);
1511
+		p->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1512
+
15281513 		/*
15291514 		 * To provide required timeing and allow FIFO transfer,
15301515 		 * __stop_tx_rs485() must be called only when both FIFO and
....@@ -1533,8 +1518,6 @@
15331518 		 */
15341519 		if ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
15351520 			return;
1536
-
1537
-		em485->active_timer = NULL;
15381521 
15391522 		__stop_tx_rs485(p);
15401523 	}
....@@ -1570,13 +1553,7 @@
15701553 		return;
15711554 #endif
15721555 
1573
-	if (!(up->ier & UART_IER_THRI)) {
1574
-		up->ier |= UART_IER_THRI;
1575
-#ifdef CONFIG_ARCH_ROCKCHIP
1576
-		up->ier |= UART_IER_PTIME;
1577
-#endif
1578
-		serial_port_out(port, UART_IER, up->ier);
1579
-
1556
+	if (serial8250_set_THRI(up)) {
15801557 		if (up->bugs & UART_BUG_TXEN) {
15811558 			unsigned char lsr;
15821559 
....@@ -1596,25 +1573,54 @@
15961573 	}
15971574 }
15981575 
1599
-static inline void start_tx_rs485(struct uart_port *port)
1576
+/**
1577
+ * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1578
+ * @up: uart 8250 port
1579
+ *
1580
+ * Generic callback usable by 8250 uart drivers to start rs485 transmission.
1581
+ * Assumes that setting the RTS bit in the MCR register means RTS is high.
1582
+ * (Some chips use inverse semantics.)  Further assumes that reception is
1583
+ * stoppable by disabling the UART_IER_RDI interrupt.  (Some chips set the
1584
+ * UART_LSR_DR bit even when UART_IER_RDI is disabled, foiling this approach.)
1585
+ */
1586
+void serial8250_em485_start_tx(struct uart_8250_port *up)
16001587 {
1601
-	struct uart_8250_port *up = up_to_u8250p(port);
1602
-	struct uart_8250_em485 *em485 = up->em485;
1603
-	unsigned char mcr;
1588
+	unsigned char mcr = serial8250_in_MCR(up);
16041589 
16051590 	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX))
16061591 		serial8250_stop_rx(&up->port);
16071592 
1593
+	if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1594
+		mcr |= UART_MCR_RTS;
1595
+	else
1596
+		mcr &= ~UART_MCR_RTS;
1597
+	serial8250_out_MCR(up, mcr);
1598
+}
1599
+EXPORT_SYMBOL_GPL(serial8250_em485_start_tx);
1600
+
1601
+static inline void start_tx_rs485(struct uart_port *port)
1602
+{
1603
+	struct uart_8250_port *up = up_to_u8250p(port);
1604
+	struct uart_8250_em485 *em485 = up->em485;
1605
+
1606
+	/*
1607
+	 * While serial8250_em485_handle_stop_tx() is a noop if
1608
+	 * em485->active_timer != &em485->stop_tx_timer, it might happen that
1609
+	 * the timer is still armed and triggers only after the current bunch of
1610
+	 * chars is send and em485->active_timer == &em485->stop_tx_timer again.
1611
+	 * So cancel the timer. There is still a theoretical race condition if
1612
+	 * the timer is already running and only comes around to check for
1613
+	 * em485->active_timer when &em485->stop_tx_timer is armed again.
1614
+	 */
1615
+	if (em485->active_timer == &em485->stop_tx_timer)
1616
+		hrtimer_try_to_cancel(&em485->stop_tx_timer);
1617
+
16081618 	em485->active_timer = NULL;
16091619 
1610
-	mcr = serial8250_in_MCR(up);
1611
-	if (!!(up->port.rs485.flags & SER_RS485_RTS_ON_SEND) !=
1612
-	    !!(mcr & UART_MCR_RTS)) {
1613
-		if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1614
-			mcr |= UART_MCR_RTS;
1615
-		else
1616
-			mcr &= ~UART_MCR_RTS;
1617
-		serial8250_out_MCR(up, mcr);
1620
+	if (em485->tx_stopped) {
1621
+		em485->tx_stopped = false;
1622
+
1623
+		up->rs485_start_tx(up);
16181624 
16191625 		if (up->port.rs485.delay_rts_before_send > 0) {
16201626 			em485->active_timer = &em485->start_tx_timer;
....@@ -1680,6 +1686,8 @@
16801686 	if (up->bugs & UART_BUG_NOMSR)
16811687 		return;
16821688 
1689
+	mctrl_gpio_disable_ms(up->gpios);
1690
+
16831691 	up->ier &= ~UART_IER_MSI;
16841692 	serial_port_out(port, UART_IER, up->ier);
16851693 }
....@@ -1691,6 +1699,8 @@
16911699 	/* no MSR capabilities */
16921700 	if (up->bugs & UART_BUG_NOMSR)
16931701 		return;
1702
+
1703
+	mctrl_gpio_enable_ms(up->gpios);
16941704 
16951705 	up->ier |= UART_IER_MSI;
16961706 
....@@ -1747,14 +1757,14 @@
17471757 		lsr &= port->read_status_mask;
17481758 
17491759 		if (lsr & UART_LSR_BI) {
1750
-			pr_debug("%s: handling break\n", __func__);
1760
+			dev_dbg(port->dev, "handling break\n");
17511761 			flag = TTY_BREAK;
17521762 		} else if (lsr & UART_LSR_PE)
17531763 			flag = TTY_PARITY;
17541764 		else if (lsr & UART_LSR_FE)
17551765 			flag = TTY_FRAME;
17561766 	}
1757
-	if (uart_handle_sysrq_char(port, ch))
1767
+	if (uart_prepare_sysrq_char(port, ch))
17581768 		return;
17591769 
17601770 	uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
....@@ -1790,9 +1800,7 @@
17901800 	int count;
17911801 
17921802 	if (port->x_char) {
1793
-		serial_out(up, UART_TX, port->x_char);
1794
-		port->icount.tx++;
1795
-		port->x_char = 0;
1803
+		uart_xchar_out(port, UART_TX);
17961804 		return;
17971805 	}
17981806 	if (uart_tx_stopped(port)) {
....@@ -1807,6 +1815,18 @@
18071815 	count = up->tx_loadsz;
18081816 	do {
18091817 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1818
+		if (up->bugs & UART_BUG_TXRACE) {
1819
+			/*
1820
+			 * The Aspeed BMC virtual UARTs have a bug where data
1821
+			 * may get stuck in the BMC's Tx FIFO from bursts of
1822
+			 * writes on the APB interface.
1823
+			 *
1824
+			 * Delay back-to-back writes by a read cycle to avoid
1825
+			 * stalling the VUART. Read a register that won't have
1826
+			 * side-effects and discard the result.
1827
+			 */
1828
+			serial_in(up, UART_SCR);
1829
+		}
18101830 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
18111831 		port->icount.tx++;
18121832 		if (uart_circ_empty(xmit))
....@@ -1868,10 +1888,13 @@
18681888 		return up->dma->rx_dma(up);
18691889 #else
18701890 	switch (iir & 0x3f) {
1891
+	case UART_IIR_RDI:
1892
+		if (!up->dma->rx_running)
1893
+			break;
1894
+		fallthrough;
1895
+	case UART_IIR_RLSI:
18711896 	case UART_IIR_RX_TIMEOUT:
18721897 		serial8250_rx_dma_flush(up);
1873
-		/* fall-through */
1874
-	case UART_IIR_RLSI:
18751898 		return true;
18761899 	}
18771900 	return up->dma->rx_dma(up);
....@@ -1886,7 +1909,10 @@
18861909 	unsigned char status;
18871910 	unsigned long flags;
18881911 	struct uart_8250_port *up = up_to_u8250p(port);
1912
+#ifndef CONFIG_ARCH_ROCKCHIP
1913
+	struct tty_port *tport = &port->state->port;
18891914 	bool skip_rx = false;
1915
+#endif
18901916 
18911917 	if (iir & UART_IIR_NO_INT)
18921918 		return 0;
....@@ -1895,6 +1921,17 @@
18951921 
18961922 	status = serial_port_in(port, UART_LSR);
18971923 
1924
+#ifdef CONFIG_ARCH_ROCKCHIP
1925
+	if (status & (UART_LSR_DR | UART_LSR_BI)) {
1926
+		int dma_err = -1;
1927
+
1928
+		if (up->dma && up->dma->rxchan)
1929
+			dma_err = handle_rx_dma(up, iir);
1930
+
1931
+		if (!up->dma || dma_err)
1932
+			status = serial8250_rx_chars(up, status);
1933
+	}
1934
+#else
18981935 	/*
18991936 	 * If port is stopped and there are no error conditions in the
19001937 	 * FIFO, then don't drain the FIFO, as this may lead to TTY buffer
....@@ -1909,27 +1946,23 @@
19091946 		skip_rx = true;
19101947 
19111948 	if (status & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
1912
-#ifdef CONFIG_ARCH_ROCKCHIP
1913
-		int dma_err = -1;
1949
+		struct irq_data *d;
19141950 
1915
-		if (up->dma && up->dma->rxchan)
1916
-			dma_err = handle_rx_dma(up, iir);
1917
-
1918
-		if (!up->dma || dma_err)
1919
-			status = serial8250_rx_chars(up, status);
1920
-#else
1951
+		d = irq_get_irq_data(port->irq);
1952
+		if (d && irqd_is_wakeup_set(d))
1953
+			pm_wakeup_event(tport->tty->dev, 0);
19211954 		if (!up->dma || handle_rx_dma(up, iir))
19221955 			status = serial8250_rx_chars(up, status);
1923
-#endif
19241956 	}
1957
+#endif
19251958 	serial8250_modem_status(up);
19261959 #ifdef CONFIG_ARCH_ROCKCHIP
19271960 	if ((!up->dma || (up->dma && (!up->dma->txchan || up->dma->tx_err))) &&
19281961 	    ((iir & 0xf) == UART_IIR_THRI))
19291962 		serial8250_tx_chars(up);
19301963 #else
1931
-	if ((!up->dma || up->dma->tx_err) && (status & UART_LSR_THRE) &&
1932
-		(up->ier & UART_IER_THRI))
1964
+	if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1965
+	    (status & UART_LSR_THRE))
19331966 		serial8250_tx_chars(up);
19341967 #endif
19351968 
....@@ -1949,7 +1982,7 @@
19491982 			port->name);
19501983 	}
19511984 #endif
1952
-	spin_unlock_irqrestore(&port->lock, flags);
1985
+	uart_unlock_and_check_sysrq(port, flags);
19531986 	return 1;
19541987 }
19551988 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
....@@ -1996,41 +2029,42 @@
19962029 static unsigned int serial8250_tx_empty(struct uart_port *port)
19972030 {
19982031 	struct uart_8250_port *up = up_to_u8250p(port);
2032
+	unsigned int result = 0;
19992033 	unsigned long flags;
20002034 	unsigned int lsr;
20012035 
20022036 	serial8250_rpm_get(up);
20032037 
20042038 	spin_lock_irqsave(&port->lock, flags);
2005
-	lsr = serial_port_in(port, UART_LSR);
2006
-	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
2039
+	if (!serial8250_tx_dma_running(up)) {
2040
+		lsr = serial_port_in(port, UART_LSR);
2041
+		up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
2042
+
2043
+		if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
2044
+			result = TIOCSER_TEMT;
2045
+	}
20072046 	spin_unlock_irqrestore(&port->lock, flags);
20082047 
20092048 	serial8250_rpm_put(up);
20102049 
2011
-	return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
2050
+	return result;
20122051 }
20132052 
20142053 unsigned int serial8250_do_get_mctrl(struct uart_port *port)
20152054 {
20162055 	struct uart_8250_port *up = up_to_u8250p(port);
20172056 	unsigned int status;
2018
-	unsigned int ret;
2057
+	unsigned int val;
20192058 
20202059 	serial8250_rpm_get(up);
20212060 	status = serial8250_modem_status(up);
20222061 	serial8250_rpm_put(up);
20232062 
2024
-	ret = 0;
2025
-	if (status & UART_MSR_DCD)
2026
-		ret |= TIOCM_CAR;
2027
-	if (status & UART_MSR_RI)
2028
-		ret |= TIOCM_RNG;
2029
-	if (status & UART_MSR_DSR)
2030
-		ret |= TIOCM_DSR;
2031
-	if (status & UART_MSR_CTS)
2032
-		ret |= TIOCM_CTS;
2033
-	return ret;
2063
+	val = serial8250_MSR_to_TIOCM(status);
2064
+	if (up->gpios)
2065
+		return mctrl_gpio_get(up->gpios, &val);
2066
+
2067
+	return val;
20342068 }
20352069 EXPORT_SYMBOL_GPL(serial8250_do_get_mctrl);
20362070 
....@@ -2044,18 +2078,9 @@
20442078 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
20452079 {
20462080 	struct uart_8250_port *up = up_to_u8250p(port);
2047
-	unsigned char mcr = 0;
2081
+	unsigned char mcr;
20482082 
2049
-	if (mctrl & TIOCM_RTS)
2050
-		mcr |= UART_MCR_RTS;
2051
-	if (mctrl & TIOCM_DTR)
2052
-		mcr |= UART_MCR_DTR;
2053
-	if (mctrl & TIOCM_OUT1)
2054
-		mcr |= UART_MCR_OUT1;
2055
-	if (mctrl & TIOCM_OUT2)
2056
-		mcr |= UART_MCR_OUT2;
2057
-	if (mctrl & TIOCM_LOOP)
2058
-		mcr |= UART_MCR_LOOP;
2083
+	mcr = serial8250_TIOCM_to_MCR(mctrl);
20592084 
20602085 	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
20612086 
....@@ -2065,6 +2090,9 @@
20652090 
20662091 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
20672092 {
2093
+	if (port->rs485.flags & SER_RS485_ENABLED)
2094
+		return;
2095
+
20682096 	if (port->set_mctrl)
20692097 		port->set_mctrl(port, mctrl);
20702098 	else
....@@ -2244,20 +2272,6 @@
22442272 	enable_rsa(up);
22452273 #endif
22462274 
2247
-	if (port->type == PORT_XR17V35X) {
2248
-		/*
2249
-		 * First enable access to IER [7:5], ISR [5:4], FCR [5:4],
2250
-		 * MCR [7:5] and MSR [7:0]
2251
-		 */
2252
-		serial_port_out(port, UART_XR_EFR, UART_EFR_ECB);
2253
-
2254
-		/*
2255
-		 * Make sure all interrups are masked until initialization is
2256
-		 * complete and the FIFOs are cleared
2257
-		 */
2258
-		serial_port_out(port, UART_IER, 0);
2259
-	}
2260
-
22612275 	/*
22622276 	 * Clear the FIFO buffers and disable them.
22632277 	 * (they will be reenabled in set_termios())
....@@ -2271,8 +2285,6 @@
22712285 	serial_port_in(port, UART_RX);
22722286 	serial_port_in(port, UART_IIR);
22732287 	serial_port_in(port, UART_MSR);
2274
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2275
-		serial_port_in(port, UART_EXAR_INT0);
22762288 
22772289 	/*
22782290 	 * At this point, there's no way the LSR could still be 0xff;
....@@ -2281,7 +2293,7 @@
22812293 	 */
22822294 	if (!(port->flags & UPF_BUGGY_UART) &&
22832295 	    (serial_port_in(port, UART_LSR) == 0xff)) {
2284
-		pr_info_ratelimited("%s: LSR safety check engaged!\n", port->name);
2296
+		dev_info_ratelimited(port->dev, "LSR safety check engaged!\n");
22852297 		retval = -ENODEV;
22862298 		goto out;
22872299 	}
....@@ -2313,8 +2325,7 @@
23132325 	     (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) {
23142326 		/* Bounds checking of TX threshold (valid 0 to fifosize-2) */
23152327 		if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) {
2316
-			pr_err("%s TX FIFO Threshold errors, skipping\n",
2317
-			       port->name);
2328
+			dev_err(port->dev, "TX FIFO Threshold errors, skipping\n");
23182329 		} else {
23192330 			serial_port_out(port, UART_ALTR_AFR,
23202331 					UART_ALTR_EN_TXFIFO_LW);
....@@ -2418,8 +2429,7 @@
24182429 	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
24192430 		if (!(up->bugs & UART_BUG_TXEN)) {
24202431 			up->bugs |= UART_BUG_TXEN;
2421
-			pr_debug("%s - enabling bad tx status workarounds\n",
2422
-				 port->name);
2432
+			dev_dbg(port->dev, "enabling bad tx status workarounds\n");
24232433 		}
24242434 	} else {
24252435 		up->bugs &= ~UART_BUG_TXEN;
....@@ -2437,8 +2447,6 @@
24372447 	serial_port_in(port, UART_RX);
24382448 	serial_port_in(port, UART_IIR);
24392449 	serial_port_in(port, UART_MSR);
2440
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2441
-		serial_port_in(port, UART_EXAR_INT0);
24422450 	up->lsr_saved_flags = 0;
24432451 	up->msr_saved_flags = 0;
24442452 
....@@ -2446,15 +2454,18 @@
24462454 	 * Request DMA channels for both RX and TX.
24472455 	 */
24482456 	if (up->dma) {
2449
-		retval = serial8250_request_dma(up);
2450
-		if (retval) {
2457
+		const char *msg = NULL;
2458
+
2459
+		if (uart_console(port))
2460
+			msg = "forbid DMA for kernel console";
2461
+		else if (serial8250_request_dma(up))
24512462 #ifdef CONFIG_ARCH_ROCKCHIP
2452
-			pr_warn_ratelimited("%s - failed to request DMA, use interrupt mode\n",
2453
-					    port->name);
2463
+			msg = "failed to request DMA, use interrupt mode";
24542464 #else
2455
-			pr_warn_ratelimited("%s - failed to request DMA\n",
2456
-					    port->name);
2465
+			msg = "failed to request DMA";
24572466 #endif
2467
+		if (msg) {
2468
+			dev_warn_ratelimited(port->dev, "%s\n", msg);
24582469 			up->dma = NULL;
24592470 		}
24602471 	}
....@@ -2552,23 +2563,6 @@
25522563 		serial8250_do_shutdown(port);
25532564 }
25542565 
2555
-/*
2556
- * XR17V35x UARTs have an extra fractional divisor register (DLD)
2557
- * Calculate divisor with extra 4-bit fractional portion
2558
- */
2559
-static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2560
-					 unsigned int baud,
2561
-					 unsigned int *frac)
2562
-{
2563
-	struct uart_port *port = &up->port;
2564
-	unsigned int quot_16;
2565
-
2566
-	quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2567
-	*frac = quot_16 & 0x0f;
2568
-
2569
-	return quot_16 >> 4;
2570
-}
2571
-
25722566 /* Nuvoton NPCM UARTs have a custom divisor calculation */
25732567 static unsigned int npcm_get_divisor(struct uart_8250_port *up,
25742568 		unsigned int baud)
....@@ -2596,8 +2590,6 @@
25962590 	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
25972591 		 baud == (port->uartclk/8))
25982592 		quot = 0x8002;
2599
-	else if (up->port.type == PORT_XR17V35X)
2600
-		quot = xr17v35x_get_divisor(up, baud, frac);
26012593 	else if (up->port.type == PORT_NPCM)
26022594 		quot = npcm_get_divisor(up, baud);
26032595 	else
....@@ -2699,13 +2691,6 @@
26992691 #ifdef CONFIG_ARCH_ROCKCHIP
27002692 	serial_port_out(port, UART_MCR, up->mcr);
27012693 #endif
2702
-
2703
-	/* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2704
-	if (up->port.type == PORT_XR17V35X) {
2705
-		/* Preserve bits not related to baudrate; DLD[7:4]. */
2706
-		quot_frac |= serial_port_in(port, 0x2) & 0xf0;
2707
-		serial_port_out(port, 0x2, quot_frac);
2708
-	}
27092694 }
27102695 EXPORT_SYMBOL_GPL(serial8250_do_set_divisor);
27112696 
....@@ -2747,6 +2732,62 @@
27472732 	 */
27482733 	return uart_get_baud_rate(port, termios, old, min, max);
27492734 }
2735
+
2736
+/*
2737
+ * Note in order to avoid the tty port mutex deadlock don't use the next method
2738
+ * within the uart port callbacks. Primarily it's supposed to be utilized to
2739
+ * handle a sudden reference clock rate change.
2740
+ */
2741
+void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk)
2742
+{
2743
+	struct uart_8250_port *up = up_to_u8250p(port);
2744
+	struct tty_port *tport = &port->state->port;
2745
+	unsigned int baud, quot, frac = 0;
2746
+	struct ktermios *termios;
2747
+	struct tty_struct *tty;
2748
+	unsigned long flags;
2749
+
2750
+	tty = tty_port_tty_get(tport);
2751
+	if (!tty) {
2752
+		mutex_lock(&tport->mutex);
2753
+		port->uartclk = uartclk;
2754
+		mutex_unlock(&tport->mutex);
2755
+		return;
2756
+	}
2757
+
2758
+	down_write(&tty->termios_rwsem);
2759
+	mutex_lock(&tport->mutex);
2760
+
2761
+	if (port->uartclk == uartclk)
2762
+		goto out_lock;
2763
+
2764
+	port->uartclk = uartclk;
2765
+
2766
+	if (!tty_port_initialized(tport))
2767
+		goto out_lock;
2768
+
2769
+	termios = &tty->termios;
2770
+
2771
+	baud = serial8250_get_baud_rate(port, termios, NULL);
2772
+	quot = serial8250_get_divisor(port, baud, &frac);
2773
+
2774
+	serial8250_rpm_get(up);
2775
+	spin_lock_irqsave(&port->lock, flags);
2776
+
2777
+	uart_update_timeout(port, termios->c_cflag, baud);
2778
+
2779
+	serial8250_set_divisor(port, baud, quot, frac);
2780
+	serial_port_out(port, UART_LCR, up->lcr);
2781
+
2782
+	spin_unlock_irqrestore(&port->lock, flags);
2783
+	serial8250_rpm_put(up);
2784
+
2785
+out_lock:
2786
+	mutex_unlock(&tport->mutex);
2787
+	up_write(&tty->termios_rwsem);
2788
+	tty_kref_put(tty);
2789
+}
2790
+EXPORT_SYMBOL_GPL(serial8250_update_uartclk);
27502791 
27512792 void
27522793 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
....@@ -2863,7 +2904,7 @@
28632904 	}
28642905 
28652906 #ifdef CONFIG_ARCH_ROCKCHIP
2866
-	/* Reset uart to make sure it is idle, then set buad rate */
2907
+	/* Reset uart to make sure it is idle, then set baud rate */
28672908 	serial_port_out(port, 0x88 >> 2, 0x7);
28682909 #endif
28692910 
....@@ -3001,8 +3042,10 @@
30013042 	case UPIO_MEM32BE:
30023043 	case UPIO_MEM16:
30033044 	case UPIO_MEM:
3004
-		if (!port->mapbase)
3045
+		if (!port->mapbase) {
3046
+			ret = -EINVAL;
30053047 			break;
3048
+		}
30063049 
30073050 		if (!request_mem_region(port->mapbase, size, "serial")) {
30083051 			ret = -EBUSY;
....@@ -3010,7 +3053,7 @@
30103053 		}
30113054 
30123055 		if (port->flags & UPF_IOREMAP) {
3013
-			port->membase = ioremap_nocache(port->mapbase, size);
3056
+			port->membase = ioremap(port->mapbase, size);
30143057 			if (!port->membase) {
30153058 				release_mem_region(port->mapbase, size);
30163059 				ret = -ENOMEM;
....@@ -3121,7 +3164,7 @@
31213164 	return rxtrig_bytes;
31223165 }
31233166 
3124
-static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
3167
+static ssize_t rx_trig_bytes_show(struct device *dev,
31253168 	struct device_attribute *attr, char *buf)
31263169 {
31273170 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3167,7 +3210,7 @@
31673210 	return ret;
31683211 }
31693212 
3170
-static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
3213
+static ssize_t rx_trig_bytes_store(struct device *dev,
31713214 	struct device_attribute *attr, const char *buf, size_t count)
31723215 {
31733216 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3188,18 +3231,16 @@
31883231 	return count;
31893232 }
31903233 
3191
-static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
3192
-		   serial8250_get_attr_rx_trig_bytes,
3193
-		   serial8250_set_attr_rx_trig_bytes);
3234
+static DEVICE_ATTR_RW(rx_trig_bytes);
31943235 
31953236 static struct attribute *serial8250_dev_attrs[] = {
31963237 	&dev_attr_rx_trig_bytes.attr,
3197
-	NULL,
3198
-	};
3238
+	NULL
3239
+};
31993240 
32003241 static struct attribute_group serial8250_dev_attr_group = {
32013242 	.attrs = serial8250_dev_attrs,
3202
-	};
3243
+};
32033244 
32043245 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
32053246 {
....@@ -3298,7 +3339,9 @@
32983339 	struct uart_port *port = &up->port;
32993340 
33003341 	spin_lock_init(&port->lock);
3342
+	port->pm = NULL;
33013343 	port->ops = &serial8250_pops;
3344
+	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
33023345 
33033346 	up->cur_iotype = 0xFF;
33043347 }
....@@ -3359,7 +3402,7 @@
33593402 
33603403 	serial8250_set_divisor(port, baud, quot, frac);
33613404 	serial_port_out(port, UART_LCR, up->lcr);
3362
-	serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
3405
+	serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
33633406 }
33643407 
33653408 /*
....@@ -3367,10 +3410,14 @@
33673410  *	any possible real use of the port...
33683411  *
33693412  *	The console_lock must be held when we get here.
3413
+ *
3414
+ *	Doing runtime PM is really a bad idea for the kernel console.
3415
+ *	Thus, we assume the function is called when device is powered up.
33703416  */
33713417 void serial8250_console_write(struct uart_8250_port *up, const char *s,
33723418 			      unsigned int count)
33733419 {
3420
+	struct uart_8250_em485 *em485 = up->em485;
33743421 	struct uart_port *port = &up->port;
33753422 	unsigned long flags;
33763423 	unsigned int ier;
....@@ -3378,11 +3425,7 @@
33783425 
33793426 	touch_nmi_watchdog();
33803427 
3381
-	serial8250_rpm_get(up);
3382
-
3383
-	if (port->sysrq)
3384
-		locked = 0;
3385
-	else if (oops_in_progress)
3428
+	if (oops_in_progress)
33863429 		locked = spin_trylock_irqsave(&port->lock, flags);
33873430 	else
33883431 		spin_lock_irqsave(&port->lock, flags);
....@@ -3403,6 +3446,12 @@
34033446 		up->canary = 0;
34043447 	}
34053448 
3449
+	if (em485) {
3450
+		if (em485->tx_stopped)
3451
+			up->rs485_start_tx(up);
3452
+		mdelay(port->rs485.delay_rts_before_send);
3453
+	}
3454
+
34063455 	uart_console_write(port, s, count, serial8250_console_putchar);
34073456 
34083457 	/*
....@@ -3410,6 +3459,13 @@
34103459 	 *	and restore the IER
34113460 	 */
34123461 	wait_for_xmitr(up, BOTH_EMPTY);
3462
+
3463
+	if (em485) {
3464
+		mdelay(port->rs485.delay_rts_after_send);
3465
+		if (em485->tx_stopped)
3466
+			up->rs485_stop_tx(up);
3467
+	}
3468
+
34133469 	serial_port_out(port, UART_IER, ier);
34143470 
34153471 	/*
....@@ -3424,7 +3480,6 @@
34243480 
34253481 	if (locked)
34263482 		spin_unlock_irqrestore(&port->lock, flags);
3427
-	serial8250_rpm_put(up);
34283483 }
34293484 
34303485 static unsigned int probe_baud(struct uart_port *port)
....@@ -3448,6 +3503,7 @@
34483503 	int bits = 8;
34493504 	int parity = 'n';
34503505 	int flow = 'n';
3506
+	int ret;
34513507 
34523508 	if (!port->iobase && !port->membase)
34533509 		return -ENODEV;
....@@ -3457,7 +3513,22 @@
34573513 	else if (probe)
34583514 		baud = probe_baud(port);
34593515 
3460
-	return uart_set_options(port, port->cons, baud, parity, bits, flow);
3516
+	ret = uart_set_options(port, port->cons, baud, parity, bits, flow);
3517
+	if (ret)
3518
+		return ret;
3519
+
3520
+	if (port->dev)
3521
+		pm_runtime_get_sync(port->dev);
3522
+
3523
+	return 0;
3524
+}
3525
+
3526
+int serial8250_console_exit(struct uart_port *port)
3527
+{
3528
+	if (port->dev)
3529
+		pm_runtime_put_sync(port->dev);
3530
+
3531
+	return 0;
34613532 }
34623533 
34633534 #endif /* CONFIG_SERIAL_8250_CONSOLE */