forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8
kernel/drivers/tty/serial/8250/8250_mtk.c
....@@ -10,31 +10,310 @@
1010 #include <linux/module.h>
1111 #include <linux/of_irq.h>
1212 #include <linux/of_platform.h>
13
+#include <linux/pinctrl/consumer.h>
1314 #include <linux/platform_device.h>
1415 #include <linux/pm_runtime.h>
1516 #include <linux/serial_8250.h>
1617 #include <linux/serial_reg.h>
18
+#include <linux/console.h>
19
+#include <linux/dma-mapping.h>
20
+#include <linux/tty.h>
21
+#include <linux/tty_flip.h>
1722
1823 #include "8250.h"
1924
20
-#define UART_MTK_HIGHS 0x09 /* Highspeed register */
21
-#define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
22
-#define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
25
+#define MTK_UART_HIGHS 0x09 /* Highspeed register */
26
+#define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */
27
+#define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */
2328 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
29
+#define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */
30
+#define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */
31
+#define MTK_UART_DMA_EN 0x13 /* DMA Enable register */
32
+#define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */
33
+#define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */
34
+#define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */
35
+#define MTK_UART_DEBUG0 0x18
36
+#define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */
37
+#define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */
38
+#define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */
39
+
40
+#define MTK_UART_EFR 38 /* I/O: Extended Features Register */
41
+#define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */
42
+#define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */
43
+#define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */
44
+#define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */
45
+#define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */
46
+#define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */
47
+#define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */
48
+#define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
49
+#define MTK_UART_DMA_EN_TX 0x2
50
+#define MTK_UART_DMA_EN_RX 0x5
51
+
52
+#define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */
53
+#define MTK_UART_RX_SIZE 0x8000
54
+#define MTK_UART_TX_TRIGGER 1
55
+#define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
56
+
57
+#define MTK_UART_XON1 40 /* I/O: Xon character 1 */
58
+#define MTK_UART_XOFF1 42 /* I/O: Xoff character 1 */
59
+
60
+#ifdef CONFIG_SERIAL_8250_DMA
61
+enum dma_rx_status {
62
+ DMA_RX_START = 0,
63
+ DMA_RX_RUNNING = 1,
64
+ DMA_RX_SHUTDOWN = 2,
65
+};
66
+#endif
2467
2568 struct mtk8250_data {
2669 int line;
70
+ unsigned int rx_pos;
71
+ unsigned int clk_count;
2772 struct clk *uart_clk;
2873 struct clk *bus_clk;
74
+ struct uart_8250_dma *dma;
75
+#ifdef CONFIG_SERIAL_8250_DMA
76
+ enum dma_rx_status rx_status;
77
+#endif
78
+ int rx_wakeup_irq;
2979 };
80
+
81
+/* flow control mode */
82
+enum {
83
+ MTK_UART_FC_NONE,
84
+ MTK_UART_FC_SW,
85
+ MTK_UART_FC_HW,
86
+};
87
+
88
+#ifdef CONFIG_SERIAL_8250_DMA
89
+static void mtk8250_rx_dma(struct uart_8250_port *up);
90
+
91
+static void mtk8250_dma_rx_complete(void *param)
92
+{
93
+ struct uart_8250_port *up = param;
94
+ struct uart_8250_dma *dma = up->dma;
95
+ struct mtk8250_data *data = up->port.private_data;
96
+ struct tty_port *tty_port = &up->port.state->port;
97
+ struct dma_tx_state state;
98
+ int copied, total, cnt;
99
+ unsigned char *ptr;
100
+ unsigned long flags;
101
+
102
+ if (data->rx_status == DMA_RX_SHUTDOWN)
103
+ return;
104
+
105
+ spin_lock_irqsave(&up->port.lock, flags);
106
+
107
+ dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
108
+ total = dma->rx_size - state.residue;
109
+ cnt = total;
110
+
111
+ if ((data->rx_pos + cnt) > dma->rx_size)
112
+ cnt = dma->rx_size - data->rx_pos;
113
+
114
+ ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
115
+ copied = tty_insert_flip_string(tty_port, ptr, cnt);
116
+ data->rx_pos += cnt;
117
+
118
+ if (total > cnt) {
119
+ ptr = (unsigned char *)(dma->rx_buf);
120
+ cnt = total - cnt;
121
+ copied += tty_insert_flip_string(tty_port, ptr, cnt);
122
+ data->rx_pos = cnt;
123
+ }
124
+
125
+ up->port.icount.rx += copied;
126
+
127
+ tty_flip_buffer_push(tty_port);
128
+
129
+ mtk8250_rx_dma(up);
130
+
131
+ spin_unlock_irqrestore(&up->port.lock, flags);
132
+}
133
+
134
+static void mtk8250_rx_dma(struct uart_8250_port *up)
135
+{
136
+ struct uart_8250_dma *dma = up->dma;
137
+ struct dma_async_tx_descriptor *desc;
138
+
139
+ desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
140
+ dma->rx_size, DMA_DEV_TO_MEM,
141
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
142
+ if (!desc) {
143
+ pr_err("failed to prepare rx slave single\n");
144
+ return;
145
+ }
146
+
147
+ desc->callback = mtk8250_dma_rx_complete;
148
+ desc->callback_param = up;
149
+
150
+ dma->rx_cookie = dmaengine_submit(desc);
151
+
152
+ dma_async_issue_pending(dma->rxchan);
153
+}
154
+
155
+static void mtk8250_dma_enable(struct uart_8250_port *up)
156
+{
157
+ struct uart_8250_dma *dma = up->dma;
158
+ struct mtk8250_data *data = up->port.private_data;
159
+ int lcr = serial_in(up, UART_LCR);
160
+
161
+ if (data->rx_status != DMA_RX_START)
162
+ return;
163
+
164
+ dma->rxconf.src_port_window_size = dma->rx_size;
165
+ dma->rxconf.src_addr = dma->rx_addr;
166
+
167
+ dma->txconf.dst_port_window_size = UART_XMIT_SIZE;
168
+ dma->txconf.dst_addr = dma->tx_addr;
169
+
170
+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
171
+ UART_FCR_CLEAR_XMIT);
172
+ serial_out(up, MTK_UART_DMA_EN,
173
+ MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
174
+
175
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
176
+ serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
177
+ serial_out(up, UART_LCR, lcr);
178
+
179
+ if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
180
+ pr_err("failed to configure rx dma channel\n");
181
+ if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
182
+ pr_err("failed to configure tx dma channel\n");
183
+
184
+ data->rx_status = DMA_RX_RUNNING;
185
+ data->rx_pos = 0;
186
+ mtk8250_rx_dma(up);
187
+}
188
+#endif
189
+
190
+static int mtk8250_startup(struct uart_port *port)
191
+{
192
+#ifdef CONFIG_SERIAL_8250_DMA
193
+ struct uart_8250_port *up = up_to_u8250p(port);
194
+ struct mtk8250_data *data = port->private_data;
195
+
196
+ /* disable DMA for console */
197
+ if (uart_console(port))
198
+ up->dma = NULL;
199
+
200
+ if (up->dma) {
201
+ data->rx_status = DMA_RX_START;
202
+ uart_circ_clear(&port->state->xmit);
203
+ }
204
+#endif
205
+ memset(&port->icount, 0, sizeof(port->icount));
206
+
207
+ return serial8250_do_startup(port);
208
+}
209
+
210
+static void mtk8250_shutdown(struct uart_port *port)
211
+{
212
+#ifdef CONFIG_SERIAL_8250_DMA
213
+ struct uart_8250_port *up = up_to_u8250p(port);
214
+ struct mtk8250_data *data = port->private_data;
215
+
216
+ if (up->dma)
217
+ data->rx_status = DMA_RX_SHUTDOWN;
218
+#endif
219
+
220
+ return serial8250_do_shutdown(port);
221
+}
222
+
223
+static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
224
+{
225
+ serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
226
+}
227
+
228
+static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
229
+{
230
+ serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
231
+}
232
+
233
+static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
234
+{
235
+ struct uart_port *port = &up->port;
236
+ int lcr = serial_in(up, UART_LCR);
237
+
238
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
239
+ serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
240
+ serial_out(up, UART_LCR, lcr);
241
+ lcr = serial_in(up, UART_LCR);
242
+
243
+ switch (mode) {
244
+ case MTK_UART_FC_NONE:
245
+ serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
246
+ serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
247
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
248
+ serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) &
249
+ (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
250
+ serial_out(up, UART_LCR, lcr);
251
+ mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
252
+ MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
253
+ break;
254
+
255
+ case MTK_UART_FC_HW:
256
+ serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
257
+ serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
258
+ serial_out(up, UART_MCR, UART_MCR_RTS);
259
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
260
+
261
+ /*enable hw flow control*/
262
+ serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC |
263
+ (serial_in(up, MTK_UART_EFR) &
264
+ (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
265
+
266
+ serial_out(up, UART_LCR, lcr);
267
+ mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
268
+ mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
269
+ break;
270
+
271
+ case MTK_UART_FC_SW: /*MTK software flow control */
272
+ serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
273
+ serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
274
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
275
+
276
+ /*enable sw flow control */
277
+ serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
278
+ (serial_in(up, MTK_UART_EFR) &
279
+ (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
280
+
281
+ serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty));
282
+ serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty));
283
+ serial_out(up, UART_LCR, lcr);
284
+ mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
285
+ mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
286
+ break;
287
+ default:
288
+ break;
289
+ }
290
+}
30291
31292 static void
32293 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
33294 struct ktermios *old)
34295 {
296
+ unsigned short fraction_L_mapping[] = {
297
+ 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
298
+ };
299
+ unsigned short fraction_M_mapping[] = {
300
+ 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
301
+ };
35302 struct uart_8250_port *up = up_to_u8250p(port);
303
+ unsigned int baud, quot, fraction;
36304 unsigned long flags;
37
- unsigned int baud, quot;
305
+ int mode;
306
+
307
+#ifdef CONFIG_SERIAL_8250_DMA
308
+ if (up->dma) {
309
+ if (uart_console(port)) {
310
+ devm_kfree(up->port.dev, up->dma);
311
+ up->dma = NULL;
312
+ } else {
313
+ mtk8250_dma_enable(up);
314
+ }
315
+ }
316
+#endif
38317
39318 /*
40319 * Store the requested baud rate before calling the generic 8250
....@@ -52,7 +331,7 @@
52331 tty_termios_encode_baud_rate(termios, baud, baud);
53332
54333 /*
55
- * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
334
+ * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
56335 *
57336 * We need to recalcualte the quot register, as the claculation depends
58337 * on the vaule in the highspeed register.
....@@ -68,18 +347,11 @@
68347 port->uartclk / 16 / UART_DIV_MAX,
69348 port->uartclk);
70349
71
- if (baud <= 115200) {
72
- serial_port_out(port, UART_MTK_HIGHS, 0x0);
350
+ if (baud < 115200) {
351
+ serial_port_out(port, MTK_UART_HIGHS, 0x0);
73352 quot = uart_get_divisor(port, baud);
74
- } else if (baud <= 576000) {
75
- serial_port_out(port, UART_MTK_HIGHS, 0x2);
76
-
77
- /* Set to next lower baudrate supported */
78
- if ((baud == 500000) || (baud == 576000))
79
- baud = 460800;
80
- quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
81353 } else {
82
- serial_port_out(port, UART_MTK_HIGHS, 0x3);
354
+ serial_port_out(port, MTK_UART_HIGHS, 0x3);
83355 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
84356 }
85357
....@@ -101,17 +373,39 @@
101373 /* reset DLAB */
102374 serial_port_out(port, UART_LCR, up->lcr);
103375
104
- if (baud > 460800) {
376
+ if (baud >= 115200) {
105377 unsigned int tmp;
106378
107
- tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
108
- serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
109
- serial_port_out(port, UART_MTK_SAMPLE_POINT,
110
- (tmp - 2) >> 1);
379
+ tmp = (port->uartclk / (baud * quot)) - 1;
380
+ serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
381
+ serial_port_out(port, MTK_UART_SAMPLE_POINT,
382
+ (tmp >> 1) - 1);
383
+
384
+ /*count fraction to set fractoin register */
385
+ fraction = ((port->uartclk * 100) / baud / quot) % 100;
386
+ fraction = DIV_ROUND_CLOSEST(fraction, 10);
387
+ serial_port_out(port, MTK_UART_FRACDIV_L,
388
+ fraction_L_mapping[fraction]);
389
+ serial_port_out(port, MTK_UART_FRACDIV_M,
390
+ fraction_M_mapping[fraction]);
111391 } else {
112
- serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
113
- serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
392
+ serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
393
+ serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
394
+ serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
395
+ serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
114396 }
397
+
398
+ if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
399
+ mode = MTK_UART_FC_HW;
400
+ else if (termios->c_iflag & CRTSCTS)
401
+ mode = MTK_UART_FC_SW;
402
+ else
403
+ mode = MTK_UART_FC_NONE;
404
+
405
+ mtk8250_set_flow_ctrl(up, mode);
406
+
407
+ if (uart_console(port))
408
+ up->port.cons->cflag = termios->c_cflag;
115409
116410 spin_unlock_irqrestore(&port->lock, flags);
117411 /* Don't rewrite B0 */
....@@ -122,9 +416,18 @@
122416 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
123417 {
124418 struct mtk8250_data *data = dev_get_drvdata(dev);
419
+ struct uart_8250_port *up = serial8250_get_port(data->line);
125420
126
- clk_disable_unprepare(data->uart_clk);
127
- clk_disable_unprepare(data->bus_clk);
421
+ /* wait until UART in idle status */
422
+ while
423
+ (serial_in(up, MTK_UART_DEBUG0));
424
+
425
+ if (data->clk_count == 0U) {
426
+ dev_dbg(dev, "%s clock count is 0\n", __func__);
427
+ } else {
428
+ clk_disable_unprepare(data->bus_clk);
429
+ data->clk_count--;
430
+ }
128431
129432 return 0;
130433 }
....@@ -134,16 +437,16 @@
134437 struct mtk8250_data *data = dev_get_drvdata(dev);
135438 int err;
136439
137
- err = clk_prepare_enable(data->uart_clk);
138
- if (err) {
139
- dev_warn(dev, "Can't enable clock\n");
140
- return err;
141
- }
142
-
143
- err = clk_prepare_enable(data->bus_clk);
144
- if (err) {
145
- dev_warn(dev, "Can't enable bus clock\n");
146
- return err;
440
+ if (data->clk_count > 0U) {
441
+ dev_dbg(dev, "%s clock count is %d\n", __func__,
442
+ data->clk_count);
443
+ } else {
444
+ err = clk_prepare_enable(data->bus_clk);
445
+ if (err) {
446
+ dev_warn(dev, "Can't enable bus clock\n");
447
+ return err;
448
+ }
449
+ data->clk_count++;
147450 }
148451
149452 return 0;
....@@ -153,17 +456,30 @@
153456 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
154457 {
155458 if (!state)
156
- pm_runtime_get_sync(port->dev);
459
+ if (!mtk8250_runtime_resume(port->dev))
460
+ pm_runtime_get_sync(port->dev);
157461
158462 serial8250_do_pm(port, state, old);
159463
160464 if (state)
161
- pm_runtime_put_sync_suspend(port->dev);
465
+ if (!pm_runtime_put_sync_suspend(port->dev))
466
+ mtk8250_runtime_suspend(port->dev);
162467 }
468
+
469
+#ifdef CONFIG_SERIAL_8250_DMA
470
+static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
471
+{
472
+ return false;
473
+}
474
+#endif
163475
164476 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
165477 struct mtk8250_data *data)
166478 {
479
+#ifdef CONFIG_SERIAL_8250_DMA
480
+ int dmacnt;
481
+#endif
482
+
167483 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
168484 if (IS_ERR(data->uart_clk)) {
169485 /*
....@@ -180,19 +496,42 @@
180496 }
181497
182498 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
183
- return PTR_ERR_OR_ZERO(data->bus_clk);
499
+ if (IS_ERR(data->bus_clk))
500
+ return PTR_ERR(data->bus_clk);
501
+
502
+ data->dma = NULL;
503
+#ifdef CONFIG_SERIAL_8250_DMA
504
+ dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
505
+ if (dmacnt == 2) {
506
+ data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
507
+ GFP_KERNEL);
508
+ if (!data->dma)
509
+ return -ENOMEM;
510
+
511
+ data->dma->fn = mtk8250_dma_filter;
512
+ data->dma->rx_size = MTK_UART_RX_SIZE;
513
+ data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
514
+ data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
515
+ }
516
+#endif
517
+
518
+ return 0;
184519 }
185520
186521 static int mtk8250_probe(struct platform_device *pdev)
187522 {
188523 struct uart_8250_port uart = {};
189
- struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
190
- struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
191524 struct mtk8250_data *data;
192
- int err;
525
+ struct resource *regs;
526
+ int irq, err;
193527
194
- if (!regs || !irq) {
195
- dev_err(&pdev->dev, "no registers/irq defined\n");
528
+ irq = platform_get_irq(pdev, 0);
529
+ if (irq < 0)
530
+ return irq;
531
+
532
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
533
+ if (!regs) {
534
+ dev_err(&pdev->dev, "no registers defined\n");
196535 return -EINVAL;
197536 }
198537
....@@ -205,6 +544,8 @@
205544 if (!data)
206545 return -ENOMEM;
207546
547
+ data->clk_count = 0;
548
+
208549 if (pdev->dev.of_node) {
209550 err = mtk8250_probe_of(pdev, &uart.port, data);
210551 if (err)
....@@ -214,7 +555,7 @@
214555
215556 spin_lock_init(&uart.port.lock);
216557 uart.port.mapbase = regs->start;
217
- uart.port.irq = irq->start;
558
+ uart.port.irq = irq;
218559 uart.port.pm = mtk8250_do_pm;
219560 uart.port.type = PORT_16550;
220561 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
....@@ -222,8 +563,14 @@
222563 uart.port.iotype = UPIO_MEM32;
223564 uart.port.regshift = 2;
224565 uart.port.private_data = data;
566
+ uart.port.shutdown = mtk8250_shutdown;
567
+ uart.port.startup = mtk8250_startup;
225568 uart.port.set_termios = mtk8250_set_termios;
226569 uart.port.uartclk = clk_get_rate(data->uart_clk);
570
+#ifdef CONFIG_SERIAL_8250_DMA
571
+ if (data->dma)
572
+ uart.dma = data->dma;
573
+#endif
227574
228575 /* Disable Rate Fix function */
229576 writel(0x0, uart.port.membase +
....@@ -231,18 +578,25 @@
231578
232579 platform_set_drvdata(pdev, data);
233580
581
+ pm_runtime_enable(&pdev->dev);
234582 err = mtk8250_runtime_resume(&pdev->dev);
235583 if (err)
236
- return err;
584
+ goto err_pm_disable;
237585
238586 data->line = serial8250_register_8250_port(&uart);
239
- if (data->line < 0)
240
- return data->line;
587
+ if (data->line < 0) {
588
+ err = data->line;
589
+ goto err_pm_disable;
590
+ }
241591
242
- pm_runtime_set_active(&pdev->dev);
243
- pm_runtime_enable(&pdev->dev);
592
+ data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
244593
245594 return 0;
595
+
596
+err_pm_disable:
597
+ pm_runtime_disable(&pdev->dev);
598
+
599
+ return err;
246600 }
247601
248602 static int mtk8250_remove(struct platform_device *pdev)
....@@ -252,10 +606,12 @@
252606 pm_runtime_get_sync(&pdev->dev);
253607
254608 serial8250_unregister_port(data->line);
255
- mtk8250_runtime_suspend(&pdev->dev);
256609
257610 pm_runtime_disable(&pdev->dev);
258611 pm_runtime_put_noidle(&pdev->dev);
612
+
613
+ if (!pm_runtime_status_suspended(&pdev->dev))
614
+ mtk8250_runtime_suspend(&pdev->dev);
259615
260616 return 0;
261617 }
....@@ -263,8 +619,23 @@
263619 static int __maybe_unused mtk8250_suspend(struct device *dev)
264620 {
265621 struct mtk8250_data *data = dev_get_drvdata(dev);
622
+ int irq = data->rx_wakeup_irq;
623
+ int err;
266624
267625 serial8250_suspend_port(data->line);
626
+
627
+ pinctrl_pm_select_sleep_state(dev);
628
+ if (irq >= 0) {
629
+ err = enable_irq_wake(irq);
630
+ if (err) {
631
+ dev_err(dev,
632
+ "failed to enable irq wake on IRQ %d: %d\n",
633
+ irq, err);
634
+ pinctrl_pm_select_default_state(dev);
635
+ serial8250_resume_port(data->line);
636
+ return err;
637
+ }
638
+ }
268639
269640 return 0;
270641 }
....@@ -272,6 +643,11 @@
272643 static int __maybe_unused mtk8250_resume(struct device *dev)
273644 {
274645 struct mtk8250_data *data = dev_get_drvdata(dev);
646
+ int irq = data->rx_wakeup_irq;
647
+
648
+ if (irq >= 0)
649
+ disable_irq_wake(irq);
650
+ pinctrl_pm_select_default_state(dev);
275651
276652 serial8250_resume_port(data->line);
277653
....@@ -309,6 +685,7 @@
309685 return -ENODEV;
310686
311687 device->port.iotype = UPIO_MEM32;
688
+ device->port.regshift = 2;
312689
313690 return early_serial8250_setup(device, NULL);
314691 }