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2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8 
 kernel/drivers/pinctrl/pinctrl-sx150x.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2016, BayLibre, SAS. All rights reserved.
34  * Author: Neil Armstrong <narmstrong@baylibre.com>
....@@ -8,15 +9,6 @@
89  * The handling of the 4-bit chips (SX1501/SX1504/SX1507) is untested.
910  *
1011  * Author: Gregory Bean <gbean@codeaurora.org>
11
- *
12
- * This program is free software; you can redistribute it and/or modify
13
- * it under the terms of the GNU General Public License version 2 and
14
- * only version 2 as published by the Free Software Foundation.
15
- *
16
- * This program is distributed in the hope that it will be useful,
17
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
18
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
- * GNU General Public License for more details.
2012  */
2113 
2214 #include <linux/regmap.h>
....@@ -399,13 +391,16 @@
399391 	int ret;
400392 
401393 	if (sx150x_pin_is_oscio(pctl, offset))
402
-		return false;
394
+		return GPIO_LINE_DIRECTION_OUT;
403395 
404396 	ret = regmap_read(pctl->regmap, pctl->data->reg_dir, &value);
405397 	if (ret < 0)
406398 		return ret;
407399 
408
-	return !!(value & BIT(offset));
400
+	if (value & BIT(offset))
401
+		return GPIO_LINE_DIRECTION_IN;
402
+
403
+	return GPIO_LINE_DIRECTION_OUT;
409404 }
410405 
411406 static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset)
....@@ -448,7 +443,6 @@
448443 		sx150x_gpio_oscio_set(pctl, value);
449444 	else
450445 		__sx150x_gpio_set(pctl, offset, value);
451
-
452446 }
453447 
454448 static void sx150x_gpio_set_multiple(struct gpio_chip *chip,
....@@ -695,7 +689,7 @@
695689 		if (ret < 0)
696690 			return ret;
697691 
698
-		if (ret)
692
+		if (ret == GPIO_LINE_DIRECTION_IN)
699693 			return -EINVAL;
700694 
701695 		ret = sx150x_gpio_get(&pctl->gpio, pin);
....@@ -993,7 +987,7 @@
993987 /*
994988  * In order to mask the differences between 16 and 8 bit expander
995989  * devices we set up a sligthly ficticious regmap that pretends to be
996
- * a set of 32-bit (to accomodate RegSenseLow/RegSenseHigh
990
+ * a set of 32-bit (to accommodate RegSenseLow/RegSenseHigh
997991  * pair/quartet) registers and transparently reconstructs those
998992  * registers via multiple I2C/SMBus reads
999993  *
....@@ -1159,12 +1153,6 @@
11591153 		return ret;
11601154 	}
11611155 
1162
-	ret = pinctrl_enable(pctl->pctldev);
1163
-	if (ret) {
1164
-		dev_err(dev, "Failed to enable pinctrl device\n");
1165
-		return ret;
1166
-	}
1167
-
11681156 	/* Register GPIO controller */
11691157 	pctl->gpio.base = -1;
11701158 	pctl->gpio.ngpio = pctl->data->npins;
....@@ -1192,17 +1180,10 @@
11921180 	if (pctl->data->model != SX150X_789)
11931181 		pctl->gpio.set_multiple = sx150x_gpio_set_multiple;
11941182 
1195
-	ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl);
1196
-	if (ret)
1197
-		return ret;
1198
-
1199
-	ret = gpiochip_add_pin_range(&pctl->gpio, dev_name(dev),
1200
-				     0, 0, pctl->data->npins);
1201
-	if (ret)
1202
-		return ret;
1203
-
12041183 	/* Add Interrupt support if an irq is specified */
12051184 	if (client->irq > 0) {
1185
+		struct gpio_irq_chip *girq;
1186
+
12061187 		pctl->irq_chip.irq_mask = sx150x_irq_mask;
12071188 		pctl->irq_chip.irq_unmask = sx150x_irq_unmask;
12081189 		pctl->irq_chip.irq_set_type = sx150x_irq_set_type;
....@@ -1218,8 +1199,8 @@
12181199 
12191200 		/*
12201201 		 * Because sx150x_irq_threaded_fn invokes all of the
1221
-		 * nested interrrupt handlers via handle_nested_irq,
1222
-		 * any "handler" passed to gpiochip_irqchip_add()
1202
+		 * nested interrupt handlers via handle_nested_irq,
1203
+		 * any "handler" assigned to struct gpio_irq_chip
12231204 		 * below is going to be ignored, so the choice of the
12241205 		 * function does not matter that much.
12251206 		 *
....@@ -1227,13 +1208,15 @@
12271208 		 * plus it will be instantly noticeable if it is ever
12281209 		 * called (should not happen)
12291210 		 */
1230
-		ret = gpiochip_irqchip_add_nested(&pctl->gpio,
1231
-					&pctl->irq_chip, 0,
1232
-					handle_bad_irq, IRQ_TYPE_NONE);
1233
-		if (ret) {
1234
-			dev_err(dev, "could not connect irqchip to gpiochip\n");
1235
-			return ret;
1236
-		}
1211
+		girq = &pctl->gpio.irq;
1212
+		girq->chip = &pctl->irq_chip;
1213
+		/* This will let us handle the parent IRQ in the driver */
1214
+		girq->parent_handler = NULL;
1215
+		girq->num_parents = 0;
1216
+		girq->parents = NULL;
1217
+		girq->default_type = IRQ_TYPE_NONE;
1218
+		girq->handler = handle_bad_irq;
1219
+		girq->threaded = true;
12371220 
12381221 		ret = devm_request_threaded_irq(dev, client->irq, NULL,
12391222 						sx150x_irq_thread_fn,
....@@ -1242,12 +1225,28 @@
12421225 						pctl->irq_chip.name, pctl);
12431226 		if (ret < 0)
12441227 			return ret;
1245
-
1246
-		gpiochip_set_nested_irqchip(&pctl->gpio,
1247
-					    &pctl->irq_chip,
1248
-					    client->irq);
12491228 	}
12501229 
1230
+	ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl);
1231
+	if (ret)
1232
+		return ret;
1233
+
1234
+	/*
1235
+	 * Pin control functions need to be enabled AFTER registering the
1236
+	 * GPIO chip because sx150x_pinconf_set() calls
1237
+	 * sx150x_gpio_direction_output().
1238
+	 */
1239
+	ret = pinctrl_enable(pctl->pctldev);
1240
+	if (ret) {
1241
+		dev_err(dev, "Failed to enable pinctrl device\n");
1242
+		return ret;
1243
+	}
1244
+
1245
+	ret = gpiochip_add_pin_range(&pctl->gpio, dev_name(dev),
1246
+				     0, 0, pctl->data->npins);
1247
+	if (ret)
1248
+		return ret;
1249
+
12511250 	return 0;
12521251 }
12531252