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2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8 
 kernel/drivers/parport/parport_ip32.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /* Low-level parallel port routines for built-in port on SGI IP32
23  *
34  * Author: Arnaud Giersch <arnaud.giersch@free.fr>
....@@ -9,20 +10,6 @@
910  * Thanks to Ilya A. Volynets-Evenbakh for his help.
1011  *
1112  * Copyright (C) 2005, 2006 Arnaud Giersch.
12
- *
13
- * This program is free software; you can redistribute it and/or modify it
14
- * under the terms of the GNU General Public License as published by the Free
15
- * Software Foundation; either version 2 of the License, or (at your option)
16
- * any later version.
17
- *
18
- * This program is distributed in the hope that it will be useful, but WITHOUT
19
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
21
- * more details.
22
- *
23
- * You should have received a copy of the GNU General Public License along
24
- * with this program; if not, write to the Free Software Foundation, Inc., 59
25
- * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
2613  */
2714 
2815 /* Current status:
....@@ -341,19 +328,19 @@
341328 						     "TST", "CFG"};
342329 		unsigned int ecr = readb(priv->regs.ecr);
343330 		printk(KERN_DEBUG PPIP32 "    ecr=0x%02x", ecr);
344
-		printk(" %s",
345
-		       ecr_modes[(ecr & ECR_MODE_MASK) >> ECR_MODE_SHIFT]);
331
+		pr_cont(" %s",
332
+			ecr_modes[(ecr & ECR_MODE_MASK) >> ECR_MODE_SHIFT]);
346333 		if (ecr & ECR_nERRINTR)
347
-			printk(",nErrIntrEn");
334
+			pr_cont(",nErrIntrEn");
348335 		if (ecr & ECR_DMAEN)
349
-			printk(",dmaEn");
336
+			pr_cont(",dmaEn");
350337 		if (ecr & ECR_SERVINTR)
351
-			printk(",serviceIntr");
338
+			pr_cont(",serviceIntr");
352339 		if (ecr & ECR_F_FULL)
353
-			printk(",f_full");
340
+			pr_cont(",f_full");
354341 		if (ecr & ECR_F_EMPTY)
355
-			printk(",f_empty");
356
-		printk("\n");
342
+			pr_cont(",f_empty");
343
+		pr_cont("\n");
357344 	}
358345 	if (show_ecp_config) {
359346 		unsigned int oecr, cnfgA, cnfgB;
....@@ -365,52 +352,53 @@
365352 		writeb(ECR_MODE_PS2, priv->regs.ecr);
366353 		writeb(oecr, priv->regs.ecr);
367354 		printk(KERN_DEBUG PPIP32 "    cnfgA=0x%02x", cnfgA);
368
-		printk(" ISA-%s", (cnfgA & CNFGA_IRQ) ? "Level" : "Pulses");
355
+		pr_cont(" ISA-%s", (cnfgA & CNFGA_IRQ) ? "Level" : "Pulses");
369356 		switch (cnfgA & CNFGA_ID_MASK) {
370357 		case CNFGA_ID_8:
371
-			printk(",8 bits");
358
+			pr_cont(",8 bits");
372359 			break;
373360 		case CNFGA_ID_16:
374
-			printk(",16 bits");
361
+			pr_cont(",16 bits");
375362 			break;
376363 		case CNFGA_ID_32:
377
-			printk(",32 bits");
364
+			pr_cont(",32 bits");
378365 			break;
379366 		default:
380
-			printk(",unknown ID");
367
+			pr_cont(",unknown ID");
381368 			break;
382369 		}
383370 		if (!(cnfgA & CNFGA_nBYTEINTRANS))
384
-			printk(",ByteInTrans");
371
+			pr_cont(",ByteInTrans");
385372 		if ((cnfgA & CNFGA_ID_MASK) != CNFGA_ID_8)
386
-			printk(",%d byte%s left", cnfgA & CNFGA_PWORDLEFT,
387
-			       ((cnfgA & CNFGA_PWORDLEFT) > 1) ? "s" : "");
388
-		printk("\n");
373
+			pr_cont(",%d byte%s left",
374
+				cnfgA & CNFGA_PWORDLEFT,
375
+				((cnfgA & CNFGA_PWORDLEFT) > 1) ? "s" : "");
376
+		pr_cont("\n");
389377 		printk(KERN_DEBUG PPIP32 "    cnfgB=0x%02x", cnfgB);
390
-		printk(" irq=%u,dma=%u",
391
-		       (cnfgB & CNFGB_IRQ_MASK) >> CNFGB_IRQ_SHIFT,
392
-		       (cnfgB & CNFGB_DMA_MASK) >> CNFGB_DMA_SHIFT);
393
-		printk(",intrValue=%d", !!(cnfgB & CNFGB_INTRVAL));
378
+		pr_cont(" irq=%u,dma=%u",
379
+			(cnfgB & CNFGB_IRQ_MASK) >> CNFGB_IRQ_SHIFT,
380
+			(cnfgB & CNFGB_DMA_MASK) >> CNFGB_DMA_SHIFT);
381
+		pr_cont(",intrValue=%d", !!(cnfgB & CNFGB_INTRVAL));
394382 		if (cnfgB & CNFGB_COMPRESS)
395
-			printk(",compress");
396
-		printk("\n");
383
+			pr_cont(",compress");
384
+		pr_cont("\n");
397385 	}
398386 	for (i = 0; i < 2; i++) {
399387 		unsigned int dcr = i ? priv->dcr_cache : readb(priv->regs.dcr);
400388 		printk(KERN_DEBUG PPIP32 "    dcr(%s)=0x%02x",
401389 		       i ? "soft" : "hard", dcr);
402
-		printk(" %s", (dcr & DCR_DIR) ? "rev" : "fwd");
390
+		pr_cont(" %s", (dcr & DCR_DIR) ? "rev" : "fwd");
403391 		if (dcr & DCR_IRQ)
404
-			printk(",ackIntEn");
392
+			pr_cont(",ackIntEn");
405393 		if (!(dcr & DCR_SELECT))
406
-			printk(",nSelectIn");
394
+			pr_cont(",nSelectIn");
407395 		if (dcr & DCR_nINIT)
408
-			printk(",nInit");
396
+			pr_cont(",nInit");
409397 		if (!(dcr & DCR_AUTOFD))
410
-			printk(",nAutoFD");
398
+			pr_cont(",nAutoFD");
411399 		if (!(dcr & DCR_STROBE))
412
-			printk(",nStrobe");
413
-		printk("\n");
400
+			pr_cont(",nStrobe");
401
+		pr_cont("\n");
414402 	}
415403 #define sep (f++ ? ',' : ' ')
416404 	{
....@@ -418,20 +406,20 @@
418406 		unsigned int dsr = readb(priv->regs.dsr);
419407 		printk(KERN_DEBUG PPIP32 "    dsr=0x%02x", dsr);
420408 		if (!(dsr & DSR_nBUSY))
421
-			printk("%cBusy", sep);
409
+			pr_cont("%cBusy", sep);
422410 		if (dsr & DSR_nACK)
423
-			printk("%cnAck", sep);
411
+			pr_cont("%cnAck", sep);
424412 		if (dsr & DSR_PERROR)
425
-			printk("%cPError", sep);
413
+			pr_cont("%cPError", sep);
426414 		if (dsr & DSR_SELECT)
427
-			printk("%cSelect", sep);
415
+			pr_cont("%cSelect", sep);
428416 		if (dsr & DSR_nFAULT)
429
-			printk("%cnFault", sep);
417
+			pr_cont("%cnFault", sep);
430418 		if (!(dsr & DSR_nPRINT))
431
-			printk("%c(Print)", sep);
419
+			pr_cont("%c(Print)", sep);
432420 		if (dsr & DSR_TIMEOUT)
433
-			printk("%cTimeout", sep);
434
-		printk("\n");
421
+			pr_cont("%cTimeout", sep);
422
+		pr_cont("\n");
435423 	}
436424 #undef sep
437425 }
....@@ -568,6 +556,7 @@
568556 
569557 /**
570558  * parport_ip32_dma_start - begins a DMA transfer
559
+ * @p:		partport to work on
571560  * @dir:	DMA direction: DMA_TO_DEVICE or DMA_FROM_DEVICE
572561  * @addr:	pointer to data buffer
573562  * @count:	buffer size
....@@ -575,8 +564,8 @@
575564  * Calls to parport_ip32_dma_start() and parport_ip32_dma_stop() must be
576565  * correctly balanced.
577566  */
578
-static int parport_ip32_dma_start(enum dma_data_direction dir,
579
-				  void *addr, size_t count)
567
+static int parport_ip32_dma_start(struct parport *p,
568
+		enum dma_data_direction dir, void *addr, size_t count)
580569 {
581570 	unsigned int limit;
582571 	u64 ctrl;
....@@ -601,7 +590,7 @@
601590 
602591 	/* Prepare DMA pointers */
603592 	parport_ip32_dma.dir = dir;
604
-	parport_ip32_dma.buf = dma_map_single(NULL, addr, count, dir);
593
+	parport_ip32_dma.buf = dma_map_single(&p->bus_dev, addr, count, dir);
605594 	parport_ip32_dma.len = count;
606595 	parport_ip32_dma.next = parport_ip32_dma.buf;
607596 	parport_ip32_dma.left = parport_ip32_dma.len;
....@@ -625,11 +614,12 @@
625614 
626615 /**
627616  * parport_ip32_dma_stop - ends a running DMA transfer
617
+ * @p:		partport to work on
628618  *
629619  * Calls to parport_ip32_dma_start() and parport_ip32_dma_stop() must be
630620  * correctly balanced.
631621  */
632
-static void parport_ip32_dma_stop(void)
622
+static void parport_ip32_dma_stop(struct parport *p)
633623 {
634624 	u64 ctx_a;
635625 	u64 ctx_b;
....@@ -685,8 +675,8 @@
685675 	enable_irq(MACEISA_PAR_CTXB_IRQ);
686676 	parport_ip32_dma.irq_on = 1;
687677 
688
-	dma_unmap_single(NULL, parport_ip32_dma.buf, parport_ip32_dma.len,
689
-			 parport_ip32_dma.dir);
678
+	dma_unmap_single(&p->bus_dev, parport_ip32_dma.buf,
679
+			 parport_ip32_dma.len, parport_ip32_dma.dir);
690680 }
691681 
692682 /**
....@@ -1348,9 +1338,8 @@
13481338 			ecr = parport_ip32_read_econtrol(p);
13491339 			if ((ecr & ECR_F_EMPTY) && !(ecr & ECR_SERVINTR)
13501340 			    && !lost_interrupt) {
1351
-				printk(KERN_WARNING PPIP32
1352
-				       "%s: lost interrupt in %s\n",
1353
-				       p->name, __func__);
1341
+				pr_warn(PPIP32 "%s: lost interrupt in %s\n",
1342
+					p->name, __func__);
13541343 				lost_interrupt = 1;
13551344 			}
13561345 		}
....@@ -1445,7 +1434,7 @@
14451434 
14461435 	priv->irq_mode = PARPORT_IP32_IRQ_HERE;
14471436 
1448
-	parport_ip32_dma_start(DMA_TO_DEVICE, (void *)buf, len);
1437
+	parport_ip32_dma_start(p, DMA_TO_DEVICE, (void *)buf, len);
14491438 	reinit_completion(&priv->irq_complete);
14501439 	parport_ip32_frob_econtrol(p, ECR_DMAEN | ECR_SERVINTR, ECR_DMAEN);
14511440 
....@@ -1461,7 +1450,7 @@
14611450 		if (ecr & ECR_SERVINTR)
14621451 			break;	/* DMA transfer just finished */
14631452 	}
1464
-	parport_ip32_dma_stop();
1453
+	parport_ip32_dma_stop(p);
14651454 	written = len - parport_ip32_dma_get_residue();
14661455 
14671456 	priv->irq_mode = PARPORT_IP32_IRQ_FWD;
....@@ -1654,8 +1643,8 @@
16541643 				       DSR_nBUSY | DSR_nFAULT)) {
16551644 		/* Avoid to flood the logs */
16561645 		if (ready_before)
1657
-			printk(KERN_INFO PPIP32 "%s: not ready in %s\n",
1658
-			       p->name, __func__);
1646
+			pr_info(PPIP32 "%s: not ready in %s\n",
1647
+				p->name, __func__);
16591648 		ready_before = 0;
16601649 		goto stop;
16611650 	}
....@@ -1715,7 +1704,7 @@
17151704 
17161705 		/* Event 49: PError goes high. */
17171706 		if (parport_wait_peripheral(p, DSR_PERROR, DSR_PERROR)) {
1718
-			printk(KERN_DEBUG PPIP32 "%s: PError timeout in %s",
1707
+			printk(KERN_DEBUG PPIP32 "%s: PError timeout in %s\n",
17191708 			       p->name, __func__);
17201709 			physport->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN;
17211710 			return 0;
....@@ -1735,8 +1724,8 @@
17351724 				       DSR_nBUSY | DSR_nFAULT)) {
17361725 		/* Avoid to flood the logs */
17371726 		if (ready_before)
1738
-			printk(KERN_INFO PPIP32 "%s: not ready in %s\n",
1739
-			       p->name, __func__);
1727
+			pr_info(PPIP32 "%s: not ready in %s\n",
1728
+				p->name, __func__);
17401729 		ready_before = 0;
17411730 		goto stop;
17421731 	}
....@@ -2075,8 +2064,7 @@
20752064 	p->modes |= PARPORT_MODE_TRISTATE;
20762065 
20772066 	if (!parport_ip32_fifo_supported(p)) {
2078
-		printk(KERN_WARNING PPIP32
2079
-		       "%s: error: FIFO disabled\n", p->name);
2067
+		pr_warn(PPIP32 "%s: error: FIFO disabled\n", p->name);
20802068 		/* Disable hardware modes depending on a working FIFO. */
20812069 		features &= ~PARPORT_IP32_ENABLE_SPP;
20822070 		features &= ~PARPORT_IP32_ENABLE_ECP;
....@@ -2088,8 +2076,7 @@
20882076 	if (features & PARPORT_IP32_ENABLE_IRQ) {
20892077 		int irq = MACEISA_PARALLEL_IRQ;
20902078 		if (request_irq(irq, parport_ip32_interrupt, 0, p->name, p)) {
2091
-			printk(KERN_WARNING PPIP32
2092
-			       "%s: error: IRQ disabled\n", p->name);
2079
+			pr_warn(PPIP32 "%s: error: IRQ disabled\n", p->name);
20932080 			/* DMA cannot work without interrupts. */
20942081 			features &= ~PARPORT_IP32_ENABLE_DMA;
20952082 		} else {
....@@ -2102,8 +2089,7 @@
21022089 	/* Allocate DMA resources */
21032090 	if (features & PARPORT_IP32_ENABLE_DMA) {
21042091 		if (parport_ip32_dma_register())
2105
-			printk(KERN_WARNING PPIP32
2106
-			       "%s: error: DMA disabled\n", p->name);
2092
+			pr_warn(PPIP32 "%s: error: DMA disabled\n", p->name);
21072093 		else {
21082094 			pr_probe(p, "DMA support enabled\n");
21092095 			p->dma = 0; /* arbitrary value != PARPORT_DMA_NONE */
....@@ -2145,13 +2131,15 @@
21452131 	parport_ip32_dump_state(p, "end init", 0);
21462132 
21472133 	/* Print out what we found */
2148
-	printk(KERN_INFO "%s: SGI IP32 at 0x%lx (0x%lx)",
2149
-	       p->name, p->base, p->base_hi);
2134
+	pr_info("%s: SGI IP32 at 0x%lx (0x%lx)", p->name, p->base, p->base_hi);
21502135 	if (p->irq != PARPORT_IRQ_NONE)
2151
-		printk(", irq %d", p->irq);
2152
-	printk(" [");
2153
-#define printmode(x)	if (p->modes & PARPORT_MODE_##x)		\
2154
-				printk("%s%s", f++ ? "," : "", #x)
2136
+		pr_cont(", irq %d", p->irq);
2137
+	pr_cont(" [");
2138
+#define printmode(x)							\
2139
+do {									\
2140
+	if (p->modes & PARPORT_MODE_##x)				\
2141
+		pr_cont("%s%s", f++ ? "," : "", #x);			\
2142
+} while (0)
21552143 	{
21562144 		unsigned int f = 0;
21572145 		printmode(PCSPP);
....@@ -2162,7 +2150,7 @@
21622150 		printmode(DMA);
21632151 	}
21642152 #undef printmode
2165
-	printk("]\n");
2153
+	pr_cont("]\n");
21662154 
21672155 	parport_announce_port(p);
21682156 	return p;