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2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8 
 kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/bcmspibrcm.c
....@@ -1,15 +1,16 @@
1
-/* SPDX-License-Identifier: GPL-2.0 */
21 /*
32  * Broadcom BCMSDH to gSPI Protocol Conversion Layer
43  *
5
- * Copyright (C) 1999-2019, Broadcom Corporation
6
- * 
4
+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
5
+ *
6
+ * Copyright (C) 1999-2017, Broadcom Corporation
7
+ *
78  *      Unless you and Broadcom execute a separate written software license
89  * agreement governing use of this software, this software is licensed to you
910  * under the terms of the GNU General Public License version 2 (the "GPL"),
1011  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
1112  * following added to such license:
12
- * 
13
+ *
1314  *      As a special exception, the copyright holders of this software give you
1415  * permission to link this software with independent modules, and to copy and
1516  * distribute the resulting executable under terms of your choice, provided that
....@@ -17,7 +18,7 @@
1718  * the license of that module.  An independent module is a module which is not
1819  * derived from this software.  The special exception does not apply to any
1920  * modifications of the software.
20
- * 
21
+ *
2122  *      Notwithstanding the above, under no circumstances may you combine this
2223  * software in any way with any other Broadcom software provided under a license
2324  * other than the GPL, without Broadcom's express prior written consent.
....@@ -25,7 +26,7 @@
2526  *
2627  * <<Broadcom-WL-IPTag/Open:>>
2728  *
28
- * $Id: bcmspibrcm.c 514727 2014-11-12 03:02:48Z $
29
+ * $Id: bcmspibrcm.c 700323 2017-05-18 16:12:11Z $
2930  */
3031 
3132 #define HSMODE
....@@ -48,15 +49,17 @@
4849 
4950 #include <pcicfg.h>
5051 
51
-
5252 #include <bcmspibrcm.h>
53
+#ifdef BCMSPI_ANDROID
54
+extern void spi_sendrecv(sdioh_info_t *sd, uint8 *msg_out, uint8 *msg_in, int msglen);
55
+#else
5356 #include <bcmspi.h>
57
+#endif /* BCMSPI_ANDROID */
5458 
5559 /* these are for the older cores... for newer cores we have control for each of them */
5660 #define F0_RESPONSE_DELAY	16
5761 #define F1_RESPONSE_DELAY	16
5862 #define F2_RESPONSE_DELAY	F0_RESPONSE_DELAY
59
-
6063 
6164 #define GSPI_F0_RESP_DELAY		0
6265 #define GSPI_F1_RESP_DELAY		F1_RESPONSE_DELAY
....@@ -65,21 +68,19 @@
6568 
6669 #define CMDLEN		4
6770 
68
-#define DWORDMODE_ON (sd->chip == BCM4329_CHIP_ID) && (sd->chiprev == 2) && (sd->dwordmode == TRUE)
69
-
7071 /* Globals */
7172 #if defined(DHD_DEBUG)
7273 uint sd_msglevel = SDH_ERROR_VAL;
7374 #else
7475 uint sd_msglevel = 0;
75
-#endif 
76
+#endif // endif
7677 
7778 uint sd_hiok = FALSE;		/* Use hi-speed mode if available? */
7879 uint sd_sdmode = SDIOH_MODE_SPI;		/* Use SD4 mode by default */
80
+uint sd_f1_blocksize = 64;		/* Default blocksize */
7981 uint sd_f2_blocksize = 64;		/* Default blocksize */
8082 
81
-
82
-uint sd_divisor = 2;
83
+uint sd_divisor = 1;
8384 uint sd_power = 1;		/* Default to SD Slot powered ON */
8485 uint sd_clock = 1;		/* Default to SD Clock turned ON */
8586 uint sd_crc = 0;		/* Default to SPI CRC Check turned OFF */
....@@ -94,10 +95,18 @@
9495 #define BUF2_PKT_LEN	128
9596 uint8	spi_outbuf2[BUF2_PKT_LEN];
9697 uint8	spi_inbuf2[BUF2_PKT_LEN];
98
+#ifdef BCMSPI_ANDROID
99
+uint *dhd_spi_lockcount = NULL;
100
+#endif /* BCMSPI_ANDROID */
97101 
102
+#if !(defined(SPI_PIO_RW_BIGENDIAN) && defined(SPI_PIO_32BIT_RW))
98103 #define SPISWAP_WD4(x) bcmswap32(x);
99104 #define SPISWAP_WD2(x) (bcmswap16(x & 0xffff)) | \
100105 						(bcmswap16((x & 0xffff0000) >> 16) << 16);
106
+#else
107
+#define SPISWAP_WD4(x) x;
108
+#define SPISWAP_WD2(x) bcmswap32by16(x);
109
+#endif // endif
101110 
102111 /* Prototypes */
103112 static bool bcmspi_test_card(sdioh_info_t *sd);
....@@ -140,11 +149,15 @@
140149 		return NULL;
141150 	}
142151 
152
+#ifndef BCMSPI_ANDROID
143153 	sd->bar0 = bar0;
154
+#endif /* !BCMSPI_ANDROID */
144155 	sd->irq = irq;
156
+#ifndef BCMSPI_ANDROID
145157 	sd->intr_handler = NULL;
146158 	sd->intr_handler_arg = NULL;
147159 	sd->intr_handler_valid = FALSE;
160
+#endif /* !BCMSPI_ANDROID */
148161 
149162 	/* Set defaults */
150163 	sd->use_client_ints = TRUE;
....@@ -155,17 +168,24 @@
155168 	 */
156169 	sd->wordlen = 2;
157170 
171
+#ifdef BCMSPI_ANDROID
172
+	dhd_spi_lockcount = &sd->lockcount;
173
+#endif /* BCMSPI_ANDROID */
158174 
175
+#ifndef BCMSPI_ANDROID
159176 	if (!spi_hw_attach(sd)) {
160177 		sd_err(("%s: spi_hw_attach() failed\n", __FUNCTION__));
161178 		spi_osfree(sd);
162179 		MFREE(sd->osh, sd, sizeof(sdioh_info_t));
163180 		return (NULL);
164181 	}
182
+#endif /* !BCMSPI_ANDROID */
165183 
166184 	if (bcmspi_driver_init(sd) != SUCCESS) {
167185 		sd_err(("%s: bcmspi_driver_init() failed()\n", __FUNCTION__));
186
+#ifndef BCMSPI_ANDROID
168187 		spi_hw_detach(sd);
188
+#endif /* !BCMSPI_ANDROID */
169189 		spi_osfree(sd);
170190 		MFREE(sd->osh, sd, sizeof(sdioh_info_t));
171191 		return (NULL);
....@@ -173,7 +193,9 @@
173193 
174194 	if (spi_register_irq(sd, irq) != SUCCESS) {
175195 		sd_err(("%s: spi_register_irq() failed for irq = %d\n", __FUNCTION__, irq));
196
+#ifndef BCMSPI_ANDROID
176197 		spi_hw_detach(sd);
198
+#endif /* !BCMSPI_ANDROID */
177199 		spi_osfree(sd);
178200 		MFREE(sd->osh, sd, sizeof(sdioh_info_t));
179201 		return (NULL);
....@@ -191,8 +213,13 @@
191213 	if (sd) {
192214 		sd_err(("%s: detaching from hardware\n", __FUNCTION__));
193215 		spi_free_irq(sd->irq, sd);
216
+#ifndef BCMSPI_ANDROID
194217 		spi_hw_detach(sd);
218
+#endif /* !BCMSPI_ANDROID */
195219 		spi_osfree(sd);
220
+#ifdef BCMSPI_ANDROID
221
+		dhd_spi_lockcount = NULL;
222
+#endif /* !BCMSPI_ANDROID */
196223 		MFREE(sd->osh, sd, sizeof(sdioh_info_t));
197224 	}
198225 	return SDIOH_API_RC_SUCCESS;
....@@ -226,8 +253,10 @@
226253 extern SDIOH_API_RC
227254 sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff)
228255 {
256
+#ifndef BCMSPI_ANDROID
229257 	sd_trace(("%s: Entering\n", __FUNCTION__));
230258 	*onoff = sd->client_intr_enabled;
259
+#endif /* !BCMSPI_ANDROID */
231260 	return SDIOH_API_RC_SUCCESS;
232261 }
233262 
....@@ -237,14 +266,7 @@
237266 {
238267 	return 0;
239268 }
240
-#endif
241
-
242
-extern SDIOH_API_RC
243
-sdioh_query_device(sdioh_info_t *sd)
244
-{
245
-	/* Return a BRCM ID appropriate to the dongle class */
246
-	return (sd->num_funcs > 1) ? BCM4329_D11N_ID : BCM4318_D11G_ID;
247
-}
269
+#endif // endif
248270 
249271 /* Provide dstatus bits of spi-transaction for dhd layers. */
250272 extern uint32
....@@ -289,7 +311,6 @@
289311 	}
290312 }
291313 
292
-
293314 uint
294315 sdioh_query_iofnum(sdioh_info_t *sd)
295316 {
....@@ -318,22 +339,22 @@
318339 };
319340 
320341 const bcm_iovar_t sdioh_iovars[] = {
321
-	{"sd_msglevel",	IOV_MSGLEVEL, 	0,	IOVT_UINT32,	0 },
322
-	{"sd_blocksize", IOV_BLOCKSIZE, 0,	IOVT_UINT32,	0 }, /* ((fn << 16) | size) */
323
-	{"sd_dma",	IOV_DMA,	0,	IOVT_BOOL,	0 },
324
-	{"sd_ints",	IOV_USEINTS,	0,	IOVT_BOOL,	0 },
325
-	{"sd_numints",	IOV_NUMINTS,	0,	IOVT_UINT32,	0 },
326
-	{"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32,	0 },
327
-	{"sd_hostreg",	IOV_HOSTREG,	0,	IOVT_BUFFER,	sizeof(sdreg_t) },
328
-	{"sd_devreg",	IOV_DEVREG,	0,	IOVT_BUFFER,	sizeof(sdreg_t)	},
329
-	{"sd_divisor",	IOV_DIVISOR,	0,	IOVT_UINT32,	0 },
330
-	{"sd_power",	IOV_POWER,	0,	IOVT_UINT32,	0 },
331
-	{"sd_clock",	IOV_CLOCK,	0,	IOVT_UINT32,	0 },
332
-	{"sd_mode",	IOV_SDMODE,	0,	IOVT_UINT32,	100},
333
-	{"sd_highspeed",	IOV_HISPEED,	0,	IOVT_UINT32,	0},
334
-	{"spi_errstats", IOV_SPIERRSTATS, 0, IOVT_BUFFER, sizeof(struct spierrstats_t) },
335
-	{"spi_respdelay",	IOV_RESP_DELAY_ALL,	0,	IOVT_BOOL,	0 },
336
-	{NULL, 0, 0, 0, 0 }
342
+	{"sd_msglevel",		IOV_MSGLEVEL,	0,	0,	IOVT_UINT32,	0 },
343
+	{"sd_blocksize",	IOV_BLOCKSIZE,	0,	0,	IOVT_UINT32,	0 },
344
+	{"sd_dma",		IOV_DMA,	0,	0,	IOVT_BOOL,	0 },
345
+	{"sd_ints",		IOV_USEINTS,	0,	0,	IOVT_BOOL,	0 },
346
+	{"sd_numints",		IOV_NUMINTS,	0,	0,	IOVT_UINT32,	0 },
347
+	{"sd_numlocalints",	IOV_NUMLOCALINTS,	0,	0,	IOVT_UINT32,	0 },
348
+	{"sd_hostreg",		IOV_HOSTREG,	0,	0,	IOVT_BUFFER,	sizeof(sdreg_t) },
349
+	{"sd_devreg",		IOV_DEVREG,	0,	0,	IOVT_BUFFER,	sizeof(sdreg_t)	},
350
+	{"sd_divisor",		IOV_DIVISOR,	0,	0,	IOVT_UINT32,	0 },
351
+	{"sd_power",		IOV_POWER,	0,	0,	IOVT_UINT32,	0 },
352
+	{"sd_clock",		IOV_CLOCK,	0,	0,	IOVT_UINT32,	0 },
353
+	{"sd_mode",		IOV_SDMODE,	0,	0,	IOVT_UINT32,	100},
354
+	{"sd_highspeed",	IOV_HISPEED,	0,	0,	IOVT_UINT32,	0},
355
+	{"spi_errstats",	IOV_SPIERRSTATS, 0, 0, IOVT_BUFFER, sizeof(struct spierrstats_t) },
356
+	{"spi_respdelay",	IOV_RESP_DELAY_ALL,	0,	0,	IOVT_BOOL,	0 },
357
+	{NULL, 0, 0, 0, 0, 0 }
337358 };
338359 
339360 int
....@@ -344,7 +365,6 @@
344365 	int bcmerror = 0;
345366 	int val_size;
346367 	int32 int_val = 0;
347
-	bool bool_val;
348368 	uint32 actionid;
349369 /*
350370 	sdioh_regs_t *regs;
....@@ -382,8 +402,6 @@
382402 
383403 	if (plen >= (int)sizeof(int_val))
384404 		bcopy(params, &int_val, sizeof(int_val));
385
-
386
-	bool_val = (int_val != 0) ? TRUE : FALSE;
387405 
388406 	actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
389407 	switch (actionid) {
....@@ -427,6 +445,7 @@
427445 		bcopy(&int_val, arg, val_size);
428446 		break;
429447 
448
+#ifndef BCMSPI_ANDROID
430449 	case IOV_SVAL(IOV_DIVISOR):
431450 		sd_divisor = int_val;
432451 		if (!spi_start_clock(si, (uint16)sd_divisor)) {
....@@ -434,6 +453,7 @@
434453 			bcmerror = BCME_ERROR;
435454 		}
436455 		break;
456
+#endif /* !BCMSPI_ANDROID */
437457 
438458 	case IOV_GVAL(IOV_POWER):
439459 		int_val = (uint32)sd_power;
....@@ -513,7 +533,6 @@
513533 		}
514534 		break;
515535 	}
516
-
517536 
518537 	case IOV_GVAL(IOV_SPIERRSTATS):
519538 	{
....@@ -598,7 +617,7 @@
598617 	int offset;
599618 	uint32 cis_byte;
600619 	uint16 *cis = (uint16 *)cisd;
601
-	uint bar0 = SI_ENUM_BASE;
620
+	uint bar0 = SI_ENUM_BASE_DEFAULT;
602621 	int status;
603622 	uint8 data;
604623 
....@@ -762,7 +781,6 @@
762781 
763782 	sd_trace(("%s cmd_arg = 0x%x\n", __FUNCTION__, cmd_arg));
764783 
765
-
766784 	/* Set up and issue the SPI command.  MSByte goes out on bus first.  Increase datalen
767785 	 * according to the wordlen mode(16/32bit) the device is in.
768786 	 */
....@@ -847,7 +865,6 @@
847865 bcmspi_resync_f1(sdioh_info_t *sd)
848866 {
849867 	uint32 cmd_arg = GSPI_RESYNC_PATTERN, data = 0, datalen = 0;
850
-
851868 
852869 	/* Set up and issue the SPI command.  MSByte goes out on bus first.  Increase datalen
853870 	 * according to the wordlen mode(16/32bit) the device is in.
....@@ -978,7 +995,6 @@
978995 	return SUCCESS;
979996 }
980997 
981
-
982998 /*
983999  * Private/Static work routines
9841000  */
....@@ -1032,6 +1048,7 @@
10321048 	uint32	status_en_reg = 0;
10331049 	sd_trace(("%s: Powering up slot %d\n", __FUNCTION__, sd->adapter_slot));
10341050 
1051
+#ifndef BCMSPI_ANDROID
10351052 #ifdef HSMODE
10361053 	if (!spi_start_clock(sd, (uint16)sd_divisor)) {
10371054 		sd_err(("spi_start_clock failed\n"));
....@@ -1044,6 +1061,7 @@
10441061 		return ERROR;
10451062 	}
10461063 #endif /* HSMODE */
1064
+#endif /* !BCMSPI_ANDROID */
10471065 
10481066 	if (!bcmspi_host_device_init_adapt(sd)) {
10491067 		sd_err(("bcmspi_host_device_init_adapt failed\n"));
....@@ -1076,11 +1094,13 @@
10761094 	}
10771095 
10781096 #ifndef HSMODE
1097
+#ifndef BCMSPI_ANDROID
10791098 	/* After configuring for High-Speed mode, set the desired clock rate. */
10801099 	if (!spi_start_clock(sd, 4)) {
10811100 		sd_err(("spi_start_clock failed\n"));
10821101 		return ERROR;
10831102 	}
1103
+#endif /* !BCMSPI_ANDROID */
10841104 #endif /* HSMODE */
10851105 
10861106 	/* check to see if the response delay needs to be programmed properly */
....@@ -1127,7 +1147,6 @@
11271147 		}
11281148 	}
11291149 
1130
-
11311150 	sd->card_init_done = TRUE;
11321151 
11331152 	/* get the device rev to program the prop respdelays */
....@@ -1146,7 +1165,6 @@
11461165 		return status;
11471166 
11481167 	sd_trace(("In %s spih-ctrl = 0x%x \n", __FUNCTION__, regdata));
1149
-
11501168 
11511169 	if (hsmode == TRUE) {
11521170 		sd_trace(("Attempting to enable High-Speed mode.\n"));
....@@ -1167,6 +1185,7 @@
11671185 
11681186 		if (regdata & HIGH_SPEED_MODE) {
11691187 			regdata &= ~HIGH_SPEED_MODE;
1188
+			regdata |= CLOCK_POLARITY;
11701189 			sd_trace(("Writing %08x to device at %08x\n", regdata, SPID_CONFIG));
11711190 			if ((status = bcmspi_card_regwrite(sd, 0, SPID_CONFIG,
11721191 			                                  4, regdata)) != SUCCESS)
....@@ -1177,7 +1196,9 @@
11771196 			return status;
11781197 		}
11791198 	}
1199
+#ifndef BCMSPI_ANDROID
11801200 	spi_controller_highspeed_mode(sd, hsmode);
1201
+#endif /* !BCMSPI_ANDROID */
11811202 
11821203 	return TRUE;
11831204 }
....@@ -1287,8 +1308,14 @@
12871308 			OSL_DELAY(1000);
12881309 		}
12891310 
1311
+#if defined(CHANGE_SPI_INTR_POLARITY_ACTIVE_HIGH)
1312
+		/* Change to host controller intr-polarity of active-high */
1313
+		wrregdata |= INTR_POLARITY;
1314
+#else
12901315 		/* Change to host controller intr-polarity of active-low */
12911316 		wrregdata &= ~INTR_POLARITY;
1317
+#endif /* CHANGE_SPI_INTR_POLARITY_ACTIVE_HIGH */
1318
+
12921319 		sd_trace(("(we are still in 16bit mode) 32bit Write LE reg-ctrl-data = 0x%x\n",
12931320 		        wrregdata));
12941321 		/* Change to 32bit mode */
....@@ -1311,7 +1338,6 @@
13111338 		}
13121339 	}
13131340 
1314
-
13151341 	return TRUE;
13161342 }
13171343 
....@@ -1330,7 +1356,6 @@
13301356 		sd_trace(("Incorrect 32bit LE regdata = 0x%x\n", regdata));
13311357 		return FALSE;
13321358 	}
1333
-
13341359 
13351360 #define RW_PATTERN1	0xA0A1A2A3
13361361 #define RW_PATTERN2	0x4B5B6B7B
....@@ -1518,27 +1543,10 @@
15181543 	uint8	resp_delay = 0;
15191544 	int	err = SUCCESS;
15201545 	uint32	hostlen;
1521
-	uint32 spilen = 0;
15221546 	uint32 dstatus_idx = 0;
1523
-	uint16 templen, buslen, len, *ptr = NULL;
1547
+//	uint16 templen, buslen, len;
15241548 
15251549 	sd_trace(("spi cmd = 0x%x\n", cmd_arg));
1526
-
1527
-	if (DWORDMODE_ON) {
1528
-		spilen = GFIELD(cmd_arg, SPI_LEN);
1529
-		if ((GFIELD(cmd_arg, SPI_FUNCTION) == SPI_FUNC_0) ||
1530
-		    (GFIELD(cmd_arg, SPI_FUNCTION) == SPI_FUNC_1))
1531
-			dstatus_idx = spilen * 3;
1532
-
1533
-		if ((GFIELD(cmd_arg, SPI_FUNCTION) == SPI_FUNC_2) &&
1534
-		    (GFIELD(cmd_arg, SPI_RW_FLAG) == 1)) {
1535
-			spilen = spilen << 2;
1536
-			dstatus_idx = (spilen % 16) ? (16 - (spilen % 16)) : 0;
1537
-			/* convert len to mod16 size */
1538
-			spilen = ROUNDUP(spilen, 16);
1539
-			cmd_arg = SFIELD(cmd_arg, SPI_LEN, (spilen >> 2));
1540
-		}
1541
-	}
15421550 
15431551 	/* Set up and issue the SPI command.  MSByte goes out on bus first.  Increase datalen
15441552 	 * according to the wordlen mode(16/32bit) the device is in.
....@@ -1562,17 +1570,6 @@
15621570 	/* for Write, put the data into the output buffer */
15631571 	if (GFIELD(cmd_arg, SPI_RW_FLAG) == 1) {
15641572 		/* We send len field of hw-header always a mod16 size, both from host and dongle */
1565
-		if (DWORDMODE_ON) {
1566
-			if (GFIELD(cmd_arg, SPI_FUNCTION) == SPI_FUNC_2) {
1567
-				ptr = (uint16 *)&data[0];
1568
-				templen = *ptr;
1569
-				/* ASSERT(*ptr == ~*(ptr + 1)); */
1570
-				templen = ROUNDUP(templen, 16);
1571
-				*ptr = templen;
1572
-				sd_trace(("actual tx len = %d\n", (uint16)(~*(ptr+1))));
1573
-			}
1574
-		}
1575
-
15761573 		if (datalen != 0) {
15771574 			for (i = 0; i < datalen/4; i++) {
15781575 				if (sd->wordlen == 4) { /* 32bit spid */
....@@ -1620,7 +1617,15 @@
16201617 	/* +4 for cmd and +4 for dstatus */
16211618 	hostlen = datalen + 8 + resp_delay;
16221619 	hostlen += dstatus_idx;
1620
+#ifdef BCMSPI_ANDROID
1621
+	if (hostlen%4) {
1622
+		sd_err(("Unaligned data len %d, hostlen %d\n",
1623
+			datalen, hostlen));
1624
+#endif /* BCMSPI_ANDROID */
16231625 	hostlen += (4 - (hostlen & 0x3));
1626
+#ifdef BCMSPI_ANDROID
1627
+	}
1628
+#endif /* BCMSPI_ANDROID */
16241629 	spi_sendrecv(sd, spi_outbuf, spi_inbuf, hostlen);
16251630 
16261631 	/* for Read, get the data into the input buffer */
....@@ -1635,25 +1640,6 @@
16351640 					            CMDLEN + resp_delay]);
16361641 				}
16371642 			}
1638
-
1639
-			if ((DWORDMODE_ON) && (GFIELD(cmd_arg, SPI_FUNCTION) == SPI_FUNC_2)) {
1640
-				ptr = (uint16 *)&data[0];
1641
-				templen = *ptr;
1642
-				buslen = len = ~(*(ptr + 1));
1643
-				buslen = ROUNDUP(buslen, 16);
1644
-				/* populate actual len in hw-header */
1645
-				if (templen == buslen)
1646
-					*ptr = len;
1647
-			}
1648
-		}
1649
-	}
1650
-
1651
-	/* Restore back the len field of the hw header */
1652
-	if (DWORDMODE_ON) {
1653
-		if ((GFIELD(cmd_arg, SPI_FUNCTION) == SPI_FUNC_2) &&
1654
-		    (GFIELD(cmd_arg, SPI_RW_FLAG) == 1)) {
1655
-			ptr = (uint16 *)&data[0];
1656
-			*ptr = (uint16)(~*(ptr+1));
16571643 		}
16581644 	}
16591645 
....@@ -1761,17 +1747,10 @@
17611747 	         __FUNCTION__, write ? "Wd" : "Rd", func, "INCR",
17621748 	         addr, nbytes, sd->r_cnt, sd->t_cnt));
17631749 
1764
-
17651750 	if ((status = bcmspi_cmd_issue(sd, sd->sd_use_dma, cmd_arg, data, nbytes)) != SUCCESS) {
17661751 		sd_err(("%s: cmd_issue failed for %s\n", __FUNCTION__,
17671752 			(write ? "write" : "read")));
17681753 		return status;
1769
-	}
1770
-
1771
-	/* gSPI expects that hw-header-len is equal to spi-command-len */
1772
-	if ((func == 2) && (rw == SDIOH_WRITE) && (sd->dwordmode == FALSE)) {
1773
-		ASSERT((uint16)sd->data_xfer_count == (uint16)(*data & 0xffff));
1774
-		ASSERT((uint16)sd->data_xfer_count == (uint16)(~((*data & 0xffff0000) >> 16)));
17751754 	}
17761755 
17771756 	if ((nbytes > 2000) && !write) {